+++ /dev/null
-#/** @file
-# Omap35xx SoC package.
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials are licensed and made available under
-# the terms and conditions of the BSD License which accompanies this distribution.
-# The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- DEC_SPECIFICATION = 0x00010005
- PACKAGE_NAME = ArmEbPkg
- PACKAGE_GUID = 44577A0D-361A-45B2-B33D-BB9EE60D5A4F
- PACKAGE_VERSION = 0.1
-
-################################################################################
-#
-# Include Section - list of Include Paths that are provided by this package.
-# Comments are used for Keywords and Module Types.
-#
-# Supported Module Types:
-# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
-#
-################################################################################
-[Includes.common]
- Include # Root include for the package
-
-[Guids.common]
- gArmEbTokenSpaceGuid = { 0x44577A0D, 0x361A, 0x45B2, { 0xb3, 0x3d, 0xbb, 0x9e, 0xe6, 0x0d, 0x5a, 0x4f} }
-
-[PcdsFeatureFlag.common]
-
-[PcdsFixedAtBuild.common]
- gArmEbTokenSpaceGuid.PcdConsoleUartBase|0x10009000|UINT32|0x00000001
- gArmEbTokenSpaceGuid.PcdGdbUartBase|0x1000a000|UINT32|0x00000002
-
+++ /dev/null
-#/** @file
-# ARM EB package.
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-################################################################################
-#
-# Defines Section - statements that will be processed to create a Makefile.
-#
-################################################################################
-[Defines]
- PLATFORM_NAME = ArmEbPkg
- PLATFORM_GUID = F4C1AD3E-9D3E-4F61-8791-B3BB1C43D04C
- PLATFORM_VERSION = 0.1
- DSC_SPECIFICATION = 0x00010005
- OUTPUT_DIRECTORY = Build/ArmEB
- SUPPORTED_ARCHITECTURES = ARM
- BUILD_TARGETS = DEBUG|RELEASE
- SKUID_IDENTIFIER = DEFAULT
- FLASH_DEFINITION = ArmEbPkg/ArmEbPkg.fdf
-
-
-[LibraryClasses.common]
-!if $(BUILD_TARGETS) == RELEASE
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
- UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
-!else
- DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
- UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
-# UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
-!endif
-
- ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-
- BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
- BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf
-
- EfiResetSystemLib|ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.inf
- PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
- PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
-
- EblCmdLib|BeagleBoardPkg/Library/EblCmdLib/EblCmdLib.inf
- EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf
- PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
-
- #
- # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
- # in the debugger will show load and unload commands for symbols. You can cut and paste this
- # into the command window to load symbols. We should be able to use a script to do this, but
- # the version of RVD I have does not support scipts accessing system memory.
- #
-# PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
- PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
-# PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
-
-
- CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
- DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
- PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
-
- SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf
-
- RealTimeClockLib|ArmEbPkg/Library/RealTimeClockLib/RealTimeClockLib.inf
-
- IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
-
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
- UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
- UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
- DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
- UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
-
- DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
- UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
- UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
-
-#
-# Assume everything is fixed at build
-#
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
-
- UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
-
-
- EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf
-
- CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
- PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
-
-
- #
- # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
- # in the debugger will show load and unload commands for symbols. You can cut and paste this
- # into the command window to load symbols. We should be able to use a script to do this, but
- # the version of RVD I have does not support scipts accessing system memory.
- #
-# PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
- PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
-
- EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf
-
- ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
- DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
- DebugAgentTimerLib|ArmEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
-
- SerialPortLib|ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
- TimerLib|ArmEbPkg/Library/TimerLib/TimerLib.inf
- SerialPortLib|ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
- GdbSerialLib|ArmEbPkg/Library/GdbSerialLib/GdbSerialLib.inf
- DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
-
-
-[LibraryClasses.common.SEC]
- ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
- UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
- ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
- LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
- PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
- HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
- PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
-
- # 1/123 faster than Stm or Vstm version
- BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
-
- # Uncomment to turn on GDB stub in SEC.
- #DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf
-
-[LibraryClasses.common.DXE_CORE]
- HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
- MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
- DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
- ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
- ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
- UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
- DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
-# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
- PeCoffLib|EmbeddedPkg/Library/DxeHobPeCoffLib/DxeHobPeCoffLib.inf
-
- PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
-
-
-[LibraryClasses.common.DXE_DRIVER]
- ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
- DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
- SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
- PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-
-
-[LibraryClasses.common.UEFI_APPLICATION]
- ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
- UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
- PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-
-[LibraryClasses.common.UEFI_DRIVER]
- ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
- UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
- ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
- PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-
-[LibraryClasses.common.DXE_RUNTIME_DRIVER]
- HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
- MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
- ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
- CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
-# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
- PeCoffLib|EmbeddedPkg/Library/DxeHobPeCoffLib/DxeHobPeCoffLib.inf
-
-[LibraryClasses.ARM]
- #
- # It is not possible to prevent the ARM compiler for generic intrinsic functions.
- # This library provides the instrinsic functions generate by a given compiler.
- # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.
- #
- NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
-
-
-[BuildOptions]
- RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb
- RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8
- RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
-
- GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb \r
- GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a
- GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
-\r
- XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7
- XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7
- XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7
- XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
-
-
-################################################################################
-#
-# Pcd Section - list of all EDK II PCD Entries defined by this Platform
-#
-################################################################################
-
-[PcdsFeatureFlag.common]
- gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE
- gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
- gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
- gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
-
- #
- # Control what commands are supported from the UI
- # Turn these on and off to add features or save size
- #
- gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
- gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
- gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
- gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
- gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
- gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
-
- gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
-
- gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
- gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE
-
- gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
-
-[PcdsFixedAtBuild.common]
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmEb %a"
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0
- gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
- gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
- gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
- gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
- gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
- gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
- gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
- gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
-
-# DEBUG_ASSERT_ENABLED 0x01
-# DEBUG_PRINT_ENABLED 0x02
-# DEBUG_CODE_ENABLED 0x04
-# CLEAR_MEMORY_ENABLED 0x08
-# ASSERT_BREAKPOINT_ENABLED 0x10
-# ASSERT_DEADLOOP_ENABLED 0x20
- gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
-
-# DEBUG_INIT 0x00000001 // Initialization
-# DEBUG_WARN 0x00000002 // Warnings
-# DEBUG_LOAD 0x00000004 // Load events
-# DEBUG_FS 0x00000008 // EFI File system
-# DEBUG_POOL 0x00000010 // Alloc & Free's
-# DEBUG_PAGE 0x00000020 // Alloc & Free's
-# DEBUG_INFO 0x00000040 // Verbose
-# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers
-# DEBUG_VARIABLE 0x00000100 // Variable
-# DEBUG_BM 0x00000400 // Boot Manager
-# DEBUG_BLKIO 0x00001000 // BlkIo Driver
-# DEBUG_NET 0x00004000 // SNI Driver
-# DEBUG_UNDI 0x00010000 // UNDI Driver
-# DEBUG_LOADFILE 0x00020000 // UNDI Driver
-# DEBUG_EVENT 0x00080000 // Event messages
-# DEBUG_ERROR 0x80000000 // Error
- gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
-
- gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
-
- gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
- gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
- gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
-
- gEmbeddedTokenSpaceGuid.PcdPrePiTempMemorySize|0
- gEmbeddedTokenSpaceGuid.PcdPrePiBfvBaseAddress|0
- gEmbeddedTokenSpaceGuid.PcdPrePiBfvSize|0
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|0
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize|0
-
-#
-# Optional feature to help prevent EFI memory map fragments
-# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
-# Values are in EFI Pages (4K). DXE Core will make sure that
-# at least this much of each type of memory can be allocated
-# from a single memory range. This way you only end up with
-# maximum of two fragements for each type in the memory map
-# (the memory used, and the free memory that was prereserved
-# but not used).
-#
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|40
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|3000
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|10
- gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
-
- gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x00001000
- gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x07FE0000 # stack at top of memory
- gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x20000 # 128K stack
- gEmbeddedTokenSpaceGuid.PcdMemoryBase|0x00000000
- gEmbeddedTokenSpaceGuid.PcdMemorySize|0x10000000 # 256 MB
-
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
- gArmTokenSpaceGuid.PcdCpuResetAddress|0x40000000 # set to start of NOR
-
- gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds|77
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz|13000000
-
- #
- # ARM Pcds
- #
- gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
-
- #
- # ARM EB PCDS
- #
- gArmEbTokenSpaceGuid.PcdConsoleUartBase|0x10009000
- gArmEbTokenSpaceGuid.PcdGdbUartBase|0x1000a000
-
-
-################################################################################
-#
-# Components Section - list of all EDK II Modules needed by this Platform
-#
-################################################################################
-[Components.common]
-
-#
-# SEC
-#
- ArmEbPkg/Sec/Sec.inf
-
-#
-# DXE
-#
- MdeModulePkg/Core/Dxe/DxeMain.inf {
- <LibraryClasses>
- PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
- NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
-# NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
- NULL|EmbeddedPkg/Library/LzmaHobCustomDecompressLib/LzmaHobCustomDecompressLib.inf
- }
-
- ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-
- MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
- MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
- EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
- EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
-
- EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
- EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- ArmEbPkg/InterruptDxe/InterruptDxe.inf
- ArmEbPkg/TimerDxe/TimerDxe.inf
-
- #
- # Semi-hosting filesystem
- #
- ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- FatPkg/EnhancedFatDxe/Fat.inf
- MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
-
- #
- # Application
- #
- EmbeddedPkg/Ebl/Ebl.inf
-
- #
- # Bds
- #
- ArmEbPkg/Bds/Bds.inf
-
- #
- # Example Application
- #
- MdeModulePkg/Application/HelloWorld/HelloWorld.inf
-
+++ /dev/null
-# FLASH layout file for ARM EB.
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-################################################################################
-#
-# FD Section
-# The [FD] Section is made up of the definition statements and a
-# description of what goes into the Flash Device Image. Each FD section
-# defines one flash "device" image. A flash device image may be one of
-# the following: Removable media bootable image (like a boot floppy
-# image,) an Option ROM image (that would be "flashed" into an add-in
-# card,) a System "Flash" image (that would be burned into a system's
-# flash) or an Update ("Capsule") image that will be used to update and
-# existing system flash.
-#
-################################################################################
-
-
-[FD.ArmEb_EFI]
-BaseAddress = 0x40000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
-Size = 0x00200000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
-ErasePolarity = 1
-BlockSize = 0x00001000
-NumBlocks = 0x200
-
-################################################################################
-#
-# Following are lists of FD Region layout which correspond to the locations of different
-# images within the flash device.
-#
-# Regions must be defined in ascending order and may not overlap.
-#
-# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
-# the pipe "|" character, followed by the size of the region, also in hex with the leading
-# "0x" characters. Like:
-# Offset|Size
-# PcdOffsetCName|PcdSizeCName
-# RegionType <FV, DATA, or FILE>
-#
-################################################################################
-
-0x00000000|0x00200000
-gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
-FV = FVMAIN_COMPACT
-
-################################################################################
-#
-# FV Section
-#
-# [FV] section is used to define what components or modules are placed within a flash
-# device file. This section also defines order the components and modules are positioned
-# within the image. The [FV] section consists of define statements, set statements and
-# module statements.
-#
-################################################################################
-
-[FV.FvMain]
-BlockSize = 0x40
-NumBlocks = 0 # This FV gets compressed so make it just big enough
-FvAlignment = 8 # FV alignment and FV attributes setting.
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF MdeModulePkg/Core/Dxe/DxeMain.inf
-
- #
- # PI DXE Drivers producing Architectural Protocols (EFI Services)
- #
- INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
-
- INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
- INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
- INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
- INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
- INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
-
- INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
-
- INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
- INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
-
- INF ArmEbPkg/InterruptDxe/InterruptDxe.inf
- INF ArmEbPkg/TimerDxe/TimerDxe.inf
-
- #
- # Semi-hosting filesystem
- #
- INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
-
- #
- # FAT filesystem + GPT/MBR partitioning
- #
- INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
- INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
- INF FatPkg/EnhancedFatDxe/Fat.inf
- INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
-
- #
- # UEFI application (Shell Embedded Boot Loader)
- #
- INF EmbeddedPkg/Ebl/Ebl.inf
-
-
- #
- # Bds
- #
- INF ArmEbPkg/Bds/Bds.inf
-
-
-[FV.FVMAIN_COMPACT]
-FvAlignment = 8
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-
- INF ArmEbPkg/Sec/Sec.inf
-
- FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
- SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
- SECTION FV_IMAGE = FVMAIN
- }
- }
-
-
-################################################################################
-#
-# Rules are use with the [FV] section's module INF type to define
-# how an FFS file is created for a given INF file. The following Rule are the default
-# rules for the different module type. User can add the customized rules to define the
-# content of the FFS file.
-#
-################################################################################
-
-
-############################################################################
-# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
-############################################################################
-#
-#[Rule.Common.DXE_DRIVER]
-# FILE DRIVER = $(NAMED_GUID) {
-# DXE_DEPEX DXE_DEPEX Optional |.depex
-# COMPRESS PI_STD {
-# GUIDED {
-# PE32 PE32 |.efi
-# UI STRING="$(MODULE_NAME)" Optional
-# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
-# }
-# }
-# }
-#
-############################################################################
-
-[Rule.Common.SEC]
- FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
- TE TE Align = 8 |.efi
- }
-
-[Rule.Common.PEI_CORE]
- FILE PEI_CORE = $(NAMED_GUID) {
- TE TE |.efi
- UI STRING ="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.PEIM]
- FILE PEIM = $(NAMED_GUID) {
- PEI_DEPEX PEI_DEPEX Optional |.depex
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.PEIM.TIANOCOMPRESSED]
- FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
- PEI_DEPEX PEI_DEPEX Optional |.depex
- GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- }
- }
-
-[Rule.Common.DXE_CORE]
- FILE DXE_CORE = $(NAMED_GUID) {
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-
-[Rule.Common.UEFI_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional |.depex
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.DXE_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional |.depex
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-[Rule.Common.DXE_RUNTIME_DRIVER]
- FILE DRIVER = $(NAMED_GUID) {
- DXE_DEPEX DXE_DEPEX Optional |.depex
- PE32 PE32 |.efi
- UI STRING="$(MODULE_NAME)" Optional
- }
-
-
-[Rule.Common.UEFI_APPLICATION]
- FILE APPLICATION = $(NAMED_GUID) {
- UI STRING ="$(MODULE_NAME)" Optional
- PE32 PE32 |.efi
- }
+++ /dev/null
-\r
-#/** @file\r
-# \r
-# Component discription file for Bds module\r
-# \r
-# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# \r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-# \r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmEbBds\r
- FILE_GUID = B404835D-EB9F-41c6-BE0C-C815B4FE3437\r
- MODULE_TYPE = DXE_DRIVER\r
- VERSION_STRING = 1.0\r
-\r
- ENTRY_POINT = BdsInitialize\r
-\r
-[Sources.common]\r
- BdsEntry.c\r
- FirmwareVolume.c\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
-\r
-[LibraryClasses]\r
- DevicePathLib\r
- BaseLib\r
- HobLib\r
- UefiRuntimeServicesTableLib\r
- ReportStatusCodeLib\r
- PerformanceLib\r
- DxeServicesTableLib\r
- MemoryAllocationLib\r
- UefiLib\r
- UefiBootServicesTableLib\r
- BaseMemoryLib\r
- DebugLib\r
- PrintLib\r
- UefiDriverEntryPoint\r
-\r
-[Guids]\r
- \r
-\r
-[Protocols]\r
- gEfiBdsArchProtocolGuid \r
- gEfiSimpleTextInProtocolGuid \r
- gEfiSimpleTextOutProtocolGuid \r
- gEfiSerialIoProtocolGuid \r
- gEfiDevicePathProtocolGuid\r
- gEfiSimpleFileSystemProtocolGuid\r
- gEfiUsbIoProtocolGuid\r
- gEfiFirmwareVolume2ProtocolGuid\r
-\r
-\r
-[FeaturePcd] \r
-\r
-[FixedPcd]\r
- gEmbeddedTokenSpaceGuid.PcdPrePiStackSize\r
-\r
-[Depex]\r
- TRUE\r
+++ /dev/null
-/** @file\r
- The entry of the embedded BDS. This BDS does not follow the Boot Manager requirements \r
- of the UEFI specification as it is designed to implement an embedded systmes \r
- propriatary boot scheme.\r
-\r
- This template assume a DXE driver produces a SerialIo protocol not using the EFI \r
- driver module and it will attempt to connect a console on top of this.\r
-\r
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include "BdsEntry.h"\r
-\r
-\r
-BOOLEAN gConsolePresent = FALSE;\r
-\r
-\r
-EFI_HANDLE mBdsImageHandle = NULL;\r
-EFI_BDS_ARCH_PROTOCOL gBdsProtocol = {\r
- BdsEntry,\r
-};\r
-\r
-\r
- \r
- \r
-/**\r
- This function uses policy data from the platform to determine what operating \r
- system or system utility should be loaded and invoked. This function call \r
- also optionally make the use of user input to determine the operating system \r
- or system utility to be loaded and invoked. When the DXE Core has dispatched \r
- all the drivers on the dispatch queue, this function is called. This \r
- function will attempt to connect the boot devices required to load and invoke \r
- the selected operating system or system utility. During this process, \r
- additional firmware volumes may be discovered that may contain addition DXE \r
- drivers that can be dispatched by the DXE Core. If a boot device cannot be \r
- fully connected, this function calls the DXE Service Dispatch() to allow the \r
- DXE drivers from any newly discovered firmware volumes to be dispatched. \r
- Then the boot device connection can be attempted again. If the same boot \r
- device connection operation fails twice in a row, then that boot device has \r
- failed, and should be skipped. This function should never return.\r
-\r
- @param This The EFI_BDS_ARCH_PROTOCOL instance.\r
-\r
- @return None.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-BdsEntry (\r
- IN EFI_BDS_ARCH_PROTOCOL *This\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINTN NoHandles;\r
- EFI_HANDLE *Buffer;\r
- EFI_HANDLE FvHandle;\r
- EFI_HANDLE ImageHandle;\r
- EFI_HANDLE UsbDeviceHandle;\r
- EFI_GUID NameGuid;\r
- UINTN Size;\r
- UINTN HandleCount;\r
- UINTN OldHandleCount;\r
- EFI_HANDLE *HandleBuffer;\r
- UINTN Index;\r
- EFI_DEVICE_PATH_PROTOCOL *LoadImageDevicePath;\r
- EFI_DEVICE_PATH_PROTOCOL *FileSystemDevicePath;\r
- \r
- PERF_END (NULL, "DXE", NULL, 0);\r
- PERF_START (NULL, "BDS", NULL, 0);\r
-\r
-\r
- //\r
- // Now do the EFI stuff\r
- //\r
- Size = 0x100;\r
- gST->FirmwareVendor = AllocateRuntimePool (Size);\r
- ASSERT (gST->FirmwareVendor != NULL);\r
- \r
- UnicodeSPrint (gST->FirmwareVendor, Size, L"BeagleBoard EFI %a %a", __DATE__, __TIME__);\r
-\r
- //\r
- // Now we need to setup the EFI System Table with information about the console devices.\r
- // This code is normally in the console spliter driver on platforms that support multiple \r
- // consoles at the same time\r
- //\r
- Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiSimpleTextOutProtocolGuid, NULL, &NoHandles, &Buffer);\r
- if (!EFI_ERROR (Status)) {\r
- // Use the first SimpleTextOut we find and update the EFI System Table\r
- gST->ConsoleOutHandle = Buffer[0];\r
- gST->StandardErrorHandle = Buffer[0];\r
- Status = gBS->HandleProtocol (Buffer[0], &gEfiSimpleTextOutProtocolGuid, (VOID **)&gST->ConOut);\r
- ASSERT_EFI_ERROR (Status);\r
- \r
- gST->StdErr = gST->ConOut;\r
- \r
- gST->ConOut->OutputString (gST->ConOut, L"BDS: Console Started!!!!\n\r");\r
- FreePool (Buffer);\r
- \r
- gConsolePresent = TRUE;\r
- } \r
- \r
-\r
- Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiSimpleTextInProtocolGuid, NULL, &NoHandles, &Buffer);\r
- if (!EFI_ERROR (Status)) {\r
- // Use the first SimpleTextIn we find and update the EFI System Table\r
- gST->ConsoleInHandle = Buffer[0];\r
- Status = gBS->HandleProtocol (Buffer[0], &gEfiSimpleTextInProtocolGuid, (VOID **)&gST->ConIn);\r
- ASSERT_EFI_ERROR (Status);\r
- \r
- FreePool (Buffer);\r
- }\r
-\r
- //\r
- // We now have EFI Consoles up and running. Print () will work now. DEBUG () and ASSERT () worked \r
- // prior to this point as they were configured to use a more primative output scheme.\r
- //\r
-\r
- //\r
- //Perform Connect\r
- //\r
- HandleCount = 0;\r
- while (1) {\r
- OldHandleCount = HandleCount;\r
- Status = gBS->LocateHandleBuffer (\r
- AllHandles,\r
- NULL,\r
- NULL,\r
- &HandleCount,\r
- &HandleBuffer\r
- );\r
- if (EFI_ERROR (Status)) {\r
- break;\r
- }\r
- \r
- if (HandleCount == OldHandleCount) {\r
- break;\r
- }\r
-\r
- for (Index = 0; Index < HandleCount; Index++) {\r
- gBS->ConnectController (HandleBuffer[Index], NULL, NULL, TRUE);\r
- }\r
- }\r
-\r
- EfiSignalEventReadyToBoot ();\r
-\r
- //Locate handles for SimpleFileSystem protocol\r
- Status = gBS->LocateHandleBuffer (\r
- ByProtocol,\r
- &gEfiSimpleFileSystemProtocolGuid,\r
- NULL,\r
- &HandleCount,\r
- &HandleBuffer\r
- );\r
- if (!EFI_ERROR(Status)) {\r
- for (Index = 0; Index < HandleCount; Index++) {\r
- //Get the device path\r
- FileSystemDevicePath = DevicePathFromHandle(HandleBuffer[Index]);\r
- if (FileSystemDevicePath == NULL) {\r
- continue;\r
- }\r
-\r
- //Check if UsbIo is on any handles in the device path.\r
- Status = gBS->LocateDevicePath(&gEfiUsbIoProtocolGuid, &FileSystemDevicePath, &UsbDeviceHandle);\r
- if (EFI_ERROR(Status)) {\r
- continue;\r
- }\r
-\r
- //Check if Usb stick has a magic EBL file.\r
- LoadImageDevicePath = FileDevicePath(HandleBuffer[Index], L"Ebl.efi");\r
- Status = gBS->LoadImage (TRUE, gImageHandle, LoadImageDevicePath, NULL, 0, &ImageHandle);\r
- if (EFI_ERROR(Status)) {\r
- continue;\r
- }\r
-\r
- //Boot to Shell on USB stick.\r
- Status = gBS->StartImage (ImageHandle, NULL, NULL);\r
- if (EFI_ERROR(Status)) {\r
- continue;\r
- }\r
- }\r
- }\r
- \r
- //\r
- // Normal UEFI behavior is to process Globally Defined Variables as defined in Chapter 3 \r
- // (Boot Manager) of the UEFI specification. For this embedded system we don't do this.\r
- //\r
-\r
- //\r
- // Search all the FVs for an application with a UI Section of Ebl. A .FDF file can be used\r
- // to control the names of UI sections in an FV.\r
- //\r
- Status = FindApplicationMatchingUiSection (L"Ebl", &FvHandle, &NameGuid);\r
- if (!EFI_ERROR (Status)) {\r
-\r
- //Boot to Shell.\r
- Status = LoadPeCoffSectionFromFv (FvHandle, &NameGuid);\r
-\r
- if (EFI_ERROR(Status)) {\r
- DEBUG((EFI_D_ERROR, "Boot from Shell failed. Status: %r\n", Status));\r
- }\r
- }\r
-\r
- //\r
- // EFI does not define the behaviour if all boot attemps fail and the last one returns. \r
- // So we make a policy choice to reset the system since this BDS does not have a UI.\r
- //\r
- gRT->ResetSystem (EfiResetShutdown, Status, 0, NULL);\r
-\r
- return ;\r
-}\r
-\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-BdsInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- EFI_STATUS Status;\r
-\r
- mBdsImageHandle = ImageHandle;\r
-\r
- //\r
- // Install protocol interface\r
- //\r
- Status = gBS->InstallMultipleProtocolInterfaces (\r
- &mBdsImageHandle,\r
- &gEfiBdsArchProtocolGuid, &gBdsProtocol,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- return Status;\r
-}\r
-\r
-\r
+++ /dev/null
-/** @file\r
-\r
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef __BDS_ENTRY_H__\r
-#define __BDS_ENTRY_H__\r
-\r
-#include <PiDxe.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PrintLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/DxeServicesTableLib.h>\r
-#include <Library/UefiRuntimeServicesTableLib.h>\r
-#include <Library/HobLib.h>\r
-#include <Library/DevicePathLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/PrintLib.h>\r
-#include <Library/PerformanceLib.h>\r
-\r
-#include <Protocol/Bds.h>\r
-#include <Protocol/SerialIo.h>\r
-#include <Protocol/FirmwareVolume2.h>\r
-#include <Protocol/SimpleTextIn.h>\r
-#include <Protocol/SimpleTextOut.h>\r
-#include <Protocol/EmbeddedDevice.h>\r
-#include <Protocol/DevicePath.h>\r
-#include <Protocol/SimpleFileSystem.h>\r
-#include <Protocol/UsbIo.h>\r
-\r
-\r
-EFI_STATUS\r
-LoadPeCoffSectionFromFv (\r
- IN EFI_HANDLE FvHandle, \r
- IN EFI_GUID *NameGuid\r
- );\r
-\r
-EFI_STATUS\r
-FindApplicationMatchingUiSection (\r
- IN CHAR16 *UiString,\r
- OUT EFI_HANDLE *FvHandle,\r
- OUT EFI_GUID *NameGuid\r
- );\r
-\r
-VOID\r
-EFIAPI\r
-BdsEntry (\r
- IN EFI_BDS_ARCH_PROTOCOL *This\r
- );\r
-\r
-#endif\r
-\r
+++ /dev/null
-/** @file\r
- The entry of the embedded BDS. This BDS does not follow the Boot Manager requirements \r
- of the UEFI specification as it is designed to implement an embedded systmes \r
- propriatary boot scheme.\r
-\r
- This template assume a DXE driver produces a SerialIo protocol not using the EFI \r
- driver module and it will attempt to connect a console on top of this.\r
-\r
- \r
- Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include "BdsEntry.h"\r
-\r
-\r
-EFI_STATUS\r
-FindApplicationMatchingUiSection (\r
- IN CHAR16 *UiString,\r
- OUT EFI_HANDLE *FvHandle,\r
- OUT EFI_GUID *NameGuid\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_STATUS NextStatus;\r
- UINTN NoHandles;\r
- EFI_HANDLE *Buffer;\r
- UINTN Index;\r
- EFI_FV_FILETYPE FileType;\r
- EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;\r
- VOID *Key;\r
- EFI_FV_FILE_ATTRIBUTES Attributes;\r
- UINTN Size;\r
- UINTN UiStringLen;\r
- CHAR16 *UiSection;\r
- UINT32 Authentication;\r
- \r
- \r
- UiStringLen = 0;\r
- if (UiString != NULL) {\r
- DEBUG ((DEBUG_ERROR, "UiString %s\n", UiString));\r
- UiStringLen = StrLen (UiString);\r
- }\r
- \r
- Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiFirmwareVolume2ProtocolGuid, NULL, &NoHandles, &Buffer);\r
- if (!EFI_ERROR (Status)) {\r
- for (Index = 0; Index < NoHandles; Index++) {\r
- Status = gBS->HandleProtocol (Buffer[Index], &gEfiFirmwareVolume2ProtocolGuid, (VOID **)&Fv);\r
- if (!EFI_ERROR (Status)) {\r
- Key = AllocatePool (Fv->KeySize);\r
- ASSERT (Key != NULL);\r
- ZeroMem (Key, Fv->KeySize);\r
- \r
- FileType = EFI_FV_FILETYPE_APPLICATION;\r
- \r
- do {\r
- NextStatus = Fv->GetNextFile (Fv, Key, &FileType, NameGuid, &Attributes, &Size);\r
- if (!EFI_ERROR (NextStatus)) {\r
- if (UiString == NULL) {\r
- //\r
- // If UiString is NULL match first application we find.\r
- //\r
- *FvHandle = Buffer[Index];\r
- FreePool (Key);\r
- return Status;\r
- }\r
- \r
- UiSection = NULL;\r
- Status = Fv->ReadSection (\r
- Fv, \r
- NameGuid, \r
- EFI_SECTION_USER_INTERFACE, \r
- 0,\r
- (VOID **)&UiSection,\r
- &Size,\r
- &Authentication\r
- );\r
- if (!EFI_ERROR (Status)) {\r
- if (StrnCmp (UiString, UiSection, UiStringLen) == 0) {\r
- //\r
- // We found a UiString match. \r
- //\r
- *FvHandle = Buffer[Index];\r
- FreePool (Key);\r
- FreePool (UiSection);\r
- return Status;\r
- }\r
- FreePool (UiSection);\r
- }\r
- }\r
- } while (!EFI_ERROR (NextStatus));\r
- \r
- FreePool (Key);\r
- }\r
- }\r
- \r
- FreePool (Buffer);\r
- }\r
-\r
- return EFI_NOT_FOUND;\r
-}\r
-\r
-\r
-EFI_DEVICE_PATH *\r
-FvFileDevicePath (\r
- IN EFI_HANDLE FvHandle,\r
- IN EFI_GUID *NameGuid\r
- )\r
-{ \r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
- MEDIA_FW_VOL_FILEPATH_DEVICE_PATH NewNode;\r
-\r
- DevicePath = DevicePathFromHandle (FvHandle);\r
-\r
- EfiInitializeFwVolDevicepathNode (&NewNode, NameGuid);\r
- \r
- return AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&NewNode);\r
-}\r
-\r
-\r
-\r
-EFI_STATUS\r
-LoadPeCoffSectionFromFv (\r
- IN EFI_HANDLE FvHandle, \r
- IN EFI_GUID *NameGuid\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
- EFI_HANDLE ImageHandle;\r
-\r
- DevicePath = FvFileDevicePath (FvHandle, NameGuid);\r
- \r
- Status = gBS->LoadImage (TRUE, gImageHandle, DevicePath, NULL, 0, &ImageHandle);\r
- if (!EFI_ERROR (Status)) {\r
- PERF_END (NULL, "BDS", NULL, 0);\r
- Status = gBS->StartImage (ImageHandle, NULL, NULL);\r
- }\r
- \r
- return Status;\r
-}\r
- \r
+++ /dev/null
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-error = continue
-unload
-error = abort
-
-setreg @CP15_CONTROL = 0x0005107E
-setreg @pc=0x80008208
-setreg @cpsr=0x000000D3
-dis/D
-readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000
-
+++ /dev/null
-#!/bin/sh\r
-#\r
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-# \r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http:#opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-\r
-\r
-IN=`/usr/bin/cygpath -u $1`\r
-OUT=`/usr/bin/cygpath -u $2`\r
-\r
-/usr/bin/sed -e "s/\/cygdrive\/\(.\)/load\/a\/ni\/np \"\1:/g" \\r
- -e 's:\\:/:g' \\r
- -e "s/^/load\/a\/ni\/np \"/g" \\r
- -e "s/dll /dll\" \&/g" \\r
- $IN | /usr/bin/sort.exe --key=3 --output=$OUT\r
-\r
+++ /dev/null
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-
-error = continue
-unload
-error = abort
-
-setreg @CP15_CONTROL = 0x0005107E
-setreg @cpsr=0x000000D3
-
-; General clock settings.
-setmem /32 0x48307270=0x00000080
-setmem /32 0x48306D40=0x00000003
-setmem /32 0x48005140=0x03020A50
-
-;Clock configuration
-setmem /32 0x48004A40=0x0000030A
-setmem /32 0x48004C40=0x00000015
-
-;DPLL3 (Core) settings
-setmem /32 0x48004D00=0x00370037
-setmem /32 0x48004D30=0x00000000
-setmem /32 0x48004D40=0x094C0C00
-
-;DPLL4 (Peripheral) settings
-setmem /32 0x48004D00=0x00370037
-setmem /32 0x48004D30=0x00000000
-setmem /32 0x48004D44=0x0001B00C
-setmem /32 0x48004D48=0x00000009
-
-;DPLL1 (MPU) settings
-setmem /32 0x48004904=0x00000037
-setmem /32 0x48004934=0x00000000
-setmem /32 0x48004940=0x0011F40C
-setmem /32 0x48004944=0x00000001
-setmem /32 0x48004948=0x00000000
-
-;RAM setup.
-setmem /16 0x6D000010=0x0000
-setmem /16 0x6D000040=0x0001
-setmem /16 0x6D000044=0x0100
-setmem /16 0x6D000048=0x0000
-setmem /32 0x6D000060=0x0000000A
-setmem /32 0x6D000070=0x00000081
-setmem /16 0x6D000040=0x0003
-setmem /32 0x6D000080=0x02D04011
-setmem /16 0x6D000084=0x0032
-setmem /16 0x6D00008C=0x0000
-setmem /32 0x6D00009C=0xBA9DC4C6
-setmem /32 0x6D0000A0=0x00012522
-setmem /32 0x6D0000A4=0x0004E201
-setmem /16 0x6D000040=0x0003
-setmem /32 0x6D0000B0=0x02D04011
-setmem /16 0x6D0000B4=0x0032
-setmem /16 0x6D0000BC=0x0000
-setmem /32 0x6D0000C4=0xBA9DC4C6
-setmem /32 0x6D0000C8=0x00012522
-setmem /32 0x6D0000D4=0x0004E201
\ No newline at end of file
+++ /dev/null
-//\r
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-// \r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-\r
-include 'ZZZZZZ/rvi_symbols_macros.inc'\r
-\r
-macro write_symbols_file("ZZZZZZ/rvi_symbols.tmp", 0x00000000, 0x10000000)\r
-\r
-host "bash -o igncr ZZZZZZ/rvi_convert_symbols.sh ZZZZZZ/rvi_symbols.tmp ZZZZZZ/rvi_symbols.inc"\r
-include 'ZZZZZZ/rvi_symbols.inc'\r
-load /NI /NP 'ZZZZZZ/rvi_dummy.axf' ;.constdata\r
-unload rvi_dummy.axf\r
-delfile rvi_dummy.axf\r
-\r
-\r
+++ /dev/null
-//\r
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-// \r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-\r
-define /R int compare_guid(guid1, guid2)\r
- unsigned char *guid1;\r
- unsigned char *guid2;\r
-{\r
- return strncmp(guid1, guid2, 16);\r
-}\r
-.\r
-\r
-define /R unsigned char * find_system_table(mem_start, mem_size)\r
- unsigned char *mem_start;\r
- unsigned long mem_size;\r
-{\r
- unsigned char *mem_ptr;\r
- \r
- mem_ptr = mem_start + mem_size;\r
- \r
- do\r
- {\r
- mem_ptr -= 0x400000; // 4 MB\r
- \r
- if (strncmp(mem_ptr, "IBI SYST", 8) == 0)\r
- {\r
- return *(unsigned long *)(mem_ptr + 8); // EfiSystemTableBase\r
- } \r
- \r
- } while (mem_ptr > mem_start);\r
- \r
- return 0;\r
-}\r
-.\r
-\r
-define /R unsigned char * find_debug_info_table_header(system_table)\r
- unsigned char *system_table;\r
-{\r
- unsigned long configuration_table_entries;\r
- unsigned char *configuration_table;\r
- unsigned long index;\r
- unsigned char debug_table_guid[16];\r
- \r
- // Fill in the debug table's guid\r
- debug_table_guid[ 0] = 0x77;\r
- debug_table_guid[ 1] = 0x2E;\r
- debug_table_guid[ 2] = 0x15;\r
- debug_table_guid[ 3] = 0x49;\r
- debug_table_guid[ 4] = 0xDA;\r
- debug_table_guid[ 5] = 0x1A;\r
- debug_table_guid[ 6] = 0x64;\r
- debug_table_guid[ 7] = 0x47;\r
- debug_table_guid[ 8] = 0xB7;\r
- debug_table_guid[ 9] = 0xA2;\r
- debug_table_guid[10] = 0x7A;\r
- debug_table_guid[11] = 0xFE;\r
- debug_table_guid[12] = 0xFE;\r
- debug_table_guid[13] = 0xD9;\r
- debug_table_guid[14] = 0x5E;\r
- debug_table_guid[15] = 0x8B;\r
- \r
- configuration_table_entries = *(unsigned long *)(system_table + 64);\r
- configuration_table = *(unsigned long *)(system_table + 68);\r
- \r
- for (index = 0; index < configuration_table_entries; index++)\r
- {\r
- if (compare_guid(configuration_table, debug_table_guid) == 0)\r
- {\r
- return *(unsigned long *)(configuration_table + 16);\r
- }\r
- \r
- configuration_table += 20;\r
- }\r
- \r
- return 0;\r
-}\r
-.\r
-\r
-define /R int valid_pe_header(header)\r
- unsigned char *header;\r
-{\r
- if ((header[0x00] == 'M') &&\r
- (header[0x01] == 'Z') &&\r
- (header[0x80] == 'P') &&\r
- (header[0x81] == 'E'))\r
- {\r
- return 1;\r
- }\r
- \r
- return 0;\r
-}\r
-.\r
-\r
-define /R unsigned long pe_headersize(header)\r
- unsigned char *header;\r
-{\r
- unsigned long *size;\r
- \r
- size = header + 0x00AC;\r
- \r
- return *size;\r
-}\r
-.\r
-\r
-define /R unsigned char *pe_filename(header)\r
- unsigned char *header;\r
-{\r
- unsigned long *debugOffset;\r
- unsigned char *stringOffset;\r
- \r
- if (valid_pe_header(header))\r
- {\r
- debugOffset = header + 0x0128;\r
- stringOffset = header + *debugOffset + 0x002C;\r
- \r
- return stringOffset;\r
- }\r
- \r
- return 0;\r
-}\r
-.\r
-\r
-define /R int char_is_valid(c)\r
- unsigned char c;\r
-{\r
- if (c >= 32 && c < 127)\r
- return 1;\r
-\r
- return 0;\r
-}\r
-.\r
-\r
-define /R write_symbols_file(filename, mem_start, mem_size)\r
- unsigned char *filename;\r
- unsigned char *mem_start;\r
- unsigned long mem_size; \r
-{\r
- unsigned char *system_table;\r
- unsigned char *debug_info_table_header;\r
- unsigned char *debug_info_table;\r
- unsigned long debug_info_table_size;\r
- unsigned long index;\r
- unsigned char *debug_image_info;\r
- unsigned char *loaded_image_protocol;\r
- unsigned char *image_base;\r
- unsigned char *debug_filename;\r
- unsigned long header_size;\r
- int status;\r
- \r
- system_table = find_system_table(mem_start, mem_size);\r
- if (system_table == 0)\r
- {\r
- return;\r
- }\r
- \r
- status = fopen(88, filename, "w");\r
- \r
- debug_info_table_header = find_debug_info_table_header(system_table);\r
- \r
- debug_info_table = *(unsigned long *)(debug_info_table_header + 8);\r
- debug_info_table_size = *(unsigned long *)(debug_info_table_header + 4);\r
- \r
- for (index = 0; index < (debug_info_table_size * 4); index += 4)\r
- {\r
- debug_image_info = *(unsigned long *)(debug_info_table + index); \r
- \r
- if (debug_image_info == 0)\r
- {\r
- break;\r
- }\r
- \r
- loaded_image_protocol = *(unsigned long *)(debug_image_info + 4);\r
- \r
- image_base = *(unsigned long *)(loaded_image_protocol + 32);\r
- \r
- debug_filename = pe_filename(image_base);\r
- header_size = pe_headersize(image_base);\r
- \r
- $fprintf 88, "%s 0x%08x\n", debug_filename, image_base + header_size$;\r
- }\r
- \r
- \r
- fclose(88);\r
-}\r
-.\r
-\r
+++ /dev/null
-//\r
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-// \r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-\r
-error = continue\r
-\r
-unload\r
-\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-delfile 1\r
-\r
-error = abort\r
+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
---*/\r
-\r
-#ifndef __ARM_EB_H__\r
-#define __ARM_EB_H__\r
-\r
-#include <ArmEb/ArmEbUart.h>\r
-#include <ArmEb/ArmEbTimer.h>\r
-\r
-///\r
-/// ARM EB Memory Map\r
-///\r
-// 0x00000000 - 0x0FFFFFFF SDRAM 256MB\r
-// 0x10000000 - 0x100FFFFF System FPGA (config registers) 1MB\r
-// 0x10000000\960x10000FFF 4KB System registers \r
-// 0x10001000\960x10001FFF 4KB System controller \r
-// 0x10002000\960x10002FFF 4KB Two-Wire Serial Bus Interface \r
-// 0x10003000\960x10003FFF 4KB Reserved \r
-// 0x10004000\960x10004FFF 4KB Advanced Audio CODEC Interface \r
-// 0x10005000\960x10005FFF 4KB MultiMedia Card Interface (MCI) \r
-// 0x10006000\960x10006FFF 4KB Keyboard/Mouse Interface 0 \r
-// 0x10007000\960x10007FFF 4KB Keyboard/Mouse Interface 1 \r
-// 0x10008000\960x10008FFF 4KB Character LCD Interface \r
-// 0x10009000\960x10009FFF 4KB UART 0 Interface \r
-// 0x1000A000\960x1000AFFF 4KB UART 1 Interface \r
-// 0x1000B000\960x1000BFFF 4KB UART 2 Interface \r
-// 0x1000C000\960x1000CFFF 4KB UART 3 Interface \r
-// 0x1000D000\960x1000DFFF 4KB Synchronous Serial Port Interface \r
-// 0x1000E000\960x1000EFFF 4KB Smart Card Interface \r
-// 0x1000F000\960x1000FFFF 4KB Reserved \r
-// 0x10010000\960x10010FFF 4KB Watchdog Interface \r
-// 0x10011000\960x10011FFF 4KB Timer modules 0 and 1 interface (Timer 1 starts at 0x10011020)\r
-// 0x10012000\960x10012FFF 4KB Timer modules 2 and 3 interface (Timer 3 starts at 0x10012020)\r
-// 0x10013000\960x10013FFF 4KB GPIO Interface 0 \r
-// 0x10014000\960x10014FFF 4KB GPIO Interface 1 \r
-// 0x10015000\960x10015FFF 4KB GPIO Interface 2 (miscellaneous onboard I/O) \r
-// 0x10016000\960x10016FFF 4KB Reserved \r
-// 0x10017000\960x10017FFF 4KB Real Time Clock Interface \r
-// 0x10018000\960x10018FFF 4KB Dynamic Memory Controller configuration \r
-// 0x10019000\960x10019FFF 4KB PCI controller configuration registers \r
-// 0x1001A000\960x1001FFFF 24KB Reserved \r
-// 0x10020000\960x1002FFFF 64KB Color LCD Controller \r
-// 0x10030000\960x1003FFFF 64KB DMA Controller configuration registers \r
-// 0x10040000\960x1004FFFF 64KB Generic Interrupt Controller 1 (nIRQ for tile 1) \r
-// 0x10050000\960x1005FFFF 64KB Generic Interrupt Controller 2 (nFIQ for tile 1) \r
-// 0x10060000\960x1006FFFF 64KB Generic Interrupt Controller 3 (nIRQ for tile 2) \r
-// 0x10070000\960x1007FFFF 64KB Generic Interrupt Controller 4 (nFIQ for tile 2) \r
-// 0x10080000\960x1008FFFF 64KB Static Memory Controller configuration registers \r
-// 0x100A0000\960x100EFFFF 448MB Reserved \r
-// 0x10090000\960x100FFFFF 64KB Debug Access Port (DAP) \r
-// 0x10100000 - 0x100FFFFF Reserved 3MB\r
-// 0x10400000 - 0x17FFFFFF System FPGA 124MB\r
-// 0x18000000 - 0x1FFFFFFF Logic Tile 1 128MB\r
-// 0x20000000 - 0x3FFFFFFF Reserved 512MB\r
-// 0x40000000 - 0x7FFFFFFF System FPGA 1GB\r
-// 0x40000000\960x43FFFFFF CS0 NOR flash (nNOR_CS1) \r
-// 0x44000000\960x47FFFFFF CS1 NOR flash (nNOR_CS2) \r
-// 0x48000000\960x4BFFFFFF CS2 SRAM (nSRAMCS) \r
-// 0x4C000000\960x4DFFFFFF CS3 Config flash \r
-// 0x4E000000\960x4EFFFFFF Ethernet \r
-// 0x4F000000\960x4FFFFFFF USB \r
-// 0x50000000\960x53FFFFFF CS4 (nEXPCS) PISMO (nCS0) \r
-// 0x54000000\960x57FFFFFF CS5 (nSTATICCS4) PISMO (nCS1) \r
-// 0x58000000\960x5BFFFFFF CS6 (nSTATICCS5) PISMO (nCS2) \r
-// 0x5C000000\960x5FFFFFFF CS7 (nSTATICCS6) PISMO (nCS3) \r
-// 0x61000000\960x61FFFFFF PCI SelfCfg window \r
-// 0x62000000\960x62FFFFFF PCI Cfg window \r
-// 0x63000000\960x63FFFFFF PCI I/O window\r
-// 0x64000000\960x67FFFFFF PCI memory window 0 \r
-// 0x68000000\960x6BFFFFFF PCI memory window 1 \r
-// 0x6C000000\960x6FFFFFFF PCI memory window 2 \r
-// 0x70000000 - 0x7FFFFFFF DRAM Mirror\r
-// 0x80000000 - 0xFFFFFFFF Logic Tile site 2 2GB\r
-\r
-//\r
-// At reset EB_DRAM_BASE is alaised to EB_CS0_NOR_BASE\r
-//\r
-#define EB_DRAM_BASE 0x00000000 // 256 MB DRAM\r
-#define EB_CONFIG_BASE 0x10000000\r
-\r
-#define EB_CSO_NOR_BASE 0x40000000 // 64 MB NOR FLASH\r
-#define EB_CS1_NOR_BASE 0x44000000 // 64 MB NOR FLASH\r
-#define EB_CS2_SRAM 0x48000000 // 2 MB of SRAM\r
-#define EB_CS3_CONFIG_FLASH 0x4c000000 // 8 MB Config FLASH for FPGA. Not to be used by application code\r
-#define EB_CS3_ETHERNET 0x4e000000 // 16 MB Ethernet controller\r
-#define EB_CS4_PISMO_CS0 0x50000000 // Expansion CS0\r
-#define EB_CS5_PISMO_CS0 0x54000000 // Expansion CS0\r
-#define EB_CS6_PISMO_CS0 0x58000000 // Expansion CS0\r
-\r
-#define EB_DRAM_REMAP_BASE 0x70000000 // if REMAPSTAT is HIGH alais of EB_DRAM_BASE\r
-\r
-#endif \r
+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
-Module Name:\r
-\r
- Timer.h\r
-\r
-Abstract:\r
-\r
- Driver implementing the EFI 2.0 timer protocol using the ARM SP804 timer.\r
-\r
---*/\r
-\r
-#ifndef _TIMER_SP804_H__\r
-#define _TIMER_SP804_H__\r
-\r
-\r
-\r
-// EB board constants\r
-#define EB_SP810_CTRL_BASE 0x10001000\r
-#define EB_SP804_TIMER0_BASE 0x10011000\r
-#define EB_SP804_TIMER1_BASE 0x10011020\r
-#define EB_SP804_TIMER2_BASE 0x10012000\r
-#define EB_SP804_TIMER3_BASE 0x10012020\r
-\r
-#define EB_TIMER01_INTERRUPT_NUM 36\r
-#define EB_TIMER23_INTERRUPT_NUM 37\r
-\r
-// SP804 Timer constants\r
-#define SP804_TIMER_LOAD_REG 0x00\r
-#define SP804_TIMER_CURRENT_REG 0x04\r
-#define SP804_TIMER_CONTROL_REG 0x08\r
-#define SP804_TIMER_INT_CLR_REG 0x0C\r
-#define SP804_TIMER_RAW_INT_STS_REG 0x10\r
-#define SP804_TIMER_MSK_INT_STS_REG 0x14\r
-#define SP804_TIMER_BG_LOAD_REG 0x18\r
-\r
-// Timer control register bit definitions\r
-#define SP804_TIMER_CTRL_ONESHOT BIT0\r
-#define SP804_TIMER_CTRL_32BIT BIT1\r
-#define SP804_TIMER_CTRL_PRESCALE_MASK (BIT3|BIT2)\r
-#define SP804_PRESCALE_DIV_1 0\r
-#define SP804_PRESCALE_DIV_16 BIT2\r
-#define SP804_PRESCALE_DIV_256 BIT3\r
-#define SP804_TIMER_CTRL_INT_ENABLE BIT5\r
-#define SP804_TIMER_CTRL_PERIODIC BIT6\r
-#define SP804_TIMER_CTRL_ENABLE BIT7\r
-\r
-// SP810 System Controller constants\r
-#define SP810_SYS_CTRL_REG 0x00\r
-#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=REFCLK, 1=TIMCLK\r
-#define SP810_SYS_CTRL_TIMER0_EN BIT16\r
-#define SP810_SYS_CTRL_TIMER1_TIMCLK BIT17 // 0=REFCLK, 1=TIMCLK\r
-#define SP810_SYS_CTRL_TIMER1_EN BIT18\r
-#define SP810_SYS_CTRL_TIMER2_TIMCLK BIT19 // 0=REFCLK, 1=TIMCLK\r
-#define SP810_SYS_CTRL_TIMER2_EN BIT20\r
-#define SP810_SYS_CTRL_TIMER3_TIMCLK BIT21 // 0=REFCLK, 1=TIMCLK\r
-#define SP810_SYS_CTRL_TIMER3_EN BIT22\r
-\r
-// default timer tick period - 1ms, or 10000 units of 100ns\r
-//#define TIMER_DEFAULT_PERIOD 10000\r
-\r
-// default timer tick period - 50ms, or 500000 units of 100ns\r
-#define TIMER_DEFAULT_PERIOD 500000\r
-\r
-// default timer tick period - 500ms, or 5000000 units of 100ns\r
-//#define TIMER_DEFAULT_PERIOD 5000000\r
-\r
-#endif\r
-\r
+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
-Portions copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
-Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
---*/\r
-\r
-#ifndef __ARM_EB_UART_H__\r
-#define __ARM_EB_UART_H__\r
-\r
-\r
-#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds\r
-\r
-\r
-// EB constants\r
-#define EB_UART1_BASE 0x10009000\r
-\r
-// PL011 Registers\r
-#define UARTDR 0x000\r
-#define UARTRSR 0x004\r
-#define UARTECR 0x004\r
-#define UARTFR 0x018\r
-#define UARTILPR 0x020\r
-#define UARTIBRD 0x024\r
-#define UARTFBRD 0x028\r
-#define UARTLCR_H 0x02C\r
-#define UARTCR 0x030\r
-#define UARTIFLS 0x034\r
-#define UARTIMSC 0x038\r
-#define UARTRIS 0x03C\r
-#define UARTMIS 0x040\r
-#define UARTICR 0x044\r
-#define UARTDMACR 0x048\r
-\r
-// If the required baud rate is 115200 and UARTCLK = 24MHz then:\r
-// Baud Rate Divisor = (24×10^6)/(16×115200) = 13.020833\r
-// This means BRDI = 13 and BRDF = 0.020833\r
-// Therefore, fractional part, m = integer(0.020833×64) = integer(1.33331) = 1\r
-// Generated baud rate divider = 13+1/64 = 13.015625\r
-// Generated baud rate = (24×10^6)/(16×13.015625) = 115246.098\r
-// Error = (115246.098-115200)/115200 × 100 = 0.04%\r
-#define UART_115200_IDIV 13\r
-#define UART_115200_FDIV 1\r
-\r
-// add more baud rates here as needed\r
-\r
-// data status bits\r
-#define UART_DATA_ERROR_MASK 0x0F00\r
-\r
-// status reg bits\r
-#define UART_STATUS_ERROR_MASK 0x0F\r
-\r
-// flag reg bits\r
-#define UART_TX_EMPTY_FLAG_MASK 0x80\r
-#define UART_RX_FULL_FLAG_MASK 0x40\r
-#define UART_TX_FULL_FLAG_MASK 0x20\r
-#define UART_RX_EMPTY_FLAG_MASK 0x10\r
-#define UART_BUSY_FLAG_MASK 0x08\r
-\r
-// control reg bits\r
-#define UART_CTSEN_CONTROL_MASK 0x8000\r
-#define UART_RTSEN_CONTROL_MASK 0x4000\r
-#define UART_RTS_CONTROL_MASK 0x0800\r
-#define UART_DTR_CONTROL_MASK 0x0400\r
-\r
-\r
-#endif \r
+++ /dev/null
-/*++\r
-\r
-Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
-Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR> \r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
-Module Name:\r
-\r
- Gic.c\r
-\r
-Abstract:\r
-\r
- Driver implementing the GIC interrupt controller protocol\r
-\r
---*/\r
-\r
-#include <PiDxe.h>\r
-\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-#include <Library/UefiLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
-\r
-#include <Protocol/Cpu.h>\r
-#include <Protocol/HardwareInterrupt.h>\r
-\r
-\r
-//\r
-// EB board definitions\r
-//\r
-#define EB_GIC1_CPU_INTF_BASE 0x10040000\r
-#define EB_GIC1_DIST_BASE 0x10041000\r
-#define EB_GIC2_CPU_INTF_BASE 0x10050000\r
-#define EB_GIC2_DIST_BASE 0x10051000\r
-#define EB_GIC3_CPU_INTF_BASE 0x10060000\r
-#define EB_GIC3_DIST_BASE 0x10061000\r
-#define EB_GIC4_CPU_INTF_BASE 0x10070000\r
-#define EB_GIC5_DIST_BASE 0x10071000\r
-\r
-// number of interrupts sources supported by each GIC on the EB\r
-#define EB_NUM_GIC_INTERRUPTS 96 \r
-\r
-// number of 32-bit registers needed to represent those interrupts as a bit\r
-// (used for enable set, enable clear, pending set, pending clear, and active regs)\r
-#define EB_NUM_GIC_REG_PER_INT_BITS (EB_NUM_GIC_INTERRUPTS / 32)\r
-\r
-// number of 32-bit registers needed to represent those interrupts as two bits\r
-// (used for configuration reg)\r
-#define EB_NUM_GIC_REG_PER_INT_CFG (EB_NUM_GIC_INTERRUPTS / 16)\r
-\r
-// number of 32-bit registers needed to represent interrupts as 8-bit priority field\r
-// (used for priority regs)\r
-#define EB_NUM_GIC_REG_PER_INT_BYTES (EB_NUM_GIC_INTERRUPTS / 4)\r
-\r
-#define GIC_DEFAULT_PRIORITY 0x80\r
-\r
-//\r
-// GIC definitions\r
-//\r
-\r
-// Distributor\r
-#define GIC_ICDDCR 0x000 // Distributor Control Register\r
-#define GIC_ICDICTR 0x004 // Interrupt Controller Type Register\r
-#define GIC_ICDIIDR 0x008 // Implementer Identification Register\r
-\r
-// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BITS (see GIC spec)\r
-#define GIC_ICDISR 0x080 // Interrupt Security Registers\r
-#define GIC_ICDISER 0x100 // Interrupt Set-Enable Registers\r
-#define GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers\r
-#define GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers\r
-#define GIC_ICDCPR 0x280 // Interrupt Clear-Pending Registers\r
-#define GIC_ICDABR 0x300 // Active Bit Registers\r
-\r
-// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BYTES\r
-#define GIC_ICDIPR 0x400 // Interrupt Priority Registers\r
-\r
-// each reg base below repeats for EB_NUM_GIC_INTERRUPTS\r
-#define GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers\r
-#define GIC_ICDICFR 0xC00 // Interrupt Configuration Registers\r
-\r
-// just one of these\r
-#define GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register\r
-\r
-\r
-// Cpu interface\r
-#define GIC_ICCICR 0x00 // CPU Interface Controler Register\r
-#define GIC_ICCPMR 0x04 // Interrupt Priority Mask Register\r
-#define GIC_ICCBPR 0x08 // Binary Point Register\r
-#define GIC_ICCIAR 0x0C // Interrupt Acknowledge Register\r
-#define GIC_ICCEIOR 0x10 // End Of Interrupt Register\r
-#define GIC_ICCRPR 0x14 // Running Priority Register\r
-#define GIC_ICCPIR 0x18 // Highest Pending Interrupt Register\r
-#define GIC_ICCABPR 0x1C // Aliased Binary Point Register\r
-#define GIC_ICCIDR 0xFC // Identification Register\r
-\r
-extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;\r
-\r
-//\r
-// Notifications\r
-//\r
-VOID *CpuProtocolNotificationToken = NULL;\r
-EFI_EVENT CpuProtocolNotificationEvent = (EFI_EVENT)NULL;\r
-EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;\r
-\r
-\r
-HARDWARE_INTERRUPT_HANDLER gRegisteredInterruptHandlers[EB_NUM_GIC_INTERRUPTS];\r
-\r
-/**\r
- Register Handler for the specified interrupt source.\r
-\r
- @param This Instance pointer for this protocol\r
- @param Source Hardware source of the interrupt\r
- @param Handler Callback for interrupt. NULL to unregister\r
-\r
- @retval EFI_SUCCESS Source was updated to support Handler.\r
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-RegisterInterruptSource (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source,\r
- IN HARDWARE_INTERRUPT_HANDLER Handler\r
- )\r
-{\r
- if (Source > EB_NUM_GIC_INTERRUPTS) {\r
- ASSERT(FALSE);\r
- return EFI_UNSUPPORTED;\r
- } \r
- \r
- if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {\r
- return EFI_ALREADY_STARTED;\r
- }\r
-\r
- gRegisteredInterruptHandlers[Source] = Handler;\r
- return This->EnableInterruptSource(This, Source);\r
-}\r
-\r
-\r
-/**\r
- Enable interrupt source Source.\r
-\r
- @param This Instance pointer for this protocol\r
- @param Source Hardware source of the interrupt\r
-\r
- @retval EFI_SUCCESS Source interrupt enabled.\r
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-EnableInterruptSource (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source\r
- )\r
-{\r
- UINT32 RegOffset;\r
- UINTN RegShift;\r
- \r
- if (Source > EB_NUM_GIC_INTERRUPTS) {\r
- ASSERT(FALSE);\r
- return EFI_UNSUPPORTED;\r
- }\r
- \r
- // calculate enable register offset and bit position\r
- RegOffset = Source / 32;\r
- RegShift = Source % 32;\r
-\r
- // write set-enable register\r
- MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset), 1 << RegShift);\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Disable interrupt source Source.\r
-\r
- @param This Instance pointer for this protocol\r
- @param Source Hardware source of the interrupt\r
-\r
- @retval EFI_SUCCESS Source interrupt disabled.\r
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-DisableInterruptSource (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source\r
- )\r
-{\r
- UINT32 RegOffset;\r
- UINTN RegShift;\r
- \r
- if (Source > EB_NUM_GIC_INTERRUPTS) {\r
- ASSERT(FALSE);\r
- return EFI_UNSUPPORTED;\r
- }\r
- \r
- // calculate enable register offset and bit position\r
- RegOffset = Source / 32;\r
- RegShift = Source % 32;\r
-\r
- // write set-enable register\r
- MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDICER+(4*RegOffset), 1 << RegShift);\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-\r
-/**\r
- Return current state of interrupt source Source.\r
-\r
- @param This Instance pointer for this protocol\r
- @param Source Hardware source of the interrupt\r
- @param InterruptState TRUE: source enabled, FALSE: source disabled.\r
-\r
- @retval EFI_SUCCESS InterruptState is valid\r
- @retval EFI_DEVICE_ERROR InterruptState is not valid\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-GetInterruptSourceState (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source,\r
- IN BOOLEAN *InterruptState\r
- )\r
-{\r
- UINT32 RegOffset;\r
- UINTN RegShift;\r
- \r
- if (Source > EB_NUM_GIC_INTERRUPTS) {\r
- ASSERT(FALSE);\r
- return EFI_UNSUPPORTED;\r
- }\r
- \r
- // calculate enable register offset and bit position\r
- RegOffset = Source / 32;\r
- RegShift = Source % 32;\r
- \r
- if ((MmioRead32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset)) & (1<<RegShift)) == 0) {\r
- *InterruptState = FALSE;\r
- } else {\r
- *InterruptState = TRUE;\r
- }\r
- \r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Signal to the hardware that the End Of Intrrupt state \r
- has been reached.\r
-\r
- @param This Instance pointer for this protocol\r
- @param Source Hardware source of the interrupt\r
-\r
- @retval EFI_SUCCESS Source interrupt EOI'ed.\r
- @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-EndOfInterrupt (\r
- IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
- IN HARDWARE_INTERRUPT_SOURCE Source\r
- )\r
-{\r
- if (Source > EB_NUM_GIC_INTERRUPTS) {\r
- ASSERT(FALSE);\r
- return EFI_UNSUPPORTED;\r
- }\r
-\r
- MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, Source);\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.\r
-\r
- @param InterruptType Defines the type of interrupt or exception that\r
- occurred on the processor.This parameter is processor architecture specific.\r
- @param SystemContext A pointer to the processor context when\r
- the interrupt occurred on the processor.\r
-\r
- @return None\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-IrqInterruptHandler (\r
- IN EFI_EXCEPTION_TYPE InterruptType,\r
- IN EFI_SYSTEM_CONTEXT SystemContext\r
- )\r
-{\r
- UINT32 GicInterrupt;\r
- HARDWARE_INTERRUPT_HANDLER InterruptHandler;\r
-\r
- GicInterrupt = MmioRead32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCIAR);\r
- if (GicInterrupt >= EB_NUM_GIC_INTERRUPTS) {\r
- MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, GicInterrupt);\r
- }\r
- \r
- InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];\r
- if (InterruptHandler != NULL) {\r
- // Call the registered interrupt handler.\r
- InterruptHandler (GicInterrupt, SystemContext);\r
- } else {\r
- DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: %x\n", GicInterrupt));\r
- }\r
-\r
- EndOfInterrupt (&gHardwareInterruptProtocol, GicInterrupt);\r
-}\r
-\r
-\r
-//\r
-// Making this global saves a few bytes in image size\r
-//\r
-EFI_HANDLE gHardwareInterruptHandle = NULL;\r
-\r
-//\r
-// The protocol instance produced by this driver\r
-//\r
-EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = {\r
- RegisterInterruptSource,\r
- EnableInterruptSource,\r
- DisableInterruptSource,\r
- GetInterruptSourceState,\r
- EndOfInterrupt\r
-};\r
-\r
-\r
-/**\r
- Shutdown our hardware\r
- \r
- DXE Core will disable interrupts and turn off the timer and disable interrupts\r
- after all the event handlers have run.\r
-\r
- @param[in] Event The Event that is being processed\r
- @param[in] Context Event Context\r
-**/\r
-VOID\r
-EFIAPI\r
-ExitBootServicesEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
- )\r
-{\r
- UINTN i;\r
- \r
- for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {\r
- DisableInterruptSource (&gHardwareInterruptProtocol, i);\r
- }\r
-}\r
-\r
-\r
-//\r
-// Notification routines\r
-//\r
-VOID\r
-CpuProtocolInstalledNotification (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_CPU_ARCH_PROTOCOL *Cpu;\r
- \r
- //\r
- // Get the cpu protocol that this driver requires.\r
- //\r
- Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);\r
- ASSERT_EFI_ERROR(Status);\r
-\r
- //\r
- // Unregister the default exception handler.\r
- //\r
- Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL);\r
- ASSERT_EFI_ERROR(Status);\r
-\r
- //\r
- // Register to receive interrupts\r
- //\r
- Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);\r
- ASSERT_EFI_ERROR(Status);\r
-}\r
-\r
-/**\r
- Initialize the state information for the CPU Architectural Protocol\r
-\r
- @param ImageHandle of the loaded driver\r
- @param SystemTable Pointer to the System Table\r
-\r
- @retval EFI_SUCCESS Protocol registered\r
- @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure\r
- @retval EFI_DEVICE_ERROR Hardware problems\r
-\r
-**/\r
-EFI_STATUS\r
-InterruptDxeInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINTN i;\r
- UINT32 RegOffset;\r
- UINTN RegShift;\r
-\r
- \r
- // Make sure the Interrupt Controller Protocol is not already installed in the system.\r
- ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);\r
-\r
- for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {\r
- DisableInterruptSource (&gHardwareInterruptProtocol, i);\r
- \r
- // Set Priority \r
- RegOffset = i / 4;\r
- RegShift = (i % 4) * 8;\r
- MmioAndThenOr32 (\r
- EB_GIC1_DIST_BASE+GIC_ICDIPR+(4*RegOffset), \r
- ~(0xff << RegShift), \r
- GIC_DEFAULT_PRIORITY << RegShift\r
- );\r
- }\r
-\r
- // configure interrupts for cpu 0\r
- for (i = 0; i < EB_NUM_GIC_REG_PER_INT_BYTES; i++) {\r
- MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICDIPTR + (i*4), 0x01010101);\r
- }\r
-\r
- // set binary point reg to 0x7 (no preemption)\r
- MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCBPR, 0x7);\r
-\r
- // set priority mask reg to 0xff to allow all priorities through\r
- MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCPMR, 0xff);\r
- \r
- // enable gic cpu interface\r
- MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCICR, 0x1);\r
-\r
- // enable gic distributor\r
- MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICCICR, 0x1);\r
-\r
- \r
- ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));\r
- \r
- Status = gBS->InstallMultipleProtocolInterfaces (\r
- &gHardwareInterruptHandle,\r
- &gHardwareInterruptProtocolGuid, &gHardwareInterruptProtocol,\r
- NULL\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- \r
- // Set up to be notified when the Cpu protocol is installed.\r
- Status = gBS->CreateEvent (EVT_NOTIFY_SIGNAL, TPL_CALLBACK, CpuProtocolInstalledNotification, NULL, &CpuProtocolNotificationEvent); \r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Status = gBS->RegisterProtocolNotify (&gEfiCpuArchProtocolGuid, CpuProtocolNotificationEvent, (VOID *)&CpuProtocolNotificationToken);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- // Register for an ExitBootServicesEvent\r
- Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- return Status;\r
-}\r
-\r
+++ /dev/null
-#/** @file\r
-# \r
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# \r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-# \r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = GicInterruptDxe\r
- FILE_GUID = A7496828-946E-43BF-97D6-AA0272001899\r
- MODULE_TYPE = DXE_DRIVER\r
- VERSION_STRING = 1.0\r
-\r
- ENTRY_POINT = InterruptDxeInitialize\r
-\r
-\r
-[Sources.common]\r
- InterruptDxe.c\r
-\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmEbPkg/ArmEbPkg.dec\r
-\r
-[LibraryClasses]\r
- BaseLib\r
- UefiLib\r
- UefiBootServicesTableLib\r
- DebugLib\r
- PrintLib\r
- UefiDriverEntryPoint\r
- IoLib\r
-\r
-[Guids]\r
- \r
-\r
-[Protocols]\r
- gHardwareInterruptProtocolGuid\r
- gEfiCpuArchProtocolGuid\r
- \r
-[FixedPcd.common]\r
- gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress\r
-\r
-[depex]\r
- TRUE\r
+++ /dev/null
-/** @file\r
- Template for ArmEb DebugAgentLib. \r
-\r
- For ARM we reserve FIQ for the Debug Agent Timer. We don't care about \r
- laytency as we only really need the timer to run a few times a second \r
- (how fast can some one type a ctrl-c?), but it works much better if\r
- the interrupt we are using to break into the debugger is not being\r
- used, and masked, by the system. \r
-\r
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Base.h>\r
-\r
-#include <Library/DebugAgentTimerLib.h>\r
-\r
-#include <ArmEb/ArmEb.h>\r
-\r
-\r
-/**\r
- Setup all the hardware needed for the debug agents timer.\r
-\r
- This function is used to set up debug enviroment. \r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-DebugAgentTimerIntialize (\r
- VOID\r
- )\r
-{\r
- // Map Timer to FIQ\r
-}\r
- \r
- \r
-/**\r
- Set the period for the debug agent timer. Zero means disable the timer.\r
-\r
- @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.\r
-\r
-**/ \r
-VOID\r
-EFIAPI\r
-DebugAgentTimerSetPeriod (\r
- IN UINT32 TimerPeriodMilliseconds\r
- )\r
-{\r
- if (TimerPeriodMilliseconds == 0) {\r
- // Disable timer and Disable FIQ\r
- return;\r
- } \r
-\r
- // Set timer period and unmask FIQ\r
-}\r
- \r
-\r
-/**\r
- Perform End Of Interrupt for the debug agent timer. This is called in the \r
- interrupt handler after the interrupt has been processed. \r
-\r
-**/ \r
-VOID\r
-EFIAPI\r
-DebugAgentTimerEndOfInterrupt (\r
- VOID\r
- )\r
-{\r
- // EOI Timer interrupt for FIQ\r
-}\r
- \r
-
\ No newline at end of file
+++ /dev/null
-#/** @file\r
-# Component description file for Base PCI Cf8 Library.\r
-#\r
-# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.\r
-# Layers on top of an I/O Library instance.\r
-# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#\r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmEbDebugAgentTimerLib\r
- FILE_GUID = 80949BBB-68EE-4a4c-B434-D5DB5A232F0C\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = DebugAgentTimerLib|SEC BASE DXE_CORE\r
-\r
-\r
-[Sources.common]\r
- DebugAgentTimerLib.c\r
-\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmEbPkg/ArmEbPkg.dec\r
-\r
-[LibraryClasses]\r
- IoLib\r
-\r
+++ /dev/null
-/** @file
- Basic serial IO abstaction for GDB
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Uefi.h>
-#include <Library/GdbSerialLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-
-#include <ArmEb/ArmEb.h>
-
-RETURN_STATUS
-EFIAPI
-GdbSerialLibConstructor (
- VOID
- )
-{
- return GdbSerialInit (115200, 0, 8, 1);
-}
-
-RETURN_STATUS
-EFIAPI
-GdbSerialInit (
- IN UINT64 BaudRate,
- IN UINT8 Parity,
- IN UINT8 DataBits,
- IN UINT8 StopBits
- )
-{
- if ((Parity != 0) || (DataBits != 8) || (StopBits != 1)) {
- return RETURN_UNSUPPORTED;
- }
-
- if (BaudRate != 115200) {
- // Could add support for different Baud rates....
- return RETURN_UNSUPPORTED;
- }
-
- UINT32 Base = PcdGet32 (PcdGdbUartBase);\r
- \r
- // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ\r
- MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);\r
- MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);\r
-\r
- // no parity, 1 stop, no fifo, 8 data bits\r
- MmioWrite32 (Base + UARTLCR_H, 0x60);\r
-\r
- // clear any pending errors\r
- MmioWrite32 (Base + UARTECR, 0);\r
-\r
- // enable tx, rx, and uart overall\r
- MmioWrite32 (Base + UARTCR, 0x301);\r
-\r
- return RETURN_SUCCESS;\r
-}
-
-BOOLEAN
-EFIAPI
-GdbIsCharAvailable (
- VOID
- )
-{
- UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
-\r
- if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {\r
- return TRUE;\r
- } else {\r
- return FALSE;\r
- }\r
-}
-
-CHAR8
-EFIAPI
-GdbGetChar (
- VOID
- )
-{
- UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
- UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;\r
- \r
- while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0);\r
- return MmioRead8 (DR);\r
-}
-
-VOID
-EFIAPI
-GdbPutChar (
- IN CHAR8 Char
- )
-{
- UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
- UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;\r
-\r
- while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0);\r
- MmioWrite8 (DR, Char);\r
- return;
-}
-
-VOID
-GdbPutString (
- IN CHAR8 *String
- )
-{
- while (*String != '\0') {
- GdbPutChar (*String);
- String++;
- }
-}
-
-
-
-
+++ /dev/null
-#/** @file
-#
-# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = GdbSerialLib
- FILE_GUID = E8EA1309-2F14-428f-ABE3-7016CE4B4305
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = GdbSerialLib
-
- CONSTRUCTOR = GdbSerialLibConstructor
-
-
-[Sources.common]
- GdbSerialLib.c
-
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmEbPkg/ArmEbPkg.dec
-
-[LibraryClasses]
- DebugLib
- IoLib
-
-[FixedPcd]\r
- gArmEbTokenSpaceGuid.PcdGdbUartBase
\ No newline at end of file
+++ /dev/null
-/** @file\r
- Implement EFI RealTimeClock runtime services via RTC Lib.\r
- \r
- Currently this driver does not support runtime virtual calling.\r
-\r
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <PiDxe.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/RealTimeClockLib.h>\r
-\r
-\r
-/**\r
- Returns the current time and date information, and the time-keeping capabilities\r
- of the hardware platform.\r
-\r
- @param Time A pointer to storage to receive a snapshot of the current time.\r
- @param Capabilities An optional pointer to a buffer to receive the real time clock\r
- device's capabilities.\r
-\r
- @retval EFI_SUCCESS The operation completed successfully.\r
- @retval EFI_INVALID_PARAMETER Time is NULL.\r
- @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LibGetTime (\r
- OUT EFI_TIME *Time,\r
- OUT EFI_TIME_CAPABILITIES *Capabilities\r
- )\r
-{\r
- //\r
- // Fill in Time and Capabilities via data from you RTC\r
- //\r
- return EFI_DEVICE_ERROR;\r
-}\r
-\r
-\r
-/**\r
- Sets the current local time and date information.\r
-\r
- @param Time A pointer to the current time.\r
-\r
- @retval EFI_SUCCESS The operation completed successfully.\r
- @retval EFI_INVALID_PARAMETER A time field is out of range.\r
- @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LibSetTime (\r
- IN EFI_TIME *Time\r
- )\r
-{\r
- //\r
- // Use Time, to set the time in your RTC hardware\r
- //\r
- return EFI_DEVICE_ERROR;\r
-}\r
-\r
-\r
-/**\r
- Returns the current wakeup alarm clock setting.\r
-\r
- @param Enabled Indicates if the alarm is currently enabled or disabled.\r
- @param Pending Indicates if the alarm signal is pending and requires acknowledgement.\r
- @param Time The current alarm setting.\r
-\r
- @retval EFI_SUCCESS The alarm settings were returned.\r
- @retval EFI_INVALID_PARAMETER Any parameter is NULL.\r
- @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LibGetWakeupTime (\r
- OUT BOOLEAN *Enabled,\r
- OUT BOOLEAN *Pending,\r
- OUT EFI_TIME *Time\r
- )\r
-{\r
- // Not a required feature\r
- return EFI_UNSUPPORTED;\r
-}\r
-\r
-\r
-/**\r
- Sets the system wakeup alarm clock time.\r
-\r
- @param Enabled Enable or disable the wakeup alarm.\r
- @param Time If Enable is TRUE, the time to set the wakeup alarm for.\r
-\r
- @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If\r
- Enable is FALSE, then the wakeup alarm was disabled.\r
- @retval EFI_INVALID_PARAMETER A time field is out of range.\r
- @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error.\r
- @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LibSetWakeupTime (\r
- IN BOOLEAN Enabled,\r
- OUT EFI_TIME *Time\r
- )\r
-{\r
- // Not a required feature\r
- return EFI_UNSUPPORTED;\r
-}\r
-\r
-\r
-\r
-/**\r
- This is the declaration of an EFI image entry point. This can be the entry point to an application\r
- written to this specification, an EFI boot service driver, or an EFI runtime driver.\r
-\r
- @param ImageHandle Handle that identifies the loaded image.\r
- @param SystemTable System Table for this image.\r
-\r
- @retval EFI_SUCCESS The operation completed successfully.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LibRtcInitialize (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- //\r
- // Do some initialization if reqruied to turn on the RTC\r
- //\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Fixup internal data so that EFI can be call in virtual mode.\r
- Call the passed in Child Notify event and convert any pointers in\r
- lib to virtual mode.\r
-\r
- @param[in] Event The Event that is being processed\r
- @param[in] Context Event Context\r
-**/\r
-VOID\r
-EFIAPI\r
-LibRtcVirtualNotifyEvent (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
- )\r
-{\r
- //\r
- // Only needed if you are going to support the OS calling RTC functions in virtual mode.\r
- // You will need to call EfiConvertPointer (). To convert any stored physical addresses \r
- // to virtual address. After the OS transistions to calling in virtual mode, all future\r
- // runtime calls will be made in virtual mode.\r
- //\r
- return;\r
-}\r
-\r
-\r
-\r
+++ /dev/null
-#/** @file\r
-# Memory Status Code Library for UEFI drivers\r
-#\r
-# Lib to provide memory journal status code reporting Routines\r
-# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#\r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmEbRealTimeClockLib\r
- FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = RealTimeClockLib\r
-\r
-\r
-[Sources.common]\r
- RealTimeClockLib.c\r
-\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
-\r
-[LibraryClasses]\r
- IoLib\r
- DebugLib\r
-
\ No newline at end of file
+++ /dev/null
-/** @file\r
- Template library implementation to support ResetSystem Runtime call.\r
- \r
- Fill in the templates with what ever makes you system reset.\r
-\r
-\r
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-#include <PiDxe.h>\r
-\r
-#include <Library/BaseLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/EfiResetSystemLib.h>\r
-\r
-#include <ArmEb/ArmEb.h>\r
-\r
-/**\r
- Resets the entire platform.\r
-\r
- @param ResetType The type of reset to perform.\r
- @param ResetStatus The status code for the reset.\r
- @param DataSize The size, in bytes, of WatchdogData.\r
- @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or\r
- EfiResetShutdown the data buffer starts with a Null-terminated\r
- Unicode string, optionally followed by additional binary data.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LibResetSystem (\r
- IN EFI_RESET_TYPE ResetType,\r
- IN EFI_STATUS ResetStatus,\r
- IN UINTN DataSize,\r
- IN CHAR16 *ResetData OPTIONAL\r
- )\r
-{\r
- if (ResetData != NULL) {\r
- DEBUG ((EFI_D_ERROR, "%s", ResetData));\r
- }\r
-\r
- switch (ResetType) {\r
- case EfiResetWarm:\r
- // Map a warm reset into a cold reset\r
- case EfiResetCold:\r
- case EfiResetShutdown:\r
- default:\r
- CpuDeadLoop ();\r
- break;\r
- }\r
-\r
- // If the reset didn't work, return an error.\r
- ASSERT (FALSE);\r
- return EFI_DEVICE_ERROR;\r
-}\r
- \r
-\r
-\r
-/**\r
- Initialize any infrastructure required for LibResetSystem () to function.\r
-\r
- @param ImageHandle The firmware allocated handle for the EFI image.\r
- @param SystemTable A pointer to the EFI System Table.\r
- \r
- @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-LibInitializeResetSystem (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- return EFI_SUCCESS;\r
-}\r
-\r
+++ /dev/null
-#/** @file\r
-# Reset System lib to make it easy to port new platforms\r
-#\r
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#\r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmEbResetSystemLib\r
- FILE_GUID = CEFFA65C-B568-453e-9E11-B81AE683D035\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = EfiResetSystemLib\r
-\r
-\r
-[Sources.common]\r
- ResetSystemLib.c\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmEbPkg/ArmEbPkg.dec\r
-\r
-[LibraryClasses]\r
- DebugLib\r
- BaseLib\r
+++ /dev/null
-/** @file\r
- Serial I/O Port library functions with no library constructor/destructor\r
-\r
-\r
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Base.h>\r
-#include <Library/SerialPortLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
-\r
-#include <ArmEb/ArmEb.h>\r
-\r
-/*\r
-\r
- Programmed hardware of Serial port.\r
-\r
- @return Always return EFI_UNSUPPORTED.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-SerialPortInitialize (\r
- VOID\r
- )\r
-{\r
- UINT32 Base = PcdGet32 (PcdConsoleUartBase);\r
- \r
- // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ\r
- MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);\r
- MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);\r
-\r
- // no parity, 1 stop, no fifo, 8 data bits\r
- MmioWrite32 (Base + UARTLCR_H, 0x60);\r
-\r
- // clear any pending errors\r
- MmioWrite32 (Base + UARTECR, 0);\r
-\r
- // enable tx, rx, and uart overall\r
- MmioWrite32 (Base + UARTCR, 0x301);\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Write data to serial device.\r
-\r
- @param Buffer Point of data buffer which need to be writed.\r
- @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
-\r
- @retval 0 Write data failed.\r
- @retval !0 Actual number of bytes writed to serial device.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-SerialPortWrite (\r
- IN UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
-)\r
-{\r
- UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
- UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;\r
- UINTN Count;\r
- \r
- for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
- while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0);\r
- MmioWrite8 (DR, *Buffer);\r
- }\r
-\r
- return NumberOfBytes;\r
-}\r
-\r
-\r
-/**\r
- Read data from serial device and save the datas in buffer.\r
-\r
- @param Buffer Point of data buffer which need to be writed.\r
- @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
-\r
- @retval 0 Read data failed.\r
- @retval !0 Aactual number of bytes read from serial device.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-SerialPortRead (\r
- OUT UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
-)\r
-{\r
- UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
- UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;\r
- UINTN Count;\r
- \r
- for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
- while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0);\r
- *Buffer = MmioRead8 (DR);\r
- }\r
-\r
- return NumberOfBytes;\r
-}\r
-\r
-\r
-/**\r
- Check to see if any data is avaiable to be read from the debug device.\r
-\r
- @retval EFI_SUCCESS At least one byte of data is avaiable to be read\r
- @retval EFI_NOT_READY No data is avaiable to be read\r
- @retval EFI_DEVICE_ERROR The serial device is not functioning properly\r
-\r
-**/\r
-BOOLEAN\r
-EFIAPI\r
-SerialPortPoll (\r
- VOID\r
- )\r
-{\r
- UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
-\r
- if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {\r
- return TRUE;\r
- } else {\r
- return FALSE;\r
- }\r
-}\r
-\r
+++ /dev/null
-#/** @file\r
-# EDK Serial port lib\r
-#\r
-# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#\r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmEbSerialPortLib\r
- FILE_GUID = C653196A-3BE1-4ec7-850B-DB7E0A16150F\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = SerialPortLib\r
-\r
-\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
-#\r
-\r
-[Sources.common]\r
- SerialPortLib.c\r
-\r
-[LibraryClasses]\r
- IoLib\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- ArmEbPkg/ArmEbPkg.dec\r
- \r
-[FixedPcd]\r
- gArmEbTokenSpaceGuid.PcdConsoleUartBase\r
-\r
+++ /dev/null
-/** @file\r
- TimerLib for ARM EB. Hardcoded to 100ns period\r
-\r
- This library assume the following initialization, usually done in SEC. \r
-\r
- // configure SP810 to use 1MHz clock and disable\r
- MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r
- // Enable\r
- MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);\r
-\r
- // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled\r
- MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
-\r
- // preload the timer count register\r
- MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);\r
-\r
- // enable the timer\r
- MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);\r
-\r
-\r
- Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Base.h>\r
-\r
-#include <Library/BaseLib.h>\r
-#include <Library/TimerLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
-\r
-#include <ArmEb/ArmEb.h>\r
-\r
-\r
-/**\r
- Stalls the CPU for at least the given number of microseconds.\r
-\r
- Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
-\r
- @param MicroSeconds The minimum number of microseconds to delay.\r
-\r
- @return The value of MicroSeconds inputted.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-MicroSecondDelay (\r
- IN UINTN MicroSeconds\r
- )\r
-{\r
- UINT64 NanoSeconds;\r
- \r
- NanoSeconds = MultU64x32 (MicroSeconds, 1000);\r
-\r
- while (NanoSeconds > (UINTN)-1) { \r
- NanoSecondDelay((UINTN)-1);\r
- NanoSeconds -= (UINTN)-1;\r
- }\r
-\r
- NanoSecondDelay (NanoSeconds);\r
-\r
- return MicroSeconds;\r
-}\r
-\r
-/**\r
- Stalls the CPU for at least the given number of nanoseconds.\r
-\r
- Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
-\r
- @param NanoSeconds The minimum number of nanoseconds to delay.\r
-\r
- @return The value of NanoSeconds inputted.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-NanoSecondDelay (\r
- IN UINTN NanoSeconds\r
- )\r
-{\r
- UINT32 TickNumber;\r
-\r
- if (NanoSeconds == 0) {\r
- return NanoSeconds;\r
- }\r
-\r
- // Round up to 100ns Tick Number\r
- TickNumber = (UINT32)NanoSeconds / 100;\r
- TickNumber += ((UINT32)NanoSeconds % 100) == 0 ? 0 : 1;\r
-\r
- // load the timer count register\r
- MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, TickNumber);\r
-\r
- while (MmioRead32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {\r
- ;\r
- } \r
- \r
- return NanoSeconds;\r
-}\r
-\r
-/**\r
- Retrieves the current value of a 64-bit free running performance counter.\r
-\r
- The counter can either count up by 1 or count down by 1. If the physical\r
- performance counter counts by a larger increment, then the counter values\r
- must be translated. The properties of the counter can be retrieved from\r
- GetPerformanceCounterProperties().\r
-\r
- @return The current value of the free running performance counter.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-GetPerformanceCounter (\r
- VOID\r
- )\r
-{ \r
- // Free running 64-bit/32-bit counter is needed here.\r
- // Don't think we need this to boot, just to do performance profile\r
- ASSERT (FALSE);\r
- return (UINT64)0ULL;\r
-}\r
-\r
-\r
-/**\r
- Retrieves the 64-bit frequency in Hz and the range of performance counter\r
- values.\r
-\r
- If StartValue is not NULL, then the value that the performance counter starts\r
- with immediately after is it rolls over is returned in StartValue. If\r
- EndValue is not NULL, then the value that the performance counter end with\r
- immediately before it rolls over is returned in EndValue. The 64-bit\r
- frequency of the performance counter in Hz is always returned. If StartValue\r
- is less than EndValue, then the performance counter counts up. If StartValue\r
- is greater than EndValue, then the performance counter counts down. For\r
- example, a 64-bit free running counter that counts up would have a StartValue\r
- of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
- that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
-\r
- @param StartValue The value the performance counter starts with when it\r
- rolls over.\r
- @param EndValue The value that the performance counter ends with before\r
- it rolls over.\r
-\r
- @return The frequency in Hz.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-GetPerformanceCounterProperties (\r
- OUT UINT64 *StartValue, OPTIONAL\r
- OUT UINT64 *EndValue OPTIONAL\r
- )\r
-{\r
- if (StartValue != NULL) {\r
- // Timer starts with the reload value\r
- *StartValue = (UINT64)0ULL;\r
- }\r
- \r
- if (EndValue != NULL) {\r
- // Timer counts up to 0xFFFFFFFF\r
- *EndValue = 0xFFFFFFFF;\r
- }\r
- \r
- return 100;\r
-}\r
-\r
-\r
+++ /dev/null
-#/** @file\r
-# Timer library implementation\r
-#\r
-# A non-functional instance of the Timer Library that can be used as a template\r
-# for the implementation of a functional timer library instance. This library instance can\r
-# also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer\r
-# services as well as EBC modules that require timer services\r
-# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#\r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = ArmEbTimerLib\r
- FILE_GUID = B2333114-328B-47cc-8E5E-F64E22E4B417\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = TimerLib \r
-\r
-[Sources.common]\r
- TimerLib.c\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmEbPkg/ArmEbPkg.dec\r
-\r
-[LibraryClasses]\r
- DebugLib\r
- IoLib\r
- BaseLib\r
-\r
-[Pcd]\r
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz\r
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds\r
-\r
+++ /dev/null
-/** @file\r
-\r
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <PiPei.h>\r
-\r
-#include <Library/ArmLib.h>\r
-#include <Library/PrePiLib.h>\r
-#include <Library/PcdLib.h>\r
-\r
-// DDR attributes\r
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
-\r
-// SoC registers. L3 interconnects\r
-#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000\r
-#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000\r
-#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE\r
-\r
-// SoC registers. L4 interconnects\r
-#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000\r
-#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000\r
-#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE\r
-\r
-VOID\r
-InitCache (\r
- IN UINT32 MemoryBase,\r
- IN UINT32 MemoryLength\r
- )\r
-{\r
- UINT32 CacheAttributes;\r
- ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];\r
- VOID *TranslationTableBase;\r
- UINTN TranslationTableSize;\r
-\r
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
- } else {\r
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
- }\r
-\r
- // DDR\r
- MemoryTable[0].PhysicalBase = MemoryBase;\r
- MemoryTable[0].VirtualBase = MemoryBase;\r
- MemoryTable[0].Length = MemoryLength;\r
- MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
-\r
- // SOC Registers. L3 interconnects\r
- MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;\r
- MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;\r
- MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;\r
- MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;\r
- \r
- // SOC Registers. L4 interconnects\r
- MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
- MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
- MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;\r
- MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;\r
-\r
- // End of Table\r
- MemoryTable[3].PhysicalBase = 0;\r
- MemoryTable[3].VirtualBase = 0;\r
- MemoryTable[3].Length = 0;\r
- MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
- \r
- ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
- \r
- BuildMemoryAllocationHob ((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
-}\r
+++ /dev/null
-/** @file\r
- LZMA Decompress Library header file\r
-\r
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef __LZMA_DECOMPRESS_H___\r
-#define __LZMA_DECOMPRESS_H___\r
-\r
-/**\r
- Examines a GUIDed section and returns the size of the decoded buffer and the\r
- size of an scratch buffer required to actually decode the data in a GUIDed section.\r
-\r
- Examines a GUIDed section specified by InputSection. \r
- If GUID for InputSection does not match the GUID that this handler supports,\r
- then RETURN_UNSUPPORTED is returned. \r
- If the required information can not be retrieved from InputSection,\r
- then RETURN_INVALID_PARAMETER is returned.\r
- If the GUID of InputSection does match the GUID that this handler supports,\r
- then the size required to hold the decoded buffer is returned in OututBufferSize,\r
- the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field\r
- from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.\r
- \r
- If InputSection is NULL, then ASSERT().\r
- If OutputBufferSize is NULL, then ASSERT().\r
- If ScratchBufferSize is NULL, then ASSERT().\r
- If SectionAttribute is NULL, then ASSERT().\r
-\r
-\r
- @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.\r
- @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required\r
- if the buffer specified by InputSection were decoded.\r
- @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space\r
- if the buffer specified by InputSection were decoded.\r
- @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes\r
- field of EFI_GUID_DEFINED_SECTION in the PI Specification.\r
-\r
- @retval RETURN_SUCCESS The information about InputSection was returned.\r
- @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.\r
- @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-LzmaGuidedSectionGetInfo (\r
- IN CONST VOID *InputSection,\r
- OUT UINT32 *OutputBufferSize,\r
- OUT UINT32 *ScratchBufferSize,\r
- OUT UINT16 *SectionAttribute\r
- );\r
-\r
-/**\r
- Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.\r
- \r
- Decodes the GUIDed section specified by InputSection. \r
- If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned. \r
- If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.\r
- If the GUID of InputSection does match the GUID that this handler supports, then InputSection\r
- is decoded into the buffer specified by OutputBuffer and the authentication status of this\r
- decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the\r
- data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,\r
- the decoded data will be placed in caller allocated buffer specified by OutputBuffer.\r
- \r
- If InputSection is NULL, then ASSERT().\r
- If OutputBuffer is NULL, then ASSERT().\r
- If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().\r
- If AuthenticationStatus is NULL, then ASSERT().\r
-\r
-\r
- @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.\r
- @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation. \r
- @param[out] ScratchBuffer A caller allocated buffer that may be required by this function\r
- as a scratch buffer to perform the decode operation. \r
- @param[out] AuthenticationStatus \r
- A pointer to the authentication status of the decoded output buffer.\r
- See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI\r
- section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must\r
- never be set by this handler.\r
-\r
- @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.\r
- @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.\r
- @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-LzmaGuidedSectionExtraction (\r
- IN CONST VOID *InputSection,\r
- OUT VOID **OutputBuffer,\r
- OUT VOID *ScratchBuffer, OPTIONAL\r
- OUT UINT32 *AuthenticationStatus\r
- );\r
- \r
-#endif // __LZMADECOMPRESS_H__\r
-\r
+++ /dev/null
-#------------------------------------------------------------------------------ \r
-#\r
-# ARM EB Entry point. Reset vector in FV header will brach to\r
-# _ModuleEntryPoint. \r
-#\r
-# We use crazy macros, like LoadConstantToReg, since Xcode assembler \r
-# does not support = assembly syntax for ldr.\r
-#\r
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
-#include <ArmEb/ArmEb.h>\r
-\r
-.text\r
-.align 3\r
-\r
-.globl ASM_PFX(CEntryPoint)\r
-.globl ASM_PFX(_ModuleEntryPoint)\r
-\r
-ASM_PFX(_ModuleEntryPoint):\r
- \r
- // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
- MmioOr32 (EB_SP810_CTRL_BASE ,BIT8) \r
-\r
- // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
- mrc p15, 0, r0, c1, c0, 2\r
- orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)\r
- mcr p15, 0, r0, c1, c0, 2\r
- mov r0, #0x40000000 // Set EN bit in FPEXC\r
- mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
- \r
- \r
- // Set CPU vectors to start of DRAM\r
- LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
- mcr p15, 0, r0, c12, c0, 0\r
- isb // Sync changes to control registers\r
-\r
- // Fill vector table with branchs to current pc (jmp $)\r
- // CPU DXE driver likes known values so it can let GDB stub hook vectors\r
- ldr r1, ShouldNeverGetHere\r
- movs r2, #0\r
-FillVectors:\r
- str r1, [r0, r2]\r
- adds r2, r2, #4\r
- cmp r2, #32\r
- bne FillVectors\r
-\r
- //\r
- // Set stack based on PCD values. Need to do it this way to make C code work \r
- // when it runs from FLASH. \r
- // \r
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2 \r
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3 \r
- add r4, r2, r3\r
- mov r13, r4\r
-\r
- // Call C entry point\r
- LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1 \r
- LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0 \r
- blx ASM_PFX(CEntryPoint) \r
-\r
-ShouldNeverGetHere:\r
- // _CEntryPoint should never return \r
- b ShouldNeverGetHere\r
-\r
- \r
+++ /dev/null
-//------------------------------------------------------------------------------ \r
-//\r
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-//\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-//\r
-//------------------------------------------------------------------------------\r
-\r
-#include <AsmMacroIoLib.h>\r
-#include <Base.h>\r
-#include <Library/PcdLib.h>\r
-#include <ArmEb/ArmEb.h>\r
-#include <AutoGen.h>\r
-\r
- INCLUDE AsmMacroIoLib.inc\r
- \r
- IMPORT CEntryPoint\r
- EXPORT _ModuleEntryPoint\r
- \r
- PRESERVE8\r
- AREA ModuleEntryPoint, CODE, READONLY\r
- \r
-\r
-_ModuleEntryPoint\r
- \r
- // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
- MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE\r
-\r
- // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
- mrc p15, 0, r0, c1, c0, 2\r
- orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)\r
- mcr p15, 0, r0, c1, c0, 2\r
- mov r0, #0x40000000 // Set EN bit in FPEXC\r
- mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
- \r
- // Set CPU vectors to start of DRAM\r
- LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
- mcr p15, 0, r0, c12, c0, 0\r
- isb // Sync changes to control registers\r
-\r
- // Fill vector table with branchs to current pc (jmp $)\r
- // CPU DXE driver likes known values so it can let GDB stub hook vectors\r
- ldr r1, ShouldNeverGetHere\r
- movs r2, #0\r
-FillVectors\r
- str r1, [r0, r2]\r
- adds r2, r2, #4\r
- cmp r2, #32\r
- bne FillVectors\r
-\r
- //\r
- // Set stack based on PCD values. Need to do it this way to make C code work \r
- // when it runs from FLASH. \r
- // \r
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2 \r
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3 \r
- add r4, r2, r3\r
- mov r13, r4\r
-\r
- // Call C entry point\r
- LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1 \r
- LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0 \r
- blx CEntryPoint \r
-\r
-ShouldNeverGetHere\r
- // _CEntryPoint should never return \r
- b ShouldNeverGetHere\r
- \r
- END\r
-\r
-\r
+++ /dev/null
-/** @file\r
- C Entry point for the SEC. First C code after the reset vector.\r
-\r
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
- \r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <PiPei.h>\r
-\r
-#include <Library/DebugLib.h>\r
-#include <Library/PrePiLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/ArmLib.h>\r
-#include <Library/PeCoffGetEntryPointLib.h>\r
-#include <Library/DebugAgentLib.h>\r
-\r
-#include <Ppi/GuidedSectionExtraction.h>\r
-#include <Guid/LzmaDecompress.h>\r
-\r
-#include <ArmEb/ArmEb.h>\r
-\r
-#include "LzmaDecompress.h"\r
-\r
-VOID\r
-EFIAPI \r
-_ModuleEntryPoint(\r
- VOID\r
- );\r
-\r
-CHAR8 *\r
-DeCygwinPathIfNeeded (\r
- IN CHAR8 *Name\r
- );\r
-\r
-RETURN_STATUS\r
-EFIAPI\r
-SerialPortInitialize (\r
- VOID\r
- );\r
- \r
- \r
-VOID\r
-UartInit (\r
- VOID\r
- )\r
-{\r
- // SEC phase needs to run library constructors by hand.\r
- // This assumes we are linked agains the SerialLib\r
- // In non SEC modules the init call is in autogenerated code.\r
- SerialPortInitialize ();\r
-}\r
-\r
-VOID\r
-TimerInit (\r
- VOID\r
- )\r
-{\r
- // configure SP810 to use 1MHz clock and disable\r
- MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r
- // Enable\r
- MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);\r
-\r
- // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled\r
- MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
-\r
- // preload the timer count register\r
- MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);\r
-\r
- // enable the timer\r
- MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);\r
-}\r
-\r
-\r
-VOID\r
-InitCache (\r
- IN UINT32 MemoryBase,\r
- IN UINT32 MemoryLength\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-ExtractGuidedSectionLibConstructor (\r
- VOID\r
- );\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-LzmaDecompressLibConstructor (\r
- VOID\r
- );\r
-\r
-\r
-VOID\r
-CEntryPoint (\r
- IN VOID *MemoryBase,\r
- IN UINTN MemorySize,\r
- IN VOID *StackBase,\r
- IN UINTN StackSize\r
- )\r
-{\r
- VOID *HobBase;\r
-\r
- // Build a basic HOB list\r
- HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));\r
- CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);\r
-\r
-\r
- // Enable program flow prediction, if supported.\r
- ArmEnableBranchPrediction ();\r
-\r
- // Initialize CPU cache\r
- InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);\r
-\r
- // Add memory allocation hob for relocated FD\r
- BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);\r
-\r
- // Add the FVs to the hob list\r
- BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));\r
-\r
- // Start talking\r
- UartInit ();\r
-\r
- InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL);\r
- SaveAndSetDebugTimerInterrupt (TRUE);\r
-\r
- DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r
-\r
- // Start up a free running timer so that the timer lib will work\r
- TimerInit ();\r
-\r
- // SEC phase needs to run library constructors by hand.\r
- ExtractGuidedSectionLibConstructor ();\r
- LzmaDecompressLibConstructor ();\r
-\r
- // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
- BuildPeCoffLoaderHob ();\r
- BuildExtractSectionHob (\r
- &gLzmaCustomDecompressGuid,\r
- LzmaGuidedSectionGetInfo,\r
- LzmaGuidedSectionExtraction\r
- );\r
-\r
- // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
- DecompressFirstFv ();\r
-\r
- // Load the DXE Core and transfer control to it\r
- LoadDxeCoreFromFv (NULL, 0);\r
- \r
- // DXE Core should always load and never return\r
- ASSERT (FALSE);\r
-}\r
-\r
+++ /dev/null
-
-#/** @file
-# SEC - Reset vector code that jumps to C and loads DXE core
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BeagleBoardSec
- FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
-
-
-[Sources.ARM]
- ModuleEntryPoint.S | GCC
- ModuleEntryPoint.asm | RVCT
-
-[Sources.ARM]
- Sec.c
- Cache.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
- ArmEbPkg/ArmEbPkg.dec
-
-
-[LibraryClasses]
- BaseLib
- DebugLib
- ArmLib
- IoLib
- ExtractGuidedSectionLib
- LzmaDecompressLib
- PeCoffGetEntryPointLib
- DebugAgentLib
-
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
- gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
- gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
- gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
- gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
- gEmbeddedTokenSpaceGuid.PcdMemoryBase
- gEmbeddedTokenSpaceGuid.PcdMemorySize
-
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
-
-
+++ /dev/null
-/** @file
- Template for Timer Architecture Protocol driver of the ARM flavor
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-#include <PiDxe.h>
-
-#include <Library/BaseLib.h>
-#include <Library/DebugLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-#include <Library/UefiLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-
-#include <Protocol/Timer.h>
-#include <Protocol/HardwareInterrupt.h>
-
-#include <ArmEb/ArmEb.h>
-
-
-// The notification function to call on every timer interrupt.
-volatile EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL;
-
-
-// The current period of the timer interrupt
-volatile UINT64 mTimerPeriod = 0;
-
-// Cached copy of the Hardware Interrupt protocol instance
-EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
-
-// Cached interrupt vector
-UINTN gVector;
-
-UINT32 mLastTickCount;
-
-
-/**
-
- C Interrupt Handler calledin the interrupt context when Source interrupt is active.
-
-
- @param Source Source of the interrupt. Hardware routing off a specific platform defines
- what source means.
-
- @param SystemContext Pointer to system register context. Mostly used by debuggers and will
- update the system context after the return from the interrupt if
- modified. Don't change these values unless you know what you are doing
-
-**/
-VOID
-EFIAPI
-TimerInterruptHandler (
- IN HARDWARE_INTERRUPT_SOURCE Source,
- IN EFI_SYSTEM_CONTEXT SystemContext
- )
-{
- EFI_TPL OriginalTPL;
-
- //
- // DXE core uses this callback for the EFI timer tick. The DXE core uses locks
- // that raise to TPL_HIGH and then restore back to current level. Thus we need
- // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick.
- //
- OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
-
- // clear the periodic interrupt
-
- MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_INT_CLR_REG, 0);
-
- // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers
- gInterrupt->EndOfInterrupt (gInterrupt, Source);
-
- if (mTimerNotifyFunction) {
- mTimerNotifyFunction (mTimerPeriod);
- }
-
- gBS->RestoreTPL (OriginalTPL);
-}
-
-
-/**
- This function registers the handler NotifyFunction so it is called every time
- the timer interrupt fires. It also passes the amount of time since the last
- handler call to the NotifyFunction. If NotifyFunction is NULL, then the
- handler is unregistered. If the handler is registered, then EFI_SUCCESS is
- returned. If the CPU does not support registering a timer interrupt handler,
- then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
- when a handler is already registered, then EFI_ALREADY_STARTED is returned.
- If an attempt is made to unregister a handler when a handler is not registered,
- then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
- register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
- is returned.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param NotifyFunction The function to call when a timer interrupt fires. This
- function executes at TPL_HIGH_LEVEL. The DXE Core will
- register a handler for the timer interrupt, so it can know
- how much time has passed. This information is used to
- signal timer based events. NULL will unregister the handler.
- @retval EFI_SUCCESS The timer handler was registered.
- @retval EFI_UNSUPPORTED The platform does not support timer interrupts.
- @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
- registered.
- @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
- previously registered.
- @retval EFI_DEVICE_ERROR The timer handler could not be registered.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverRegisterHandler (
- IN EFI_TIMER_ARCH_PROTOCOL *This,
- IN EFI_TIMER_NOTIFY NotifyFunction
- )
-{
- if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {
- return EFI_INVALID_PARAMETER;
- }
-
- if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {
- return EFI_ALREADY_STARTED;
- }
-
- mTimerNotifyFunction = NotifyFunction;
-
- return EFI_SUCCESS;
-}
-
-/**
-
- This function adjusts the period of timer interrupts to the value specified
- by TimerPeriod. If the timer period is updated, then the selected timer
- period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
- the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
- If an error occurs while attempting to update the timer period, then the
- timer hardware will be put back in its state prior to this call, and
- EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
- is disabled. This is not the same as disabling the CPU's interrupts.
- Instead, it must either turn off the timer hardware, or it must adjust the
- interrupt controller so that a CPU interrupt is not generated when the timer
- interrupt fires.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
- the timer hardware is not programmable, then EFI_UNSUPPORTED is
- returned. If the timer is programmable, then the timer period
- will be rounded up to the nearest timer period that is supported
- by the timer hardware. If TimerPeriod is set to 0, then the
- timer interrupts will be disabled.
-
-
- @retval EFI_SUCCESS The timer period was changed.
- @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
- @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverSetTimerPeriod (
- IN EFI_TIMER_ARCH_PROTOCOL *This,
- IN UINT64 TimerPeriod
- )
-{
- EFI_STATUS Status;
- UINT64 TimerTicks;
-
-
- // always disable the timer
- MmioAnd32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE);
-
- if (TimerPeriod == 0) {
- // leave timer disabled from above, and...
-
- // disable timer 0/1 interrupt for a TimerPeriod of 0
-
-
- Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector);
- } else {
- // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10)
-
- TimerTicks = DivU64x32 (TimerPeriod, 10);
-
-
-
- // if it's larger than 32-bits, pin to highest value
-
- if (TimerTicks > 0xffffffff) {
-
- TimerTicks = 0xffffffff;
-
- }
-
-
-
- // Program the SP804 timer with the new count value
-
- MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_LOAD_REG, TimerTicks);
-
-
-
- // enable the timer
-
- MmioOr32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-
-
-
- // enable timer 0/1 interrupts
-
- Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector);
- }
-
- //
- // Save the new timer period
- //
- mTimerPeriod = TimerPeriod;
- return Status;
-}
-
-
-/**
- This function retrieves the period of timer interrupts in 100 ns units,
- returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
- is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
- returned, then the timer is currently disabled.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
- @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
- 0 is returned, then the timer is currently disabled.
-
-
- @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
- @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverGetTimerPeriod (
- IN EFI_TIMER_ARCH_PROTOCOL *This,
- OUT UINT64 *TimerPeriod
- )
-{
- if (TimerPeriod == NULL) {
- return EFI_INVALID_PARAMETER;
- }
-
- *TimerPeriod = mTimerPeriod;
- return EFI_SUCCESS;
-}
-
-/**
- This function generates a soft timer interrupt. If the platform does not support soft
- timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
- If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
- service, then a soft timer interrupt will be generated. If the timer interrupt is
- enabled when this service is called, then the registered handler will be invoked. The
- registered handler should not be able to distinguish a hardware-generated timer
- interrupt from a software-generated timer interrupt.
-
- @param This The EFI_TIMER_ARCH_PROTOCOL instance.
-
- @retval EFI_SUCCESS The soft timer interrupt was generated.
- @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
-
-**/
-EFI_STATUS
-EFIAPI
-TimerDriverGenerateSoftInterrupt (
- IN EFI_TIMER_ARCH_PROTOCOL *This
- )
-{
- return EFI_UNSUPPORTED;
-}
-
-
-
-/**
- Interface stucture for the Timer Architectural Protocol.
-
- @par Protocol Description:
- This protocol provides the services to initialize a periodic timer
- interrupt, and to register a handler that is called each time the timer
- interrupt fires. It may also provide a service to adjust the rate of the
- periodic timer interrupt. When a timer interrupt occurs, the handler is
- passed the amount of time that has passed since the previous timer
- interrupt.
-
- @param RegisterHandler
- Registers a handler that will be called each time the
- timer interrupt fires. TimerPeriod defines the minimum
- time between timer interrupts, so TimerPeriod will also
- be the minimum time between calls to the registered
- handler.
-
- @param SetTimerPeriod
- Sets the period of the timer interrupt in 100 nS units.
- This function is optional, and may return EFI_UNSUPPORTED.
- If this function is supported, then the timer period will
- be rounded up to the nearest supported timer period.
-
-
- @param GetTimerPeriod
- Retrieves the period of the timer interrupt in 100 nS units.
-
- @param GenerateSoftInterrupt
- Generates a soft timer interrupt that simulates the firing of
- the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
- a period of time.
-
-**/
-EFI_TIMER_ARCH_PROTOCOL gTimer = {
- TimerDriverRegisterHandler,
- TimerDriverSetTimerPeriod,
- TimerDriverGetTimerPeriod,
- TimerDriverGenerateSoftInterrupt
-};
-
-
-/**
- Initialize the state information for the Timer Architectural Protocol and
- the Timer Debug support protocol that allows the debugger to break into a
- running program.
-
- @param ImageHandle of the loaded driver
- @param SystemTable Pointer to the System Table
-
- @retval EFI_SUCCESS Protocol registered
- @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
- @retval EFI_DEVICE_ERROR Hardware problems
-
-**/
-EFI_STATUS
-EFIAPI
-TimerInitialize (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
- )
-{
- EFI_HANDLE Handle = NULL;
- EFI_STATUS Status;
-
-
- // configure free running timer (TIMER1) for 1MHz operation
-
-
- // AND disable clock, OR configure 1MHz clock
- MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER1_EN, SP810_SYS_CTRL_TIMER1_TIMCLK);
-
-
- // Renable timer
- MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_EN);
-
-
- // configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled
- MmioWrite32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
-
- // enable the free running timer
- MmioOr32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
-
- // record free running tick value (should be close to 0xffffffff)
- mLastTickCount = MmioRead32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CURRENT_REG);
-
-
- // Disable the timer
- Status = TimerDriverSetTimerPeriod (&gTimer, 0);
- ASSERT_EFI_ERROR (Status);
-
- // Install interrupt handler
- gVector = EB_TIMER01_INTERRUPT_NUM;
- Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler);
- ASSERT_EFI_ERROR (Status);
-
-
- // configure periodic timer (TIMER0) for 1MHz operation
- MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER0_EN, SP810_SYS_CTRL_TIMER0_TIMCLK);
-
-
- // Renable timer
- MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_EN);
-
-
- // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled
- MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE);
-
- // Set up default timer
- Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
- ASSERT_EFI_ERROR (Status);
-
- // Install the Timer Architectural Protocol onto a new handle
- Status = gBS->InstallMultipleProtocolInterfaces(
- &Handle,
- &gEfiTimerArchProtocolGuid, &gTimer,
- NULL
- );
- ASSERT_EFI_ERROR(Status);
-
- return Status;
-}
-
+++ /dev/null
-#/** @file
-#
-# Component discription file for Timer module
-#
-# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = ArmEbTimerDxe
- FILE_GUID = B93B3662-C599-42ad-99E5-CD592431AE97
- MODULE_TYPE = DXE_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = TimerInitialize
-
-[Sources.common]
- Timer.c
-
-[Packages]
- MdePkg/MdePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmEbPkg/ArmEbPkg.dec
-
-[LibraryClasses]
- BaseLib
- UefiRuntimeServicesTableLib
- UefiLib
- UefiBootServicesTableLib
- BaseMemoryLib
- DebugLib
- UefiDriverEntryPoint
- IoLib
-
-[Guids]
-
-[Protocols]
- gEfiTimerArchProtocolGuid
- gHardwareInterruptProtocolGuid
-
-[Pcd.common]
- gEmbeddedTokenSpaceGuid.PcdTimerPeriod
- gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds
-
-
-[Depex]
- gHardwareInterruptProtocolGuid
\ No newline at end of file
+++ /dev/null
-@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-@REM This program and the accompanying materials
-@REM are licensed and made available under the terms and conditions of the BSD License
-@REM which accompanies this distribution. The full text of the license may be found at
-@REM http://opensource.org/licenses/bsd-license.php
-@REM
-@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-@REM
-
-@REM Example usage of this script. default is a DEBUG build
-@REM b
-@REM b clean
-@REM b release
-@REM b release clean
-@REM b -v -y build.log
-
-ECHO OFF
-@REM Setup Build environment. Sets WORKSPACE and puts build in path
-CALL ..\edksetup.bat
-
-@REM Set for tools chain. Currently RVCT31
-SET TARGET_TOOLS=RVCT31
-SET TARGET=DEBUG
-\r
-@if /I "%1"=="RELEASE" (\r
- @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it \r
- SET TARGET=RELEASE\r
- shift /1\r
-)\r
-
-SET BUILD_ROOT=%WORKSPACE%\Build\ArmEb\%TARGET%_%TARGET_TOOLS%
-
-@REM Build the ARM EB firmware and creat an FD (FLASH Device) Image.
-CALL build -p ArmEbPkg\ArmEbPkg.dsc -a ARM -t RVCT31 -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
-@if ERRORLEVEL 1 goto Exit
-
-@if /I "%1"=="CLEAN" goto Clean\r
-
-
-ECHO Patching ..\Debugger_scripts ...
-SET DEBUGGER_SCRIPT=Debugger_scripts
-@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
- @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
-)
-
-:Exit
-EXIT /B
-
-:Clean
+++ /dev/null
-@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-@REM This program and the accompanying materials
-@REM are licensed and made available under the terms and conditions of the BSD License
-@REM which accompanies this distribution. The full text of the license may be found at
-@REM http://opensource.org/licenses/bsd-license.php
-@REM
-@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-@REM
-
-@REM Example usage of this script. default is a DEBUG build
-@REM b
-@REM b clean
-@REM b release
-@REM b release clean
-@REM b -v -y build.log
-
-ECHO OFF
-@REM Setup Build environment. Sets WORKSPACE and puts build in path
-CALL ..\edksetup.bat
-
-@REM Set for tools chain. Currently ARMGCC
-SET TARGET_TOOLS=ARMGCC
-SET TARGET=DEBUG
-\r
-@if /I "%1"=="RELEASE" (\r
- @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it \r
- SET TARGET=RELEASE\r
- shift /1\r
-)\r
-
-SET BUILD_ROOT=%WORKSPACE%\Build\ArmEb\%TARGET%_%TARGET_TOOLS%
-
-@REM Build the Beagle Board firmware and creat an FD (FLASH Device) Image.
-CALL build -p ArmEbPkg\ArmEbPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
-@if ERRORLEVEL 1 goto Exit
-
-@if /I "%1"=="CLEAN" goto Clean\r
-
-ECHO Patching ..\Debugger_scripts ...
-SET DEBUGGER_SCRIPT=Debugger_scripts
-@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
- @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
-)
-
-:Exit
-EXIT /B
-
-:Clean
+++ /dev/null
-#!/bin/bash
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-
-set -e
-shopt -s nocasematch
-
-function process_debug_scripts {
- if [[ -d $1 ]]; then
- for filename in `ls $1`
- do
- sed -e "s@ZZZZZZ@$BUILD_ROOT@g" -e "s@WWWWWW@$WORKSPACE@g" \
- "$1/$filename" \
- > "$BUILD_ROOT/$filename"
-
- #For ARMCYGWIN, we have to change /cygdrive/c to c:
- if [[ $TARGET_TOOLS == RVCT31CYGWIN ]]
- then
- mv "$BUILD_ROOT/$filename" "$BUILD_ROOT/$filename"_temp
- sed -e "s@/cygdrive/\(.\)@\1:@g" \
- "$BUILD_ROOT/$filename"_temp \
- > "$BUILD_ROOT/$filename"
- rm -f "$BUILD_ROOT/$filename"_temp
- fi
- done
- fi
-}
-
-
-#
-# Setup workspace if it is not set
-#
-if [ -z "$WORKSPACE" ]
-then
- echo Initializing workspace
- cd ..
- export EDK_TOOLS_PATH=`pwd`/BaseTools
- source edksetup.sh BaseTools
-else
- echo Building from: $WORKSPACE
-fi
-
-#
-# Pick a default tool type for a given OS
-#
-case `uname` in
- CYGWIN*)
- TARGET_TOOLS=RVCT31CYGWIN
- ;;
- Linux*)
- # Not tested
- TARGET_TOOLS=ARMGCC
- ;;
- Darwin*)
- Major=$(uname -r | cut -f 1 -d '.')
- if [[ $Major == 9 ]]
- then
- # Not supported by this open source project
- TARGET_TOOLS=XCODE31
- else
- TARGET_TOOLS=XCODE32
- fi
- ;;
-esac
-
-TARGET=DEBUG
-for arg in "$@"
-do
- if [[ $arg == RELEASE ]];
- then
- TARGET=RELEASE
- fi
-done
-
-BUILD_ROOT=$WORKSPACE/Build/ArmEb/"$TARGET"_"$TARGET_TOOLS"
-
-if [[ ! -e $EDK_TOOLS_PATH/Source/C/bin ]];
-then
- # build the tools if they don't yet exist
- echo Building tools: $EDK_TOOLS_PATH
- make -C $EDK_TOOLS_PATH
-else
- echo using prebuilt tools
-fi
-
-#
-# Build the edk2 ArmEb code
-#
-if [[ $TARGET == RELEASE ]]; then
- build -p $WORKSPACE/ArmEbPkg/ArmEbPkg.dsc -a ARM -t $TARGET_TOOLS -b $TARGET -D DEBUG_TARGET=RELEASE $2 $3 $4 $5 $6 $7 $8
-else
- build -p $WORKSPACE/ArmEbPkg/ArmEbPkg.dsc -a ARM -t $TARGET_TOOLS -b $TARGET $1 $2 $3 $4 $5 $6 $7 $8
-fi
-
-
-for arg in "$@"
-do
- if [[ $arg == clean ]]; then
- # no need to post process if we are doing a clean
- exit
- elif [[ $arg == cleanall ]]; then
- make -C $EDK_TOOLS_PATH clean
- exit
-
- fi
-done
-
-
-echo Creating debugger scripts
-process_debug_scripts $WORKSPACE/ArmEbPkg/Debugger_scripts
-
--- /dev/null
+/**@file\r
+\r
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ MemoryInit.c\r
+ \r
+Abstract:\r
+\r
+ PEIM to provide fake memory init\r
+\r
+**/\r
+\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <PiPei.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/DebugLib.h>\r
+#include <Library/PeimEntryPoint.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Library/ArmLib.h>\r
+\r
+//\r
+// Module globals\r
+//\r
+\r
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
+\r
+VOID\r
+JamArmMmuConfig ( VOID )\r
+{\r
+ UINT32 CacheAttributes;\r
+ ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[3];\r
+ VOID *TranslationTableBase;\r
+ UINTN TranslationTableSize;\r
+\r
+ if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
+ } else {\r
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
+ }\r
+\r
+ // DDR\r
+ MemoryTable[0].PhysicalBase = 0;\r
+ MemoryTable[0].VirtualBase = 0;\r
+ MemoryTable[0].Length = 0x10000000;\r
+ MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
+\r
+ // SOC Registers. L3 interconnects\r
+ MemoryTable[1].PhysicalBase = 0x10000000;\r
+ MemoryTable[1].VirtualBase = 0x10000000;\r
+ MemoryTable[1].Length = 0xF0000000;\r
+ MemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
+\r
+ // End of Table\r
+ MemoryTable[2].PhysicalBase = 0;\r
+ MemoryTable[2].VirtualBase = 0;\r
+ MemoryTable[2].Length = 0;\r
+ MemoryTable[2].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
+ \r
+ ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
+ \r
+ BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
+}\r
+\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+InitializeCpuPeim (\r
+ IN EFI_PEI_FILE_HANDLE FileHandle,\r
+ IN CONST EFI_PEI_SERVICES **PeiServices\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ \r
+\r
+Arguments:\r
+\r
+ FileHandle - Handle of the file being invoked.\r
+ PeiServices - Describes the list of possible PEI Services.\r
+ \r
+Returns:\r
+\r
+ Status - EFI_SUCCESS if the boot mode could be set\r
+\r
+--*/\r
+{\r
+ // Enable program flow prediction, if supported.\r
+ ArmEnableBranchPrediction ();\r
+\r
+ JamArmMmuConfig();\r
+\r
+ return EFI_SUCCESS;\r
+}\r
--- /dev/null
+## @file\r
+# Component description file for BootMode module\r
+#\r
+# This module provides platform specific function to detect boot mode.\r
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = CpuPei\r
+ FILE_GUID = 2FD8B7AD-F8FA-4021-9FC0-0AA572147CDC\r
+ MODULE_TYPE = PEIM\r
+ VERSION_STRING = 1.0\r
+\r
+ ENTRY_POINT = InitializeCpuPeim\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ CpuPei.c\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmPkg/ArmPkg.dec\r
+\r
+[LibraryClasses]\r
+ PeimEntryPoint\r
+ DebugLib\r
+ HobLib\r
+ ArmLib\r
+\r
+[Ppis]\r
+\r
+[FixedPcd]\r
+\r
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable \r
+\r
+[depex]\r
+ gEfiPeiMemoryDiscoveredPpiGuid\r
+ \r
--- /dev/null
+#/** @file
+# Arm RealView EB package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = ArmRealViewEbPkg
+ PACKAGE_GUID = 44577A0D-361A-45B2-B33D-BB9EE60D5A4F
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+ Include # Root include for the package
+
+[Guids.common]
+ gArmRealViewEbPkgTokenSpaceGuid = { 0x44577A0D, 0x361A, 0x45B2, { 0xb3, 0x3d, 0xbb, 0x9e, 0xe6, 0x0d, 0x5a, 0x4f} }
+
+[PcdsFeatureFlag.common]
+
+[PcdsFixedAtBuild.common]
+ gArmRealViewEbPkgTokenSpaceGuid.PcdConsoleUartBase|0x10009000|UINT32|0x00000001
+ gArmRealViewEbPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000|UINT32|0x00000002
+ gArmRealViewEbPkgTokenSpaceGuid.PcdPeiServicePtrAddr|0|UINT32|0x00000003
--- /dev/null
+#/** @file\r
+# ARM RealViewEB package.\r
+#\r
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+ PLATFORM_NAME = ArmRealViewEbPkg\r
+ PLATFORM_GUID = F4C1AD3E-9D3E-4F61-8791-B3BB1C43D04C\r
+ PLATFORM_VERSION = 0.1\r
+ DSC_SPECIFICATION = 0x00010005\r
+ OUTPUT_DIRECTORY = Build/ArmRealViewEb\r
+ SUPPORTED_ARCHITECTURES = ARM\r
+ BUILD_TARGETS = DEBUG|RELEASE\r
+ SKUID_IDENTIFIER = DEFAULT\r
+ FLASH_DEFINITION = ArmRealViewEbPkg/ArmRealViewEbPkg.fdf\r
+\r
+\r
+[LibraryClasses.common]\r
+!if $(BUILD_TARGETS) == RELEASE\r
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
+ UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf\r
+!else\r
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf\r
+ UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf\r
+# UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf\r
+!endif\r
+\r
+ ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf\r
+ \r
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf\r
+ BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf\r
+\r
+ EfiResetSystemLib|ArmRealViewEbPkg/Library/ResetSystemLib/ResetSystemLib.inf\r
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf\r
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
+ \r
+ EblCmdLib|BeagleBoardPkg/Library/EblCmdLib/EblCmdLib.inf\r
+ EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf\r
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
+ \r
+ #\r
+ # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window \r
+ # in the debugger will show load and unload commands for symbols. You can cut and paste this\r
+ # into the command window to load symbols. We should be able to use a script to do this, but\r
+ # the version of RVD I have does not support scipts accessing system memory.\r
+ #\r
+# PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf\r
+ PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf\r
+# PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf\r
+\r
+ \r
+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf\r
+ DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf\r
+ \r
+ SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf\r
+ \r
+ RealTimeClockLib|ArmRealViewEbPkg/Library/RealTimeClockLib/RealTimeClockLib.inf\r
+\r
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
+ \r
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
+ \r
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf\r
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf\r
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf\r
+\r
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf\r
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf\r
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf\r
+\r
+#\r
+# Assume everything is fixed at build\r
+#\r
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+\r
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf\r
+ \r
+\r
+ EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf\r
+\r
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
+\r
+ EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf\r
+ \r
+ ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf\r
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf\r
+ DebugAgentTimerLib|ArmRealViewEbPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf\r
+\r
+ SerialPortLib|ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.inf\r
+ #TimerLib|ArmRealViewEbPkg/Library/TimerLib/TimerLib.inf \r
+ TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf \r
+ SerialPortLib|ArmRealViewEbPkg/Library/SerialPortLib/SerialPortLib.inf\r
+ GdbSerialLib|ArmRealViewEbPkg/Library/GdbSerialLib/GdbSerialLib.inf\r
+ DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf\r
+\r
+\r
+[LibraryClasses.common.SEC]\r
+ ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf\r
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf\r
+ \r
+ # 1/123 faster than Stm or Vstm version\r
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf\r
+\r
+ # Uncomment to turn on GDB stub in SEC. \r
+ #DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf\r
+\r
+[LibraryClasses.common.PEI_CORE]\r
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf\r
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
+ # note: this won't actually work since globals in PEI are not writeable\r
+ # need to generate an ARM PEI services table pointer implementation\r
+ PeiServicesTablePointerLib|ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf\r
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
+ PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf\r
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf\r
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf\r
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf\r
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf\r
+\r
+[LibraryClasses.common.PEIM]\r
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf\r
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
+ # note: this won't actually work since globals in PEI are not writeable\r
+ # need to generate an ARM PEI services table pointer implementation\r
+ PeiServicesTablePointerLib|ArmRealViewEbPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf\r
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf\r
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf\r
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf\r
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf\r
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
+ PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf\r
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf\r
+\r
+[LibraryClasses.common.DXE_CORE]\r
+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf\r
+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf\r
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf\r
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf\r
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf\r
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf\r
+# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
+\r
+ PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf\r
+ \r
+\r
+[LibraryClasses.common.DXE_DRIVER]\r
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf\r
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf\r
+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf\r
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
+\r
+\r
+[LibraryClasses.common.UEFI_APPLICATION]\r
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf\r
+ UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf\r
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
+\r
+[LibraryClasses.common.UEFI_DRIVER]\r
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf\r
+ UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf\r
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf\r
+ PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
+\r
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]\r
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf\r
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf\r
+# PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf\r
+\r
+[LibraryClasses.ARM]\r
+ #\r
+ # It is not possible to prevent the ARM compiler for generic intrinsic functions.\r
+ # This library provides the instrinsic functions generate by a given compiler.\r
+ # [LibraryClasses.ARM] and NULL mean link this library into all ARM images.\r
+ #\r
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf\r
+\r
+\r
+[BuildOptions]\r
+ RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A8 --thumb\r
+ RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A8 \r
+ RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG \r
+\r
+ GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb \r
+ GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a\r
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG \r
+\r
+ XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7\r
+ XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7\r
+ XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7\r
+ XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG \r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform\r
+#\r
+################################################################################\r
+\r
+[PcdsFeatureFlag.common]\r
+ gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE\r
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE\r
+ gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE\r
+ gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE\r
+ \r
+ gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE\r
+\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE\r
+ \r
+[PcdsFixedAtBuild.common]\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmEb %a"\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0\r
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000\r
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000\r
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000\r
+ gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000\r
+ gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF\r
+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1\r
+ gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0\r
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320\r
+\r
+# DEBUG_ASSERT_ENABLED 0x01\r
+# DEBUG_PRINT_ENABLED 0x02\r
+# DEBUG_CODE_ENABLED 0x04\r
+# CLEAR_MEMORY_ENABLED 0x08\r
+# ASSERT_BREAKPOINT_ENABLED 0x10\r
+# ASSERT_DEADLOOP_ENABLED 0x20\r
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f\r
+\r
+# DEBUG_INIT 0x00000001 // Initialization\r
+# DEBUG_WARN 0x00000002 // Warnings\r
+# DEBUG_LOAD 0x00000004 // Load events\r
+# DEBUG_FS 0x00000008 // EFI File system\r
+# DEBUG_POOL 0x00000010 // Alloc & Free's\r
+# DEBUG_PAGE 0x00000020 // Alloc & Free's\r
+# DEBUG_INFO 0x00000040 // Verbose\r
+# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers\r
+# DEBUG_VARIABLE 0x00000100 // Variable\r
+# DEBUG_BM 0x00000400 // Boot Manager\r
+# DEBUG_BLKIO 0x00001000 // BlkIo Driver\r
+# DEBUG_NET 0x00004000 // SNI Driver\r
+# DEBUG_UNDI 0x00010000 // UNDI Driver\r
+# DEBUG_LOADFILE 0x00020000 // UNDI Driver\r
+# DEBUG_EVENT 0x00080000 // Event messages\r
+# DEBUG_ERROR 0x80000000 // Error\r
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0xffffffcf\r
+\r
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07\r
+\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000\r
+#\r
+# Optional feature to help prevent EFI memory map fragments\r
+# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob\r
+# Values are in EFI Pages (4K). DXE Core will make sure that \r
+# at least this much of each type of memory can be allocated \r
+# from a single memory range. This way you only end up with\r
+# maximum of two fragements for each type in the memory map\r
+# (the memory used, and the free memory that was prereserved\r
+# but not used).\r
+#\r
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000\r
+ #gArmTokenSpaceGuid.PcdCpuResetAddress|0x40000000 # set to start of NOR\r
+ gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds|77\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz|13000000\r
+ \r
+ #\r
+ # ARM Pcds\r
+ #\r
+ gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000\r
+\r
+ #\r
+ # ARM EB PCDS\r
+ #\r
+ gArmRealViewEbPkgTokenSpaceGuid.PcdConsoleUartBase|0x10009000\r
+ gArmRealViewEbPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000\r
+ \r
+ # change these together\r
+ gArmRealViewEbPkgTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # pei services ptr just above stack\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x48000000 # stack at top of SRAM\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x00020000 # 128K stack\r
+ \r
+ \r
+\r
+\r
+################################################################################\r
+#\r
+# Components Section - list of all EDK II Modules needed by this Platform\r
+#\r
+################################################################################\r
+[Components.common]\r
+ \r
+#\r
+# SEC\r
+#\r
+ ArmRealViewEbPkg/SecForPei/Sec.inf\r
+\r
+#\r
+# PEI Phase modules\r
+#\r
+MdeModulePkg/Core/Pei/PeiMain.inf\r
+MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
+ <LibraryClasses>\r
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+}\r
+ArmPkg/Drivers/CpuPei/CpuPei.inf\r
+ArmRealViewEbPkg/PlatformPei/PlatformPei.inf\r
+ArmRealViewEbPkg/MemoryInitPei/MemoryInitPei.inf\r
+IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
+Nt32Pkg/BootModePei/BootModePei.inf\r
+#Nt32Pkg/StallPei/StallPei.inf\r
+#Nt32Pkg/WinNtFlashMapPei/WinNtFlashMapPei.inf\r
+MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
+#Nt32Pkg/WinNtFirmwareVolumePei/WinNtFirmwareVolumePei.inf\r
+MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
+\r
+#\r
+# DXE\r
+#\r
+ MdeModulePkg/Core/Dxe/DxeMain.inf {\r
+ <LibraryClasses>\r
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf\r
+ NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
+ }\r
+\r
+ ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
+ \r
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
+ MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf\r
+ \r
+ EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf\r
+ EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf\r
+ \r
+ EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
+ EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
+ EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
+\r
+ ArmRealViewEbPkg/InterruptDxe/InterruptDxe.inf\r
+ ArmRealViewEbPkg/TimerDxe/TimerDxe.inf\r
+\r
+ #\r
+ # Semi-hosting filesystem\r
+ #\r
+ ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
+ \r
+ #\r
+ # FAT filesystem + GPT/MBR partitioning\r
+ #\r
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
+ FatPkg/EnhancedFatDxe/Fat.inf\r
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
+ \r
+ \r
+ #\r
+ # Application\r
+ # \r
+ EmbeddedPkg/Ebl/Ebl.inf\r
+\r
+ #\r
+ # Bds\r
+ #\r
+ ArmRealViewEbPkg/Bds/Bds.inf \r
+\r
+ #\r
+ # Example Application\r
+ # \r
+ MdeModulePkg/Application/HelloWorld/HelloWorld.inf\r
+\r
--- /dev/null
+# FLASH layout file for ARM RealView EB.\r
+#\r
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+\r
+################################################################################\r
+#\r
+# FD Section\r
+# The [FD] Section is made up of the definition statements and a\r
+# description of what goes into the Flash Device Image. Each FD section\r
+# defines one flash "device" image. A flash device image may be one of\r
+# the following: Removable media bootable image (like a boot floppy\r
+# image,) an Option ROM image (that would be "flashed" into an add-in\r
+# card,) a System "Flash" image (that would be burned into a system's\r
+# flash) or an Update ("Capsule") image that will be used to update and\r
+# existing system flash.\r
+#\r
+################################################################################\r
+\r
+\r
+[FD.ArmRealViewEb_EFI]\r
+BaseAddress = 0x40000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.\r
+Size = 0x00200000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device\r
+ErasePolarity = 1\r
+BlockSize = 0x00010000\r
+NumBlocks = 0x20\r
+\r
+################################################################################\r
+#\r
+# Following are lists of FD Region layout which correspond to the locations of different\r
+# images within the flash device.\r
+#\r
+# Regions must be defined in ascending order and may not overlap.\r
+#\r
+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
+# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
+# "0x" characters. Like:\r
+# Offset|Size\r
+# PcdOffsetCName|PcdSizeCName\r
+# RegionType <FV, DATA, or FILE>\r
+#\r
+################################################################################\r
+\r
+0x00000000|0x001F0000\r
+gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize\r
+FV = FVMAIN_COMPACT\r
+\r
+0x001F0000|0x00010000\r
+gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
+#NV_VARIABLE_STORE\r
+DATA = {\r
+ ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
+ # ZeroVector []\r
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+ # FileSystemGuid: gEfiSystemNvDataFvGuid =\r
+ # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
+ 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
+ 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
+ # FvLength: 0x20000\r
+ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+ #Signature "_FVH" #Attributes\r
+ 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
+ #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
+ 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02,\r
+ #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block\r
+ 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,\r
+ #Blockmap[1]: End\r
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+ ## This is the VARIABLE_STORE_HEADER\r
+ #Signature: gEfiVariableGuid =\r
+ # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
+ 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
+ 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
+ #Size: 0xc000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xBFB8\r
+ # This can speed up the Variable Dispatch a bit.\r
+ 0xB8, 0xBF, 0x00, 0x00,\r
+ #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
+ 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
+}\r
+\r
+################################################################################\r
+#\r
+# FV Section\r
+#\r
+# [FV] section is used to define what components or modules are placed within a flash\r
+# device file. This section also defines order the components and modules are positioned\r
+# within the image. The [FV] section consists of define statements, set statements and\r
+# module statements.\r
+#\r
+################################################################################\r
+\r
+[FV.FvMain]\r
+BlockSize = 0x40\r
+NumBlocks = 0 # This FV gets compressed so make it just big enough\r
+FvAlignment = 8 # FV alignment and FV attributes setting.\r
+ERASE_POLARITY = 1\r
+MEMORY_MAPPED = TRUE\r
+STICKY_WRITE = TRUE\r
+LOCK_CAP = TRUE\r
+LOCK_STATUS = TRUE\r
+WRITE_DISABLED_CAP = TRUE\r
+WRITE_ENABLED_CAP = TRUE\r
+WRITE_STATUS = TRUE\r
+WRITE_LOCK_CAP = TRUE\r
+WRITE_LOCK_STATUS = TRUE\r
+READ_DISABLED_CAP = TRUE\r
+READ_ENABLED_CAP = TRUE\r
+READ_STATUS = TRUE\r
+READ_LOCK_CAP = TRUE\r
+READ_LOCK_STATUS = TRUE\r
+\r
+ #INF MdeModulePkg/Core/Dxe/DxeMain.inf \r
+\r
+ #\r
+ # PI DXE Drivers producing Architectural Protocols (EFI Services) \r
+ #\r
+ INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf\r
+ \r
+ INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
+ INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
+ INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
+ INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf\r
+ INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf\r
+ \r
+ INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf\r
+\r
+ INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf\r
+ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf\r
+ INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf\r
+ \r
+ INF ArmRealViewEbPkg/InterruptDxe/InterruptDxe.inf\r
+ INF ArmRealViewEbPkg/TimerDxe/TimerDxe.inf\r
+\r
+ #\r
+ # Semi-hosting filesystem\r
+ #\r
+ INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf\r
+ \r
+ #\r
+ # FAT filesystem + GPT/MBR partitioning\r
+ #\r
+ INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
+ INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
+ INF FatPkg/EnhancedFatDxe/Fat.inf\r
+ INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
+\r
+ #\r
+ # UEFI application (Shell Embedded Boot Loader) \r
+ # \r
+ INF EmbeddedPkg/Ebl/Ebl.inf\r
+ \r
+\r
+ #\r
+ # Bds\r
+ #\r
+ INF ArmRealViewEbPkg/Bds/Bds.inf\r
+\r
+\r
+[FV.FVMAIN_COMPACT]\r
+FvAlignment = 8\r
+ERASE_POLARITY = 1\r
+MEMORY_MAPPED = TRUE\r
+STICKY_WRITE = TRUE\r
+LOCK_CAP = TRUE\r
+LOCK_STATUS = TRUE\r
+WRITE_DISABLED_CAP = TRUE\r
+WRITE_ENABLED_CAP = TRUE\r
+WRITE_STATUS = TRUE\r
+WRITE_LOCK_CAP = TRUE\r
+WRITE_LOCK_STATUS = TRUE\r
+READ_DISABLED_CAP = TRUE\r
+READ_ENABLED_CAP = TRUE\r
+READ_STATUS = TRUE\r
+READ_LOCK_CAP = TRUE\r
+READ_LOCK_STATUS = TRUE\r
+\r
+ INF ArmRealViewEbPkg/SecForPei/Sec.inf\r
+ INF MdeModulePkg/Core/Pei/PeiMain.inf\r
+ INF ArmPkg/Drivers/CpuPei/CpuPei.inf\r
+ INF ArmRealViewEbPkg/PlatformPei/PlatformPei.inf\r
+ INF ArmRealViewEbPkg/MemoryInitPei/MemoryInitPei.inf\r
+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
+ INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
+ INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
+ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
+ \r
+ # note: this needs to back in fvmaincompressed\r
+ # need to add decompression of fvmain\r
+ INF MdeModulePkg/Core/Dxe/DxeMain.inf \r
+\r
+ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
+ SECTION FV_IMAGE = FVMAIN\r
+ }\r
+ }\r
+\r
+\r
+################################################################################\r
+#\r
+# Rules are use with the [FV] section's module INF type to define\r
+# how an FFS file is created for a given INF file. The following Rule are the default\r
+# rules for the different module type. User can add the customized rules to define the\r
+# content of the FFS file.\r
+#\r
+################################################################################\r
+\r
+\r
+############################################################################\r
+# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # \r
+############################################################################\r
+#\r
+#[Rule.Common.DXE_DRIVER]\r
+# FILE DRIVER = $(NAMED_GUID) {\r
+# DXE_DEPEX DXE_DEPEX Optional |.depex\r
+# COMPRESS PI_STD {\r
+# GUIDED {\r
+# PE32 PE32 |.efi\r
+# UI STRING="$(MODULE_NAME)" Optional\r
+# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
+# }\r
+# }\r
+# }\r
+#\r
+############################################################################\r
+\r
+[Rule.Common.SEC]\r
+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
+ TE TE Align = 8 |.efi\r
+ }\r
+\r
+[Rule.Common.PEI_CORE]\r
+ FILE PEI_CORE = $(NAMED_GUID) {\r
+ TE TE |.efi\r
+ UI STRING ="$(MODULE_NAME)" Optional \r
+ }\r
+\r
+[Rule.Common.PEIM]\r
+ FILE PEIM = $(NAMED_GUID) {\r
+ PEI_DEPEX PEI_DEPEX Optional |.depex\r
+ TE TE |.efi\r
+ UI STRING="$(MODULE_NAME)" Optional \r
+ }\r
+\r
+[Rule.Common.PEIM.TIANOCOMPRESSED]\r
+ FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {\r
+ PEI_DEPEX PEI_DEPEX Optional |.depex\r
+ GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
+ PE32 PE32 |.efi\r
+ UI STRING="$(MODULE_NAME)" Optional\r
+ }\r
+ }\r
+\r
+[Rule.Common.DXE_CORE]\r
+ FILE DXE_CORE = $(NAMED_GUID) {\r
+ PE32 PE32 |.efi\r
+ UI STRING="$(MODULE_NAME)" Optional\r
+ }\r
+\r
+\r
+[Rule.Common.UEFI_DRIVER]\r
+ FILE DRIVER = $(NAMED_GUID) {\r
+ DXE_DEPEX DXE_DEPEX Optional |.depex\r
+ PE32 PE32 |.efi\r
+ UI STRING="$(MODULE_NAME)" Optional\r
+ }\r
+\r
+[Rule.Common.DXE_DRIVER]\r
+ FILE DRIVER = $(NAMED_GUID) {\r
+ DXE_DEPEX DXE_DEPEX Optional |.depex\r
+ PE32 PE32 |.efi\r
+ UI STRING="$(MODULE_NAME)" Optional\r
+ }\r
+\r
+[Rule.Common.DXE_RUNTIME_DRIVER]\r
+ FILE DRIVER = $(NAMED_GUID) {\r
+ DXE_DEPEX DXE_DEPEX Optional |.depex\r
+ PE32 PE32 |.efi\r
+ UI STRING="$(MODULE_NAME)" Optional\r
+ }\r
+\r
+\r
+[Rule.Common.UEFI_APPLICATION]\r
+ FILE APPLICATION = $(NAMED_GUID) {\r
+ UI STRING ="$(MODULE_NAME)" Optional \r
+ PE32 PE32 |.efi\r
+ }\r
--- /dev/null
+\r
+#/** @file\r
+# \r
+# Component discription file for Bds module\r
+# \r
+# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# \r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+# \r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbBds\r
+ FILE_GUID = B404835D-EB9F-41c6-BE0C-C815B4FE3437\r
+ MODULE_TYPE = DXE_DRIVER\r
+ VERSION_STRING = 1.0\r
+\r
+ ENTRY_POINT = BdsInitialize\r
+\r
+[Sources.common]\r
+ BdsEntry.c\r
+ FirmwareVolume.c\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+\r
+[LibraryClasses]\r
+ DevicePathLib\r
+ BaseLib\r
+ HobLib\r
+ UefiRuntimeServicesTableLib\r
+ ReportStatusCodeLib\r
+ PerformanceLib\r
+ DxeServicesTableLib\r
+ MemoryAllocationLib\r
+ UefiLib\r
+ UefiBootServicesTableLib\r
+ BaseMemoryLib\r
+ DebugLib\r
+ PrintLib\r
+ UefiDriverEntryPoint\r
+\r
+[Guids]\r
+ \r
+\r
+[Protocols]\r
+ gEfiBdsArchProtocolGuid \r
+ gEfiSimpleTextInProtocolGuid \r
+ gEfiSimpleTextOutProtocolGuid \r
+ gEfiSerialIoProtocolGuid \r
+ gEfiDevicePathProtocolGuid\r
+ gEfiSimpleFileSystemProtocolGuid\r
+ gEfiUsbIoProtocolGuid\r
+ gEfiFirmwareVolume2ProtocolGuid\r
+\r
+\r
+[FeaturePcd] \r
+\r
+[FixedPcd]\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize\r
+\r
+[Depex]\r
+ TRUE\r
--- /dev/null
+/** @file\r
+ The entry of the embedded BDS. This BDS does not follow the Boot Manager requirements \r
+ of the UEFI specification as it is designed to implement an embedded systmes \r
+ propriatary boot scheme.\r
+\r
+ This template assume a DXE driver produces a SerialIo protocol not using the EFI \r
+ driver module and it will attempt to connect a console on top of this.\r
+\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "BdsEntry.h"\r
+\r
+\r
+BOOLEAN gConsolePresent = FALSE;\r
+\r
+\r
+EFI_HANDLE mBdsImageHandle = NULL;\r
+EFI_BDS_ARCH_PROTOCOL gBdsProtocol = {\r
+ BdsEntry,\r
+};\r
+\r
+\r
+ \r
+ \r
+/**\r
+ This function uses policy data from the platform to determine what operating \r
+ system or system utility should be loaded and invoked. This function call \r
+ also optionally make the use of user input to determine the operating system \r
+ or system utility to be loaded and invoked. When the DXE Core has dispatched \r
+ all the drivers on the dispatch queue, this function is called. This \r
+ function will attempt to connect the boot devices required to load and invoke \r
+ the selected operating system or system utility. During this process, \r
+ additional firmware volumes may be discovered that may contain addition DXE \r
+ drivers that can be dispatched by the DXE Core. If a boot device cannot be \r
+ fully connected, this function calls the DXE Service Dispatch() to allow the \r
+ DXE drivers from any newly discovered firmware volumes to be dispatched. \r
+ Then the boot device connection can be attempted again. If the same boot \r
+ device connection operation fails twice in a row, then that boot device has \r
+ failed, and should be skipped. This function should never return.\r
+\r
+ @param This The EFI_BDS_ARCH_PROTOCOL instance.\r
+\r
+ @return None.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BdsEntry (\r
+ IN EFI_BDS_ARCH_PROTOCOL *This\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINTN NoHandles;\r
+ EFI_HANDLE *Buffer;\r
+ EFI_HANDLE FvHandle;\r
+ EFI_HANDLE ImageHandle;\r
+ EFI_HANDLE UsbDeviceHandle;\r
+ EFI_GUID NameGuid;\r
+ UINTN Size;\r
+ UINTN HandleCount;\r
+ UINTN OldHandleCount;\r
+ EFI_HANDLE *HandleBuffer;\r
+ UINTN Index;\r
+ EFI_DEVICE_PATH_PROTOCOL *LoadImageDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL *FileSystemDevicePath;\r
+ \r
+ PERF_END (NULL, "DXE", NULL, 0);\r
+ PERF_START (NULL, "BDS", NULL, 0);\r
+\r
+\r
+ //\r
+ // Now do the EFI stuff\r
+ //\r
+ Size = 0x100;\r
+ gST->FirmwareVendor = AllocateRuntimePool (Size);\r
+ ASSERT (gST->FirmwareVendor != NULL);\r
+ \r
+ UnicodeSPrint (gST->FirmwareVendor, Size, L"BeagleBoard EFI %a %a", __DATE__, __TIME__);\r
+\r
+ //\r
+ // Now we need to setup the EFI System Table with information about the console devices.\r
+ // This code is normally in the console spliter driver on platforms that support multiple \r
+ // consoles at the same time\r
+ //\r
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiSimpleTextOutProtocolGuid, NULL, &NoHandles, &Buffer);\r
+ if (!EFI_ERROR (Status)) {\r
+ // Use the first SimpleTextOut we find and update the EFI System Table\r
+ gST->ConsoleOutHandle = Buffer[0];\r
+ gST->StandardErrorHandle = Buffer[0];\r
+ Status = gBS->HandleProtocol (Buffer[0], &gEfiSimpleTextOutProtocolGuid, (VOID **)&gST->ConOut);\r
+ ASSERT_EFI_ERROR (Status);\r
+ \r
+ gST->StdErr = gST->ConOut;\r
+ \r
+ gST->ConOut->OutputString (gST->ConOut, L"BDS: Console Started!!!!\n\r");\r
+ FreePool (Buffer);\r
+ \r
+ gConsolePresent = TRUE;\r
+ } \r
+ \r
+\r
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiSimpleTextInProtocolGuid, NULL, &NoHandles, &Buffer);\r
+ if (!EFI_ERROR (Status)) {\r
+ // Use the first SimpleTextIn we find and update the EFI System Table\r
+ gST->ConsoleInHandle = Buffer[0];\r
+ Status = gBS->HandleProtocol (Buffer[0], &gEfiSimpleTextInProtocolGuid, (VOID **)&gST->ConIn);\r
+ ASSERT_EFI_ERROR (Status);\r
+ \r
+ FreePool (Buffer);\r
+ }\r
+\r
+ //\r
+ // We now have EFI Consoles up and running. Print () will work now. DEBUG () and ASSERT () worked \r
+ // prior to this point as they were configured to use a more primative output scheme.\r
+ //\r
+\r
+ //\r
+ //Perform Connect\r
+ //\r
+ HandleCount = 0;\r
+ while (1) {\r
+ OldHandleCount = HandleCount;\r
+ Status = gBS->LocateHandleBuffer (\r
+ AllHandles,\r
+ NULL,\r
+ NULL,\r
+ &HandleCount,\r
+ &HandleBuffer\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ break;\r
+ }\r
+ \r
+ if (HandleCount == OldHandleCount) {\r
+ break;\r
+ }\r
+\r
+ for (Index = 0; Index < HandleCount; Index++) {\r
+ gBS->ConnectController (HandleBuffer[Index], NULL, NULL, TRUE);\r
+ }\r
+ }\r
+\r
+ EfiSignalEventReadyToBoot ();\r
+\r
+ //Locate handles for SimpleFileSystem protocol\r
+ Status = gBS->LocateHandleBuffer (\r
+ ByProtocol,\r
+ &gEfiSimpleFileSystemProtocolGuid,\r
+ NULL,\r
+ &HandleCount,\r
+ &HandleBuffer\r
+ );\r
+ if (!EFI_ERROR(Status)) {\r
+ for (Index = 0; Index < HandleCount; Index++) {\r
+ //Get the device path\r
+ FileSystemDevicePath = DevicePathFromHandle(HandleBuffer[Index]);\r
+ if (FileSystemDevicePath == NULL) {\r
+ continue;\r
+ }\r
+\r
+ //Check if UsbIo is on any handles in the device path.\r
+ Status = gBS->LocateDevicePath(&gEfiUsbIoProtocolGuid, &FileSystemDevicePath, &UsbDeviceHandle);\r
+ if (EFI_ERROR(Status)) {\r
+ continue;\r
+ }\r
+\r
+ //Check if Usb stick has a magic EBL file.\r
+ LoadImageDevicePath = FileDevicePath(HandleBuffer[Index], L"Ebl.efi");\r
+ Status = gBS->LoadImage (TRUE, gImageHandle, LoadImageDevicePath, NULL, 0, &ImageHandle);\r
+ if (EFI_ERROR(Status)) {\r
+ continue;\r
+ }\r
+\r
+ //Boot to Shell on USB stick.\r
+ Status = gBS->StartImage (ImageHandle, NULL, NULL);\r
+ if (EFI_ERROR(Status)) {\r
+ continue;\r
+ }\r
+ }\r
+ }\r
+ \r
+ //\r
+ // Normal UEFI behavior is to process Globally Defined Variables as defined in Chapter 3 \r
+ // (Boot Manager) of the UEFI specification. For this embedded system we don't do this.\r
+ //\r
+\r
+ //\r
+ // Search all the FVs for an application with a UI Section of Ebl. A .FDF file can be used\r
+ // to control the names of UI sections in an FV.\r
+ //\r
+ Status = FindApplicationMatchingUiSection (L"Ebl", &FvHandle, &NameGuid);\r
+ if (!EFI_ERROR (Status)) {\r
+\r
+ //Boot to Shell.\r
+ Status = LoadPeCoffSectionFromFv (FvHandle, &NameGuid);\r
+\r
+ if (EFI_ERROR(Status)) {\r
+ DEBUG((EFI_D_ERROR, "Boot from Shell failed. Status: %r\n", Status));\r
+ }\r
+ }\r
+\r
+ //\r
+ // EFI does not define the behaviour if all boot attemps fail and the last one returns. \r
+ // So we make a policy choice to reset the system since this BDS does not have a UI.\r
+ //\r
+ gRT->ResetSystem (EfiResetShutdown, Status, 0, NULL);\r
+\r
+ return ;\r
+}\r
+\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+BdsInitialize (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+\r
+ mBdsImageHandle = ImageHandle;\r
+\r
+ //\r
+ // Install protocol interface\r
+ //\r
+ Status = gBS->InstallMultipleProtocolInterfaces (\r
+ &mBdsImageHandle,\r
+ &gEfiBdsArchProtocolGuid, &gBdsProtocol,\r
+ NULL\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ return Status;\r
+}\r
+\r
+\r
--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __BDS_ENTRY_H__\r
+#define __BDS_ENTRY_H__\r
+\r
+#include <PiDxe.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PrintLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/UefiLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/DxeServicesTableLib.h>\r
+#include <Library/UefiRuntimeServicesTableLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Library/DevicePathLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/PrintLib.h>\r
+#include <Library/PerformanceLib.h>\r
+\r
+#include <Protocol/Bds.h>\r
+#include <Protocol/SerialIo.h>\r
+#include <Protocol/FirmwareVolume2.h>\r
+#include <Protocol/SimpleTextIn.h>\r
+#include <Protocol/SimpleTextOut.h>\r
+#include <Protocol/EmbeddedDevice.h>\r
+#include <Protocol/DevicePath.h>\r
+#include <Protocol/SimpleFileSystem.h>\r
+#include <Protocol/UsbIo.h>\r
+\r
+\r
+EFI_STATUS\r
+LoadPeCoffSectionFromFv (\r
+ IN EFI_HANDLE FvHandle, \r
+ IN EFI_GUID *NameGuid\r
+ );\r
+\r
+EFI_STATUS\r
+FindApplicationMatchingUiSection (\r
+ IN CHAR16 *UiString,\r
+ OUT EFI_HANDLE *FvHandle,\r
+ OUT EFI_GUID *NameGuid\r
+ );\r
+\r
+VOID\r
+EFIAPI\r
+BdsEntry (\r
+ IN EFI_BDS_ARCH_PROTOCOL *This\r
+ );\r
+\r
+#endif\r
+\r
--- /dev/null
+/** @file\r
+ The entry of the embedded BDS. This BDS does not follow the Boot Manager requirements \r
+ of the UEFI specification as it is designed to implement an embedded systmes \r
+ propriatary boot scheme.\r
+\r
+ This template assume a DXE driver produces a SerialIo protocol not using the EFI \r
+ driver module and it will attempt to connect a console on top of this.\r
+\r
+ \r
+ Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "BdsEntry.h"\r
+\r
+\r
+EFI_STATUS\r
+FindApplicationMatchingUiSection (\r
+ IN CHAR16 *UiString,\r
+ OUT EFI_HANDLE *FvHandle,\r
+ OUT EFI_GUID *NameGuid\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_STATUS NextStatus;\r
+ UINTN NoHandles;\r
+ EFI_HANDLE *Buffer;\r
+ UINTN Index;\r
+ EFI_FV_FILETYPE FileType;\r
+ EFI_FIRMWARE_VOLUME2_PROTOCOL *Fv;\r
+ VOID *Key;\r
+ EFI_FV_FILE_ATTRIBUTES Attributes;\r
+ UINTN Size;\r
+ UINTN UiStringLen;\r
+ CHAR16 *UiSection;\r
+ UINT32 Authentication;\r
+ \r
+ \r
+ UiStringLen = 0;\r
+ if (UiString != NULL) {\r
+ DEBUG ((DEBUG_ERROR, "UiString %s\n", UiString));\r
+ UiStringLen = StrLen (UiString);\r
+ }\r
+ \r
+ Status = gBS->LocateHandleBuffer (ByProtocol, &gEfiFirmwareVolume2ProtocolGuid, NULL, &NoHandles, &Buffer);\r
+ if (!EFI_ERROR (Status)) {\r
+ for (Index = 0; Index < NoHandles; Index++) {\r
+ Status = gBS->HandleProtocol (Buffer[Index], &gEfiFirmwareVolume2ProtocolGuid, (VOID **)&Fv);\r
+ if (!EFI_ERROR (Status)) {\r
+ Key = AllocatePool (Fv->KeySize);\r
+ ASSERT (Key != NULL);\r
+ ZeroMem (Key, Fv->KeySize);\r
+ \r
+ FileType = EFI_FV_FILETYPE_APPLICATION;\r
+ \r
+ do {\r
+ NextStatus = Fv->GetNextFile (Fv, Key, &FileType, NameGuid, &Attributes, &Size);\r
+ if (!EFI_ERROR (NextStatus)) {\r
+ if (UiString == NULL) {\r
+ //\r
+ // If UiString is NULL match first application we find.\r
+ //\r
+ *FvHandle = Buffer[Index];\r
+ FreePool (Key);\r
+ return Status;\r
+ }\r
+ \r
+ UiSection = NULL;\r
+ Status = Fv->ReadSection (\r
+ Fv, \r
+ NameGuid, \r
+ EFI_SECTION_USER_INTERFACE, \r
+ 0,\r
+ (VOID **)&UiSection,\r
+ &Size,\r
+ &Authentication\r
+ );\r
+ if (!EFI_ERROR (Status)) {\r
+ if (StrnCmp (UiString, UiSection, UiStringLen) == 0) {\r
+ //\r
+ // We found a UiString match. \r
+ //\r
+ *FvHandle = Buffer[Index];\r
+ FreePool (Key);\r
+ FreePool (UiSection);\r
+ return Status;\r
+ }\r
+ FreePool (UiSection);\r
+ }\r
+ }\r
+ } while (!EFI_ERROR (NextStatus));\r
+ \r
+ FreePool (Key);\r
+ }\r
+ }\r
+ \r
+ FreePool (Buffer);\r
+ }\r
+\r
+ return EFI_NOT_FOUND;\r
+}\r
+\r
+\r
+EFI_DEVICE_PATH *\r
+FvFileDevicePath (\r
+ IN EFI_HANDLE FvHandle,\r
+ IN EFI_GUID *NameGuid\r
+ )\r
+{ \r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH NewNode;\r
+\r
+ DevicePath = DevicePathFromHandle (FvHandle);\r
+\r
+ EfiInitializeFwVolDevicepathNode (&NewNode, NameGuid);\r
+ \r
+ return AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&NewNode);\r
+}\r
+\r
+\r
+\r
+EFI_STATUS\r
+LoadPeCoffSectionFromFv (\r
+ IN EFI_HANDLE FvHandle, \r
+ IN EFI_GUID *NameGuid\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ EFI_HANDLE ImageHandle;\r
+\r
+ DevicePath = FvFileDevicePath (FvHandle, NameGuid);\r
+ \r
+ Status = gBS->LoadImage (TRUE, gImageHandle, DevicePath, NULL, 0, &ImageHandle);\r
+ if (!EFI_ERROR (Status)) {\r
+ PERF_END (NULL, "BDS", NULL, 0);\r
+ Status = gBS->StartImage (ImageHandle, NULL, NULL);\r
+ }\r
+ \r
+ return Status;\r
+}\r
+ \r
--- /dev/null
+// returns the base address of the SEC FV in flash on the EB board\r
+// change this address for where your platform's SEC FV is located\r
+// (or make it more intelligent to search for it)\r
+define /r FindFv()\r
+{\r
+ return 0x40000000;\r
+}\r
+.\r
+\r
+include /s 'ZZZZZZ/ArmRealViewEbPkg/Debugger_scripts/EfiFuncs.inc'\r
+error=continue\r
+unload ,all\r
+error=abort\r
+LoadPeiSec()\r
+include C:\loadfiles.inc\r
+\r
--- /dev/null
+error=abort\r
+\r
+// NOTE: THIS MAY NEED TO BE ADJUSTED\r
+// change to reflect the total amount of ram in your system\r
+define /r GetMaxMem()\r
+{\r
+ return 0x10000000; // 256 MB\r
+}\r
+.\r
+\r
+define /r GetWord(Addr)\r
+{\r
+ unsigned long data;\r
+ \r
+ if( (Addr & 0x2) == 0 )\r
+ {\r
+ data = dword(Addr);\r
+ data = data & 0xffff;\r
+ //$printf "getword data is %x\n", data$;\r
+ return data;\r
+ }\r
+ else\r
+ {\r
+ data = dword(Addr & 0xfffffffc);\r
+ //data = data >> 16;\r
+ data = data / 0x10000;\r
+ //$printf "getword data is %x (1)\n", data$;\r
+ return data;\r
+ }\r
+}\r
+.\r
+\r
+define /r ProcessPE32(imgstart)\r
+unsigned long imgstart;\r
+{\r
+ unsigned long filehdrstart;\r
+ unsigned long debugdirentryrva;\r
+ unsigned long debugtype;\r
+ unsigned long debugrva;\r
+ unsigned long dwarfsig;\r
+ unsigned long baseofcode;\r
+ unsigned long baseofdata;\r
+ unsigned long elfbase;\r
+ char *elfpath;\r
+\r
+ $printf "PE32 image found at %x",imgstart$;\r
+\r
+ //$printf "PE file hdr offset %x",dword(imgstart+0x3C)$;\r
+\r
+ // offset from dos hdr to PE file hdr\r
+ filehdrstart = imgstart + dword(imgstart+0x3C);\r
+\r
+ // offset to debug dir in PE hdrs\r
+ //$printf "debug dir is at %x",(filehdrstart+0xA8)$;\r
+ debugdirentryrva = dword(filehdrstart + 0xA8);\r
+ if(debugdirentryrva == 0)\r
+ {\r
+ $printf "no debug dir for image at %x",imgstart$;\r
+ return;\r
+ }\r
+\r
+ //$printf "debug dir entry rva is %x",debugdirentryrva$;\r
+\r
+ debugtype = dword(imgstart + debugdirentryrva + 0xc);\r
+ if( (debugtype != 0xdf) && (debugtype != 0x2) )\r
+ {\r
+ $printf "debug type is not dwarf for image at %x",imgstart$;\r
+ $printf "debug type is %x",debugtype$;\r
+ return;\r
+ }\r
+ \r
+ debugrva = dword(imgstart + debugdirentryrva + 0x14);\r
+ dwarfsig = dword(imgstart + debugrva);\r
+ if(dwarfsig != 0x66727764)\r
+ {\r
+ $printf "dwarf debug signature not found for image at %x",imgstart$;\r
+ return;\r
+ }\r
+\r
+ elfpath = (char *)(imgstart + debugrva + 0xc);\r
+\r
+ baseofcode = imgstart + dword(filehdrstart + 0x28);\r
+ baseofdata = imgstart + dword(filehdrstart + 0x2c);\r
+ \r
+ if( (baseofcode < baseofdata) && (baseofcode != 0) )\r
+ {\r
+ elfbase = baseofcode;\r
+ }\r
+ else\r
+ {\r
+ elfbase = baseofdata;\r
+ }\r
+\r
+ $printf "found path %s",elfpath$;\r
+ $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$;\r
+}\r
+.\r
+\r
+define /r ProcessTE(imgstart)\r
+unsigned long imgstart;\r
+{\r
+ unsigned long strippedsize;\r
+ unsigned long debugdirentryrva;\r
+ unsigned long debugtype;\r
+ unsigned long debugrva;\r
+ unsigned long dwarfsig;\r
+ unsigned long elfbase;\r
+ char *elfpath;\r
+\r
+ $printf "TE image found at %x",imgstart$;\r
+\r
+ // determine pe header bytes removed to account for in rva references\r
+ //strippedsize = word(imgstart + 0x6);\r
+ //strippedsize = (dword(imgstart + 0x4) & 0xffff0000) >> 16;\r
+ strippedsize = (dword(imgstart + 0x4) & 0xffff0000) / 0x10000;\r
+ strippedsize = strippedsize - 0x28;\r
+\r
+ debugdirentryrva = dword(imgstart + 0x20);\r
+ if(debugdirentryrva == 0)\r
+ {\r
+ $printf "no debug dir for image at %x",imgstart$;\r
+ return;\r
+ }\r
+ debugdirentryrva = debugdirentryrva - strippedsize;\r
+\r
+ //$printf "debug dir entry rva is %x",debugdirentryrva$;\r
+\r
+ debugtype = dword(imgstart + debugdirentryrva + 0xc);\r
+ if( (debugtype != 0xdf) && (debugtype != 0x2) )\r
+ {\r
+ $printf "debug type is not dwarf for image at %x",imgstart$;\r
+ $printf "debug type is %x",debugtype$;\r
+ return;\r
+ }\r
+ \r
+ debugrva = dword(imgstart + debugdirentryrva + 0x14);\r
+ debugrva = debugrva - strippedsize;\r
+ dwarfsig = dword(imgstart + debugrva);\r
+ if( (dwarfsig != 0x66727764) && (dwarfsig != 0x3031424e) )\r
+ {\r
+ $printf "dwarf debug signature not found for image at %x",imgstart$;\r
+ $printf "found %x", dwarfsig$;\r
+ return;\r
+ }\r
+ \r
+ if( dwarfsig == 0x66727764 )\r
+ {\r
+ elfpath = (char *)(imgstart + debugrva + 0xc);\r
+ $printf "looking for elf path at 0x%x", elfpath$; \r
+ }\r
+ else \r
+ {\r
+ elfpath = (char *)(imgstart + debugrva + 0x10);\r
+ $printf "looking for elf path at 0x%x", elfpath$; \r
+ }\r
+\r
+ // elf base is baseofcode (we hope that for TE images it's not baseofdata)\r
+ elfbase = imgstart + dword(imgstart + 0xc) - strippedsize;\r
+\r
+ $printf "found path %s",elfpath$;\r
+ $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$;\r
+}\r
+.\r
+\r
+define /r ProcessFvSection(secstart)\r
+unsigned long secstart;\r
+{\r
+ unsigned long sectionsize;\r
+ unsigned char sectiontype;\r
+\r
+ sectionsize = dword(secstart);\r
+ //sectiontype = (sectionsize & 0xff000000) >> 24;\r
+ sectiontype = (sectionsize & 0xff000000) / 0x1000000;\r
+ sectionsize = sectionsize & 0x00ffffff;\r
+\r
+ $printf "fv section at %x size %x type %x",secstart,sectionsize,sectiontype$;\r
+\r
+ if(sectiontype == 0x10) // PE32\r
+ {\r
+ ProcessPE32(secstart+0x4);\r
+ }\r
+ else if(sectiontype == 0x12) // TE\r
+ {\r
+ ProcessTE(secstart+0x4); \r
+ }\r
+}\r
+.\r
+\r
+define /r ProcessFfsFile(ffsfilestart)\r
+unsigned long ffsfilestart;\r
+{\r
+ unsigned long ffsfilesize;\r
+ unsigned long ffsfiletype;\r
+ unsigned long secoffset;\r
+ unsigned long secsize;\r
+\r
+ //ffsfiletype = byte(ffsfilestart + 0x12);\r
+ ffsfilesize = dword(ffsfilestart + 0x14);\r
+ //ffsfiletype = (ffsfilesize & 0xff000000) >> 24;\r
+ ffsfiletype = (ffsfilesize & 0xff000000) / 0x1000000;\r
+ ffsfilesize = ffsfilesize & 0x00ffffff;\r
+\r
+ if(ffsfiletype == 0xff) return;\r
+\r
+ $printf "ffs file at %x size %x type %x",ffsfilestart,ffsfilesize,ffsfiletype$;\r
+\r
+ secoffset = ffsfilestart + 0x18;\r
+\r
+ // loop through sections in file\r
+ while(secoffset < (ffsfilestart + ffsfilesize))\r
+ {\r
+ // process fv section and increment section offset by size\r
+ secsize = dword(secoffset) & 0x00ffffff;\r
+ ProcessFvSection(secoffset);\r
+ secoffset = secoffset + secsize;\r
+\r
+ // align to next 4 byte boundary\r
+ if( (secoffset & 0x3) != 0 )\r
+ {\r
+ secoffset = secoffset + (0x4 - (secoffset & 0x3));\r
+ }\r
+ } // end section loop\r
+}\r
+.\r
+\r
+define /r LoadPeiSec()\r
+{\r
+ unsigned long fvbase;\r
+ unsigned long fvlen;\r
+ unsigned long fvsig;\r
+ unsigned long ffsoffset;\r
+ unsigned long ffsfilesize;\r
+\r
+ fvbase = FindFv();\r
+ $printf "fvbase %x",fvbase$;\r
+\r
+ // get fv signature field\r
+ fvsig = dword(fvbase + 0x28);\r
+ if(fvsig != 0x4856465F)\r
+ {\r
+ $printf "FV does not have proper signature, exiting"$;\r
+ return 0;\r
+ }\r
+\r
+ $printf "FV signature found"$;\r
+\r
+ $fopen 50, 'C:\loadfiles.inc'$;\r
+\r
+ fvlen = dword(fvbase + 0x20);\r
+ \r
+ // first ffs file is after fv header, use headerlength field\r
+ //ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) >> 16;\r
+ ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) / 0x10000;\r
+ ffsoffset = fvbase + GetWord(fvbase + 0x30);\r
+\r
+ // loop through ffs files\r
+ while(ffsoffset < (fvbase+fvlen))\r
+ {\r
+ // process ffs file and increment by ffs file size field\r
+ ProcessFfsFile(ffsoffset); \r
+ ffsfilesize = (dword(ffsoffset + 0x14) & 0x00ffffff);\r
+ if(ffsfilesize == 0)\r
+ {\r
+ break;\r
+ }\r
+ ffsoffset = ffsoffset + ffsfilesize;\r
+ \r
+\r
+ // align to next 8 byte boundary\r
+ if( (ffsoffset & 0x7) != 0 )\r
+ {\r
+ ffsoffset = ffsoffset + (0x8 - (ffsoffset & 0x7));\r
+ }\r
+ \r
+ } // end fv ffs loop\r
+\r
+ $vclose 50$;\r
+\r
+}\r
+.\r
+\r
+define /r FindSystemTable(TopOfRam)\r
+unsigned long TopOfRam;\r
+{\r
+ unsigned long offset;\r
+ \r
+ $printf "FindSystemTable"$;\r
+ $printf "top of mem is %x",TopOfRam$;\r
+ \r
+ offset = TopOfRam;\r
+ \r
+ // align to highest 4MB boundary\r
+ offset = offset & 0xFFC00000;\r
+ \r
+ // start at top and look on 4MB boundaries for system table ptr structure\r
+ while(offset > 0)\r
+ {\r
+ //$printf "checking %x",offset$;\r
+ //$printf "value is %x",dword(offset)$;\r
+ \r
+ // low signature match\r
+ if(dword(offset) == 0x20494249)\r
+ {\r
+ // high signature match\r
+ if(dword(offset+4) == 0x54535953)\r
+ {\r
+ // less than 4GB?\r
+ if(dword(offset+0x0c) == 0)\r
+ {\r
+ // less than top of ram?\r
+ if(dword(offset+8) < TopOfRam)\r
+ {\r
+ return(dword(offset+8));\r
+ }\r
+ }\r
+ }\r
+ \r
+ }\r
+ \r
+ if(offset < 0x400000) break;\r
+ offset = offset - 0x400000; \r
+ }\r
+ \r
+ return 0;\r
+}\r
+.\r
+\r
+define /r ProcessImage(ImageBase)\r
+unsigned long ImageBase;\r
+{\r
+ $printf "ProcessImage %x", ImageBase$;\r
+}\r
+.\r
+\r
+define /r FindDebugInfo(SystemTable)\r
+unsigned long SystemTable;\r
+{\r
+ unsigned long CfgTableEntries;\r
+ unsigned long ConfigTable;\r
+ unsigned long i;\r
+ unsigned long offset;\r
+ unsigned long dbghdr;\r
+ unsigned long dbgentries;\r
+ unsigned long dbgptr;\r
+ unsigned long dbginfo;\r
+ unsigned long loadedimg;\r
+ \r
+ $printf "FindDebugInfo"$;\r
+ \r
+ dbgentries = 0;\r
+ CfgTableEntries = dword(SystemTable + 0x40);\r
+ ConfigTable = dword(SystemTable + 0x44);\r
+ \r
+ $printf "config table is at %x (%d entries)", ConfigTable, CfgTableEntries$;\r
+ \r
+ // now search for debug info entry with guid 49152E77-1ADA-4764-B7A2-7AFEFED95E8B\r
+ // 0x49152E77 0x47641ADA 0xFE7AA2B7 0x8B5ED9FE\r
+ for(i=0; i<CfgTableEntries; i++)\r
+ {\r
+ offset = ConfigTable + (i*0x14);\r
+ if(dword(offset) == 0x49152E77)\r
+ {\r
+ if(dword(offset+4) == 0x47641ADA)\r
+ {\r
+ if(dword(offset+8) == 0xFE7AA2B7)\r
+ {\r
+ if(dword(offset+0xc) == 0x8B5ED9FE)\r
+ {\r
+ dbghdr = dword(offset+0x10);\r
+ dbgentries = dword(dbghdr + 4);\r
+ dbgptr = dword(dbghdr + 8);\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+ \r
+ if(dbgentries == 0)\r
+ {\r
+ $printf "no debug entries found"$;\r
+ return;\r
+ }\r
+ \r
+ $printf "debug table at %x (%d entries)", dbgptr, dbgentries$;\r
+ \r
+ for(i=0; i<dbgentries; i++)\r
+ {\r
+ dbginfo = dword(dbgptr + (i*4));\r
+ if(dbginfo != 0)\r
+ {\r
+ if(dword(dbginfo) == 1) // normal debug info type\r
+ {\r
+ loadedimg = dword(dbginfo + 4);\r
+ ProcessPE32(dword(loadedimg + 0x20));\r
+ }\r
+ }\r
+ }\r
+}\r
+.\r
+\r
+define /r LoadDxe()\r
+{\r
+ unsigned long maxmem;\r
+ unsigned long systbl;\r
+ \r
+ $printf "LoadDxe"$;\r
+ \r
+ $fopen 50, 'C:\loadfiles.inc'$;\r
+ \r
+ maxmem = GetMaxMem();\r
+ systbl = FindSystemTable(maxmem);\r
+ if(systbl != 0)\r
+ {\r
+ $printf "found system table at %x",systbl$;\r
+ FindDebugInfo(systbl);\r
+ }\r
+ \r
+ $vclose 50$;\r
+}\r
+.\r
+\r
+define /r LoadRuntimeDxe()\r
+\r
+{\r
+ unsigned long maxmem;\r
+ unsigned long SystemTable;\r
+ unsigned long CfgTableEntries;\r
+ unsigned long ConfigTable;\r
+ unsigned long i;\r
+ unsigned long offset;\r
+ unsigned long numentries;\r
+ unsigned long RuntimeDebugInfo;\r
+ unsigned long DebugInfoOffset;\r
+ unsigned long imgbase;\r
+ \r
+ $printf "LoadRuntimeDxe"$;\r
+ \r
+ $fopen 50, 'C:\loadfiles.inc'$;\r
+ \r
+ RuntimeDebugInfo = 0x80000010;\r
+ \r
+ if(RuntimeDebugInfo != 0)\r
+ {\r
+ numentries = dword(RuntimeDebugInfo);\r
+ \r
+ $printf "runtime debug info is at %x (%d entries)", RuntimeDebugInfo, numentries$;\r
+ \r
+ DebugInfoOffset = RuntimeDebugInfo + 0x4;\r
+ for(i=0; i<numentries; i++)\r
+ {\r
+ imgbase = dword(DebugInfoOffset);\r
+ if(imgbase != 0)\r
+ {\r
+ $printf "found image at %x",imgbase$;\r
+ ProcessPE32(imgbase);\r
+ }\r
+ DebugInfoOffset = DebugInfoOffset + 0x4;\r
+ }\r
+ }\r
+ \r
+ $vclose 50$;\r
+}\r
+.\r
--- /dev/null
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+error = continue
+unload
+error = abort
+
+setreg @CP15_CONTROL = 0x0005107E
+setreg @pc=0x80008208
+setreg @cpsr=0x000000D3
+dis/D
+readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000
+
--- /dev/null
+#!/bin/sh\r
+#\r
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+# \r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http:#opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+\r
+\r
+IN=`/usr/bin/cygpath -u $1`\r
+OUT=`/usr/bin/cygpath -u $2`\r
+\r
+/usr/bin/sed -e "s/\/cygdrive\/\(.\)/load\/a\/ni\/np \"\1:/g" \\r
+ -e 's:\\:/:g' \\r
+ -e "s/^/load\/a\/ni\/np \"/g" \\r
+ -e "s/dll /dll\" \&/g" \\r
+ $IN | /usr/bin/sort.exe --key=3 --output=$OUT\r
+\r
--- /dev/null
+//
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+error = continue
+unload
+error = abort
+
+setreg @CP15_CONTROL = 0x0005107E
+setreg @cpsr=0x000000D3
+
+; General clock settings.
+setmem /32 0x48307270=0x00000080
+setmem /32 0x48306D40=0x00000003
+setmem /32 0x48005140=0x03020A50
+
+;Clock configuration
+setmem /32 0x48004A40=0x0000030A
+setmem /32 0x48004C40=0x00000015
+
+;DPLL3 (Core) settings
+setmem /32 0x48004D00=0x00370037
+setmem /32 0x48004D30=0x00000000
+setmem /32 0x48004D40=0x094C0C00
+
+;DPLL4 (Peripheral) settings
+setmem /32 0x48004D00=0x00370037
+setmem /32 0x48004D30=0x00000000
+setmem /32 0x48004D44=0x0001B00C
+setmem /32 0x48004D48=0x00000009
+
+;DPLL1 (MPU) settings
+setmem /32 0x48004904=0x00000037
+setmem /32 0x48004934=0x00000000
+setmem /32 0x48004940=0x0011F40C
+setmem /32 0x48004944=0x00000001
+setmem /32 0x48004948=0x00000000
+
+;RAM setup.
+setmem /16 0x6D000010=0x0000
+setmem /16 0x6D000040=0x0001
+setmem /16 0x6D000044=0x0100
+setmem /16 0x6D000048=0x0000
+setmem /32 0x6D000060=0x0000000A
+setmem /32 0x6D000070=0x00000081
+setmem /16 0x6D000040=0x0003
+setmem /32 0x6D000080=0x02D04011
+setmem /16 0x6D000084=0x0032
+setmem /16 0x6D00008C=0x0000
+setmem /32 0x6D00009C=0xBA9DC4C6
+setmem /32 0x6D0000A0=0x00012522
+setmem /32 0x6D0000A4=0x0004E201
+setmem /16 0x6D000040=0x0003
+setmem /32 0x6D0000B0=0x02D04011
+setmem /16 0x6D0000B4=0x0032
+setmem /16 0x6D0000BC=0x0000
+setmem /32 0x6D0000C4=0xBA9DC4C6
+setmem /32 0x6D0000C8=0x00012522
+setmem /32 0x6D0000D4=0x0004E201
\ No newline at end of file
--- /dev/null
+//\r
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// \r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+\r
+include 'ZZZZZZ/rvi_symbols_macros.inc'\r
+\r
+macro write_symbols_file("ZZZZZZ/rvi_symbols.tmp", 0x00000000, 0x10000000)\r
+\r
+host "bash -o igncr ZZZZZZ/rvi_convert_symbols.sh ZZZZZZ/rvi_symbols.tmp ZZZZZZ/rvi_symbols.inc"\r
+include 'ZZZZZZ/rvi_symbols.inc'\r
+load /NI /NP 'ZZZZZZ/rvi_dummy.axf' ;.constdata\r
+unload rvi_dummy.axf\r
+delfile rvi_dummy.axf\r
+\r
+\r
--- /dev/null
+//\r
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// \r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+\r
+define /R int compare_guid(guid1, guid2)\r
+ unsigned char *guid1;\r
+ unsigned char *guid2;\r
+{\r
+ return strncmp(guid1, guid2, 16);\r
+}\r
+.\r
+\r
+define /R unsigned char * find_system_table(mem_start, mem_size)\r
+ unsigned char *mem_start;\r
+ unsigned long mem_size;\r
+{\r
+ unsigned char *mem_ptr;\r
+ \r
+ mem_ptr = mem_start + mem_size;\r
+ \r
+ do\r
+ {\r
+ mem_ptr -= 0x400000; // 4 MB\r
+ \r
+ if (strncmp(mem_ptr, "IBI SYST", 8) == 0)\r
+ {\r
+ return *(unsigned long *)(mem_ptr + 8); // EfiSystemTableBase\r
+ } \r
+ \r
+ } while (mem_ptr > mem_start);\r
+ \r
+ return 0;\r
+}\r
+.\r
+\r
+define /R unsigned char * find_debug_info_table_header(system_table)\r
+ unsigned char *system_table;\r
+{\r
+ unsigned long configuration_table_entries;\r
+ unsigned char *configuration_table;\r
+ unsigned long index;\r
+ unsigned char debug_table_guid[16];\r
+ \r
+ // Fill in the debug table's guid\r
+ debug_table_guid[ 0] = 0x77;\r
+ debug_table_guid[ 1] = 0x2E;\r
+ debug_table_guid[ 2] = 0x15;\r
+ debug_table_guid[ 3] = 0x49;\r
+ debug_table_guid[ 4] = 0xDA;\r
+ debug_table_guid[ 5] = 0x1A;\r
+ debug_table_guid[ 6] = 0x64;\r
+ debug_table_guid[ 7] = 0x47;\r
+ debug_table_guid[ 8] = 0xB7;\r
+ debug_table_guid[ 9] = 0xA2;\r
+ debug_table_guid[10] = 0x7A;\r
+ debug_table_guid[11] = 0xFE;\r
+ debug_table_guid[12] = 0xFE;\r
+ debug_table_guid[13] = 0xD9;\r
+ debug_table_guid[14] = 0x5E;\r
+ debug_table_guid[15] = 0x8B;\r
+ \r
+ configuration_table_entries = *(unsigned long *)(system_table + 64);\r
+ configuration_table = *(unsigned long *)(system_table + 68);\r
+ \r
+ for (index = 0; index < configuration_table_entries; index++)\r
+ {\r
+ if (compare_guid(configuration_table, debug_table_guid) == 0)\r
+ {\r
+ return *(unsigned long *)(configuration_table + 16);\r
+ }\r
+ \r
+ configuration_table += 20;\r
+ }\r
+ \r
+ return 0;\r
+}\r
+.\r
+\r
+define /R int valid_pe_header(header)\r
+ unsigned char *header;\r
+{\r
+ if ((header[0x00] == 'M') &&\r
+ (header[0x01] == 'Z') &&\r
+ (header[0x80] == 'P') &&\r
+ (header[0x81] == 'E'))\r
+ {\r
+ return 1;\r
+ }\r
+ \r
+ return 0;\r
+}\r
+.\r
+\r
+define /R unsigned long pe_headersize(header)\r
+ unsigned char *header;\r
+{\r
+ unsigned long *size;\r
+ \r
+ size = header + 0x00AC;\r
+ \r
+ return *size;\r
+}\r
+.\r
+\r
+define /R unsigned char *pe_filename(header)\r
+ unsigned char *header;\r
+{\r
+ unsigned long *debugOffset;\r
+ unsigned char *stringOffset;\r
+ \r
+ if (valid_pe_header(header))\r
+ {\r
+ debugOffset = header + 0x0128;\r
+ stringOffset = header + *debugOffset + 0x002C;\r
+ \r
+ return stringOffset;\r
+ }\r
+ \r
+ return 0;\r
+}\r
+.\r
+\r
+define /R int char_is_valid(c)\r
+ unsigned char c;\r
+{\r
+ if (c >= 32 && c < 127)\r
+ return 1;\r
+\r
+ return 0;\r
+}\r
+.\r
+\r
+define /R write_symbols_file(filename, mem_start, mem_size)\r
+ unsigned char *filename;\r
+ unsigned char *mem_start;\r
+ unsigned long mem_size; \r
+{\r
+ unsigned char *system_table;\r
+ unsigned char *debug_info_table_header;\r
+ unsigned char *debug_info_table;\r
+ unsigned long debug_info_table_size;\r
+ unsigned long index;\r
+ unsigned char *debug_image_info;\r
+ unsigned char *loaded_image_protocol;\r
+ unsigned char *image_base;\r
+ unsigned char *debug_filename;\r
+ unsigned long header_size;\r
+ int status;\r
+ \r
+ system_table = find_system_table(mem_start, mem_size);\r
+ if (system_table == 0)\r
+ {\r
+ return;\r
+ }\r
+ \r
+ status = fopen(88, filename, "w");\r
+ \r
+ debug_info_table_header = find_debug_info_table_header(system_table);\r
+ \r
+ debug_info_table = *(unsigned long *)(debug_info_table_header + 8);\r
+ debug_info_table_size = *(unsigned long *)(debug_info_table_header + 4);\r
+ \r
+ for (index = 0; index < (debug_info_table_size * 4); index += 4)\r
+ {\r
+ debug_image_info = *(unsigned long *)(debug_info_table + index); \r
+ \r
+ if (debug_image_info == 0)\r
+ {\r
+ break;\r
+ }\r
+ \r
+ loaded_image_protocol = *(unsigned long *)(debug_image_info + 4);\r
+ \r
+ image_base = *(unsigned long *)(loaded_image_protocol + 32);\r
+ \r
+ debug_filename = pe_filename(image_base);\r
+ header_size = pe_headersize(image_base);\r
+ \r
+ $fprintf 88, "%s 0x%08x\n", debug_filename, image_base + header_size$;\r
+ }\r
+ \r
+ \r
+ fclose(88);\r
+}\r
+.\r
+\r
--- /dev/null
+//\r
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// \r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+\r
+error = continue\r
+\r
+unload\r
+\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+delfile 1\r
+\r
+error = abort\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+--*/\r
+\r
+#ifndef __ARM_EB_H__\r
+#define __ARM_EB_H__\r
+\r
+#include <ArmEb/ArmEbUart.h>\r
+#include <ArmEb/ArmEbTimer.h>\r
+\r
+///\r
+/// ARM EB Memory Map\r
+///\r
+// 0x00000000 - 0x0FFFFFFF SDRAM 256MB\r
+// 0x10000000 - 0x100FFFFF System FPGA (config registers) 1MB\r
+// 0x10000000\960x10000FFF 4KB System registers \r
+// 0x10001000\960x10001FFF 4KB System controller \r
+// 0x10002000\960x10002FFF 4KB Two-Wire Serial Bus Interface \r
+// 0x10003000\960x10003FFF 4KB Reserved \r
+// 0x10004000\960x10004FFF 4KB Advanced Audio CODEC Interface \r
+// 0x10005000\960x10005FFF 4KB MultiMedia Card Interface (MCI) \r
+// 0x10006000\960x10006FFF 4KB Keyboard/Mouse Interface 0 \r
+// 0x10007000\960x10007FFF 4KB Keyboard/Mouse Interface 1 \r
+// 0x10008000\960x10008FFF 4KB Character LCD Interface \r
+// 0x10009000\960x10009FFF 4KB UART 0 Interface \r
+// 0x1000A000\960x1000AFFF 4KB UART 1 Interface \r
+// 0x1000B000\960x1000BFFF 4KB UART 2 Interface \r
+// 0x1000C000\960x1000CFFF 4KB UART 3 Interface \r
+// 0x1000D000\960x1000DFFF 4KB Synchronous Serial Port Interface \r
+// 0x1000E000\960x1000EFFF 4KB Smart Card Interface \r
+// 0x1000F000\960x1000FFFF 4KB Reserved \r
+// 0x10010000\960x10010FFF 4KB Watchdog Interface \r
+// 0x10011000\960x10011FFF 4KB Timer modules 0 and 1 interface (Timer 1 starts at 0x10011020)\r
+// 0x10012000\960x10012FFF 4KB Timer modules 2 and 3 interface (Timer 3 starts at 0x10012020)\r
+// 0x10013000\960x10013FFF 4KB GPIO Interface 0 \r
+// 0x10014000\960x10014FFF 4KB GPIO Interface 1 \r
+// 0x10015000\960x10015FFF 4KB GPIO Interface 2 (miscellaneous onboard I/O) \r
+// 0x10016000\960x10016FFF 4KB Reserved \r
+// 0x10017000\960x10017FFF 4KB Real Time Clock Interface \r
+// 0x10018000\960x10018FFF 4KB Dynamic Memory Controller configuration \r
+// 0x10019000\960x10019FFF 4KB PCI controller configuration registers \r
+// 0x1001A000\960x1001FFFF 24KB Reserved \r
+// 0x10020000\960x1002FFFF 64KB Color LCD Controller \r
+// 0x10030000\960x1003FFFF 64KB DMA Controller configuration registers \r
+// 0x10040000\960x1004FFFF 64KB Generic Interrupt Controller 1 (nIRQ for tile 1) \r
+// 0x10050000\960x1005FFFF 64KB Generic Interrupt Controller 2 (nFIQ for tile 1) \r
+// 0x10060000\960x1006FFFF 64KB Generic Interrupt Controller 3 (nIRQ for tile 2) \r
+// 0x10070000\960x1007FFFF 64KB Generic Interrupt Controller 4 (nFIQ for tile 2) \r
+// 0x10080000\960x1008FFFF 64KB Static Memory Controller configuration registers \r
+// 0x100A0000\960x100EFFFF 448MB Reserved \r
+// 0x10090000\960x100FFFFF 64KB Debug Access Port (DAP) \r
+// 0x10100000 - 0x100FFFFF Reserved 3MB\r
+// 0x10400000 - 0x17FFFFFF System FPGA 124MB\r
+// 0x18000000 - 0x1FFFFFFF Logic Tile 1 128MB\r
+// 0x20000000 - 0x3FFFFFFF Reserved 512MB\r
+// 0x40000000 - 0x7FFFFFFF System FPGA 1GB\r
+// 0x40000000\960x43FFFFFF CS0 NOR flash (nNOR_CS1) \r
+// 0x44000000\960x47FFFFFF CS1 NOR flash (nNOR_CS2) \r
+// 0x48000000\960x4BFFFFFF CS2 SRAM (nSRAMCS) \r
+// 0x4C000000\960x4DFFFFFF CS3 Config flash \r
+// 0x4E000000\960x4EFFFFFF Ethernet \r
+// 0x4F000000\960x4FFFFFFF USB \r
+// 0x50000000\960x53FFFFFF CS4 (nEXPCS) PISMO (nCS0) \r
+// 0x54000000\960x57FFFFFF CS5 (nSTATICCS4) PISMO (nCS1) \r
+// 0x58000000\960x5BFFFFFF CS6 (nSTATICCS5) PISMO (nCS2) \r
+// 0x5C000000\960x5FFFFFFF CS7 (nSTATICCS6) PISMO (nCS3) \r
+// 0x61000000\960x61FFFFFF PCI SelfCfg window \r
+// 0x62000000\960x62FFFFFF PCI Cfg window \r
+// 0x63000000\960x63FFFFFF PCI I/O window\r
+// 0x64000000\960x67FFFFFF PCI memory window 0 \r
+// 0x68000000\960x6BFFFFFF PCI memory window 1 \r
+// 0x6C000000\960x6FFFFFFF PCI memory window 2 \r
+// 0x70000000 - 0x7FFFFFFF DRAM Mirror\r
+// 0x80000000 - 0xFFFFFFFF Logic Tile site 2 2GB\r
+\r
+//\r
+// At reset EB_DRAM_BASE is alaised to EB_CS0_NOR_BASE\r
+//\r
+#define EB_DRAM_BASE 0x00000000 // 256 MB DRAM\r
+#define EB_CONFIG_BASE 0x10000000\r
+\r
+#define EB_CSO_NOR_BASE 0x40000000 // 64 MB NOR FLASH\r
+#define EB_CS1_NOR_BASE 0x44000000 // 64 MB NOR FLASH\r
+#define EB_CS2_SRAM 0x48000000 // 2 MB of SRAM\r
+#define EB_CS3_CONFIG_FLASH 0x4c000000 // 8 MB Config FLASH for FPGA. Not to be used by application code\r
+#define EB_CS3_ETHERNET 0x4e000000 // 16 MB Ethernet controller\r
+#define EB_CS4_PISMO_CS0 0x50000000 // Expansion CS0\r
+#define EB_CS5_PISMO_CS0 0x54000000 // Expansion CS0\r
+#define EB_CS6_PISMO_CS0 0x58000000 // Expansion CS0\r
+\r
+#define EB_DRAM_REMAP_BASE 0x70000000 // if REMAPSTAT is HIGH alais of EB_DRAM_BASE\r
+\r
+#endif \r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ Timer.h\r
+\r
+Abstract:\r
+\r
+ Driver implementing the EFI 2.0 timer protocol using the ARM SP804 timer.\r
+\r
+--*/\r
+\r
+#ifndef _TIMER_SP804_H__\r
+#define _TIMER_SP804_H__\r
+\r
+\r
+\r
+// EB board constants\r
+#define EB_SP810_CTRL_BASE 0x10001000\r
+#define EB_SP804_TIMER0_BASE 0x10011000\r
+#define EB_SP804_TIMER1_BASE 0x10011020\r
+#define EB_SP804_TIMER2_BASE 0x10012000\r
+#define EB_SP804_TIMER3_BASE 0x10012020\r
+\r
+#define EB_TIMER01_INTERRUPT_NUM 36\r
+#define EB_TIMER23_INTERRUPT_NUM 37\r
+\r
+// SP804 Timer constants\r
+#define SP804_TIMER_LOAD_REG 0x00\r
+#define SP804_TIMER_CURRENT_REG 0x04\r
+#define SP804_TIMER_CONTROL_REG 0x08\r
+#define SP804_TIMER_INT_CLR_REG 0x0C\r
+#define SP804_TIMER_RAW_INT_STS_REG 0x10\r
+#define SP804_TIMER_MSK_INT_STS_REG 0x14\r
+#define SP804_TIMER_BG_LOAD_REG 0x18\r
+\r
+// Timer control register bit definitions\r
+#define SP804_TIMER_CTRL_ONESHOT BIT0\r
+#define SP804_TIMER_CTRL_32BIT BIT1\r
+#define SP804_TIMER_CTRL_PRESCALE_MASK (BIT3|BIT2)\r
+#define SP804_PRESCALE_DIV_1 0\r
+#define SP804_PRESCALE_DIV_16 BIT2\r
+#define SP804_PRESCALE_DIV_256 BIT3\r
+#define SP804_TIMER_CTRL_INT_ENABLE BIT5\r
+#define SP804_TIMER_CTRL_PERIODIC BIT6\r
+#define SP804_TIMER_CTRL_ENABLE BIT7\r
+\r
+// SP810 System Controller constants\r
+#define SP810_SYS_CTRL_REG 0x00\r
+#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=REFCLK, 1=TIMCLK\r
+#define SP810_SYS_CTRL_TIMER0_EN BIT16\r
+#define SP810_SYS_CTRL_TIMER1_TIMCLK BIT17 // 0=REFCLK, 1=TIMCLK\r
+#define SP810_SYS_CTRL_TIMER1_EN BIT18\r
+#define SP810_SYS_CTRL_TIMER2_TIMCLK BIT19 // 0=REFCLK, 1=TIMCLK\r
+#define SP810_SYS_CTRL_TIMER2_EN BIT20\r
+#define SP810_SYS_CTRL_TIMER3_TIMCLK BIT21 // 0=REFCLK, 1=TIMCLK\r
+#define SP810_SYS_CTRL_TIMER3_EN BIT22\r
+\r
+// default timer tick period - 1ms, or 10000 units of 100ns\r
+//#define TIMER_DEFAULT_PERIOD 10000\r
+\r
+// default timer tick period - 50ms, or 500000 units of 100ns\r
+#define TIMER_DEFAULT_PERIOD 500000\r
+\r
+// default timer tick period - 500ms, or 5000000 units of 100ns\r
+//#define TIMER_DEFAULT_PERIOD 5000000\r
+\r
+#endif\r
+\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+Portions copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+--*/\r
+\r
+#ifndef __ARM_EB_UART_H__\r
+#define __ARM_EB_UART_H__\r
+\r
+\r
+#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds\r
+\r
+\r
+// EB constants\r
+#define EB_UART1_BASE 0x10009000\r
+\r
+// PL011 Registers\r
+#define UARTDR 0x000\r
+#define UARTRSR 0x004\r
+#define UARTECR 0x004\r
+#define UARTFR 0x018\r
+#define UARTILPR 0x020\r
+#define UARTIBRD 0x024\r
+#define UARTFBRD 0x028\r
+#define UARTLCR_H 0x02C\r
+#define UARTCR 0x030\r
+#define UARTIFLS 0x034\r
+#define UARTIMSC 0x038\r
+#define UARTRIS 0x03C\r
+#define UARTMIS 0x040\r
+#define UARTICR 0x044\r
+#define UARTDMACR 0x048\r
+\r
+// If the required baud rate is 115200 and UARTCLK = 24MHz then:\r
+// Baud Rate Divisor = (24×10^6)/(16×115200) = 13.020833\r
+// This means BRDI = 13 and BRDF = 0.020833\r
+// Therefore, fractional part, m = integer(0.020833×64) = integer(1.33331) = 1\r
+// Generated baud rate divider = 13+1/64 = 13.015625\r
+// Generated baud rate = (24×10^6)/(16×13.015625) = 115246.098\r
+// Error = (115246.098-115200)/115200 × 100 = 0.04%\r
+#define UART_115200_IDIV 13\r
+#define UART_115200_FDIV 1\r
+\r
+// add more baud rates here as needed\r
+\r
+// data status bits\r
+#define UART_DATA_ERROR_MASK 0x0F00\r
+\r
+// status reg bits\r
+#define UART_STATUS_ERROR_MASK 0x0F\r
+\r
+// flag reg bits\r
+#define UART_TX_EMPTY_FLAG_MASK 0x80\r
+#define UART_RX_FULL_FLAG_MASK 0x40\r
+#define UART_TX_FULL_FLAG_MASK 0x20\r
+#define UART_RX_EMPTY_FLAG_MASK 0x10\r
+#define UART_BUSY_FLAG_MASK 0x08\r
+\r
+// control reg bits\r
+#define UART_CTSEN_CONTROL_MASK 0x8000\r
+#define UART_RTSEN_CONTROL_MASK 0x4000\r
+#define UART_RTS_CONTROL_MASK 0x0800\r
+#define UART_DTR_CONTROL_MASK 0x0400\r
+\r
+\r
+#endif \r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>\r
+Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR> \r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ Gic.c\r
+\r
+Abstract:\r
+\r
+ Driver implementing the GIC interrupt controller protocol\r
+\r
+--*/\r
+\r
+#include <PiDxe.h>\r
+\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/UefiLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+\r
+#include <Protocol/Cpu.h>\r
+#include <Protocol/HardwareInterrupt.h>\r
+\r
+\r
+//\r
+// EB board definitions\r
+//\r
+#define EB_GIC1_CPU_INTF_BASE 0x10040000\r
+#define EB_GIC1_DIST_BASE 0x10041000\r
+#define EB_GIC2_CPU_INTF_BASE 0x10050000\r
+#define EB_GIC2_DIST_BASE 0x10051000\r
+#define EB_GIC3_CPU_INTF_BASE 0x10060000\r
+#define EB_GIC3_DIST_BASE 0x10061000\r
+#define EB_GIC4_CPU_INTF_BASE 0x10070000\r
+#define EB_GIC5_DIST_BASE 0x10071000\r
+\r
+// number of interrupts sources supported by each GIC on the EB\r
+#define EB_NUM_GIC_INTERRUPTS 96 \r
+\r
+// number of 32-bit registers needed to represent those interrupts as a bit\r
+// (used for enable set, enable clear, pending set, pending clear, and active regs)\r
+#define EB_NUM_GIC_REG_PER_INT_BITS (EB_NUM_GIC_INTERRUPTS / 32)\r
+\r
+// number of 32-bit registers needed to represent those interrupts as two bits\r
+// (used for configuration reg)\r
+#define EB_NUM_GIC_REG_PER_INT_CFG (EB_NUM_GIC_INTERRUPTS / 16)\r
+\r
+// number of 32-bit registers needed to represent interrupts as 8-bit priority field\r
+// (used for priority regs)\r
+#define EB_NUM_GIC_REG_PER_INT_BYTES (EB_NUM_GIC_INTERRUPTS / 4)\r
+\r
+#define GIC_DEFAULT_PRIORITY 0x80\r
+\r
+//\r
+// GIC definitions\r
+//\r
+\r
+// Distributor\r
+#define GIC_ICDDCR 0x000 // Distributor Control Register\r
+#define GIC_ICDICTR 0x004 // Interrupt Controller Type Register\r
+#define GIC_ICDIIDR 0x008 // Implementer Identification Register\r
+\r
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BITS (see GIC spec)\r
+#define GIC_ICDISR 0x080 // Interrupt Security Registers\r
+#define GIC_ICDISER 0x100 // Interrupt Set-Enable Registers\r
+#define GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers\r
+#define GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers\r
+#define GIC_ICDCPR 0x280 // Interrupt Clear-Pending Registers\r
+#define GIC_ICDABR 0x300 // Active Bit Registers\r
+\r
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BYTES\r
+#define GIC_ICDIPR 0x400 // Interrupt Priority Registers\r
+\r
+// each reg base below repeats for EB_NUM_GIC_INTERRUPTS\r
+#define GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers\r
+#define GIC_ICDICFR 0xC00 // Interrupt Configuration Registers\r
+\r
+// just one of these\r
+#define GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register\r
+\r
+\r
+// Cpu interface\r
+#define GIC_ICCICR 0x00 // CPU Interface Controler Register\r
+#define GIC_ICCPMR 0x04 // Interrupt Priority Mask Register\r
+#define GIC_ICCBPR 0x08 // Binary Point Register\r
+#define GIC_ICCIAR 0x0C // Interrupt Acknowledge Register\r
+#define GIC_ICCEIOR 0x10 // End Of Interrupt Register\r
+#define GIC_ICCRPR 0x14 // Running Priority Register\r
+#define GIC_ICCPIR 0x18 // Highest Pending Interrupt Register\r
+#define GIC_ICCABPR 0x1C // Aliased Binary Point Register\r
+#define GIC_ICCIDR 0xFC // Identification Register\r
+\r
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;\r
+\r
+//\r
+// Notifications\r
+//\r
+VOID *CpuProtocolNotificationToken = NULL;\r
+EFI_EVENT CpuProtocolNotificationEvent = (EFI_EVENT)NULL;\r
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;\r
+\r
+\r
+HARDWARE_INTERRUPT_HANDLER gRegisteredInterruptHandlers[EB_NUM_GIC_INTERRUPTS];\r
+\r
+/**\r
+ Register Handler for the specified interrupt source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+ @param Handler Callback for interrupt. NULL to unregister\r
+\r
+ @retval EFI_SUCCESS Source was updated to support Handler.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+RegisterInterruptSource (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source,\r
+ IN HARDWARE_INTERRUPT_HANDLER Handler\r
+ )\r
+{\r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ } \r
+ \r
+ if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {\r
+ return EFI_ALREADY_STARTED;\r
+ }\r
+\r
+ gRegisteredInterruptHandlers[Source] = Handler;\r
+ return This->EnableInterruptSource(This, Source);\r
+}\r
+\r
+\r
+/**\r
+ Enable interrupt source Source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+\r
+ @retval EFI_SUCCESS Source interrupt enabled.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EnableInterruptSource (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
+ )\r
+{\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+ \r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ \r
+ // calculate enable register offset and bit position\r
+ RegOffset = Source / 32;\r
+ RegShift = Source % 32;\r
+\r
+ // write set-enable register\r
+ MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset), 1 << RegShift);\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+/**\r
+ Disable interrupt source Source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+\r
+ @retval EFI_SUCCESS Source interrupt disabled.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+DisableInterruptSource (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
+ )\r
+{\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+ \r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ \r
+ // calculate enable register offset and bit position\r
+ RegOffset = Source / 32;\r
+ RegShift = Source % 32;\r
+\r
+ // write set-enable register\r
+ MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDICER+(4*RegOffset), 1 << RegShift);\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+\r
+/**\r
+ Return current state of interrupt source Source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+ @param InterruptState TRUE: source enabled, FALSE: source disabled.\r
+\r
+ @retval EFI_SUCCESS InterruptState is valid\r
+ @retval EFI_DEVICE_ERROR InterruptState is not valid\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+GetInterruptSourceState (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source,\r
+ IN BOOLEAN *InterruptState\r
+ )\r
+{\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+ \r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ \r
+ // calculate enable register offset and bit position\r
+ RegOffset = Source / 32;\r
+ RegShift = Source % 32;\r
+ \r
+ if ((MmioRead32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset)) & (1<<RegShift)) == 0) {\r
+ *InterruptState = FALSE;\r
+ } else {\r
+ *InterruptState = TRUE;\r
+ }\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ Signal to the hardware that the End Of Intrrupt state \r
+ has been reached.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+\r
+ @retval EFI_SUCCESS Source interrupt EOI'ed.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EndOfInterrupt (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
+ )\r
+{\r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, Source);\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+/**\r
+ EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.\r
+\r
+ @param InterruptType Defines the type of interrupt or exception that\r
+ occurred on the processor.This parameter is processor architecture specific.\r
+ @param SystemContext A pointer to the processor context when\r
+ the interrupt occurred on the processor.\r
+\r
+ @return None\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IrqInterruptHandler (\r
+ IN EFI_EXCEPTION_TYPE InterruptType,\r
+ IN EFI_SYSTEM_CONTEXT SystemContext\r
+ )\r
+{\r
+ UINT32 GicInterrupt;\r
+ HARDWARE_INTERRUPT_HANDLER InterruptHandler;\r
+\r
+ GicInterrupt = MmioRead32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCIAR);\r
+ if (GicInterrupt >= EB_NUM_GIC_INTERRUPTS) {\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, GicInterrupt);\r
+ }\r
+ \r
+ InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];\r
+ if (InterruptHandler != NULL) {\r
+ // Call the registered interrupt handler.\r
+ InterruptHandler (GicInterrupt, SystemContext);\r
+ } else {\r
+ DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: %x\n", GicInterrupt));\r
+ }\r
+\r
+ EndOfInterrupt (&gHardwareInterruptProtocol, GicInterrupt);\r
+}\r
+\r
+\r
+//\r
+// Making this global saves a few bytes in image size\r
+//\r
+EFI_HANDLE gHardwareInterruptHandle = NULL;\r
+\r
+//\r
+// The protocol instance produced by this driver\r
+//\r
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = {\r
+ RegisterInterruptSource,\r
+ EnableInterruptSource,\r
+ DisableInterruptSource,\r
+ GetInterruptSourceState,\r
+ EndOfInterrupt\r
+};\r
+\r
+\r
+/**\r
+ Shutdown our hardware\r
+ \r
+ DXE Core will disable interrupts and turn off the timer and disable interrupts\r
+ after all the event handlers have run.\r
+\r
+ @param[in] Event The Event that is being processed\r
+ @param[in] Context Event Context\r
+**/\r
+VOID\r
+EFIAPI\r
+ExitBootServicesEvent (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ UINTN i;\r
+ \r
+ for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {\r
+ DisableInterruptSource (&gHardwareInterruptProtocol, i);\r
+ }\r
+}\r
+\r
+\r
+//\r
+// Notification routines\r
+//\r
+VOID\r
+CpuProtocolInstalledNotification (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_CPU_ARCH_PROTOCOL *Cpu;\r
+ \r
+ //\r
+ // Get the cpu protocol that this driver requires.\r
+ //\r
+ Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);\r
+ ASSERT_EFI_ERROR(Status);\r
+\r
+ //\r
+ // Unregister the default exception handler.\r
+ //\r
+ Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL);\r
+ ASSERT_EFI_ERROR(Status);\r
+\r
+ //\r
+ // Register to receive interrupts\r
+ //\r
+ Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);\r
+ ASSERT_EFI_ERROR(Status);\r
+}\r
+\r
+/**\r
+ Initialize the state information for the CPU Architectural Protocol\r
+\r
+ @param ImageHandle of the loaded driver\r
+ @param SystemTable Pointer to the System Table\r
+\r
+ @retval EFI_SUCCESS Protocol registered\r
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure\r
+ @retval EFI_DEVICE_ERROR Hardware problems\r
+\r
+**/\r
+EFI_STATUS\r
+InterruptDxeInitialize (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINTN i;\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+\r
+ \r
+ // Make sure the Interrupt Controller Protocol is not already installed in the system.\r
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);\r
+\r
+ for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {\r
+ DisableInterruptSource (&gHardwareInterruptProtocol, i);\r
+ \r
+ // Set Priority \r
+ RegOffset = i / 4;\r
+ RegShift = (i % 4) * 8;\r
+ MmioAndThenOr32 (\r
+ EB_GIC1_DIST_BASE+GIC_ICDIPR+(4*RegOffset), \r
+ ~(0xff << RegShift), \r
+ GIC_DEFAULT_PRIORITY << RegShift\r
+ );\r
+ }\r
+\r
+ // configure interrupts for cpu 0\r
+ for (i = 0; i < EB_NUM_GIC_REG_PER_INT_BYTES; i++) {\r
+ MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICDIPTR + (i*4), 0x01010101);\r
+ }\r
+\r
+ // set binary point reg to 0x7 (no preemption)\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCBPR, 0x7);\r
+\r
+ // set priority mask reg to 0xff to allow all priorities through\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCPMR, 0xff);\r
+ \r
+ // enable gic cpu interface\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCICR, 0x1);\r
+\r
+ // enable gic distributor\r
+ MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICCICR, 0x1);\r
+\r
+ \r
+ ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));\r
+ \r
+ Status = gBS->InstallMultipleProtocolInterfaces (\r
+ &gHardwareInterruptHandle,\r
+ &gHardwareInterruptProtocolGuid, &gHardwareInterruptProtocol,\r
+ NULL\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+ \r
+ // Set up to be notified when the Cpu protocol is installed.\r
+ Status = gBS->CreateEvent (EVT_NOTIFY_SIGNAL, TPL_CALLBACK, CpuProtocolInstalledNotification, NULL, &CpuProtocolNotificationEvent); \r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ Status = gBS->RegisterProtocolNotify (&gEfiCpuArchProtocolGuid, CpuProtocolNotificationEvent, (VOID *)&CpuProtocolNotificationToken);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ // Register for an ExitBootServicesEvent\r
+ Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ return Status;\r
+}\r
+\r
--- /dev/null
+#/** @file\r
+# \r
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# \r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+# \r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = GicInterruptDxe\r
+ FILE_GUID = A7496828-946E-43BF-97D6-AA0272001899\r
+ MODULE_TYPE = DXE_DRIVER\r
+ VERSION_STRING = 1.0\r
+\r
+ ENTRY_POINT = InterruptDxeInitialize\r
+\r
+\r
+[Sources.common]\r
+ InterruptDxe.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec\r
+\r
+[LibraryClasses]\r
+ BaseLib\r
+ UefiLib\r
+ UefiBootServicesTableLib\r
+ DebugLib\r
+ PrintLib\r
+ UefiDriverEntryPoint\r
+ IoLib\r
+\r
+[Guids]\r
+ \r
+\r
+[Protocols]\r
+ gHardwareInterruptProtocolGuid\r
+ gEfiCpuArchProtocolGuid\r
+ \r
+[FixedPcd.common]\r
+ gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress\r
+\r
+[depex]\r
+ TRUE\r
--- /dev/null
+/** @file\r
+ Template for ArmEb DebugAgentLib. \r
+\r
+ For ARM we reserve FIQ for the Debug Agent Timer. We don't care about \r
+ laytency as we only really need the timer to run a few times a second \r
+ (how fast can some one type a ctrl-c?), but it works much better if\r
+ the interrupt we are using to break into the debugger is not being\r
+ used, and masked, by the system. \r
+\r
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Base.h>\r
+\r
+#include <Library/DebugAgentTimerLib.h>\r
+\r
+#include <ArmEb/ArmEb.h>\r
+\r
+\r
+/**\r
+ Setup all the hardware needed for the debug agents timer.\r
+\r
+ This function is used to set up debug enviroment. \r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugAgentTimerIntialize (\r
+ VOID\r
+ )\r
+{\r
+ // Map Timer to FIQ\r
+}\r
+ \r
+ \r
+/**\r
+ Set the period for the debug agent timer. Zero means disable the timer.\r
+\r
+ @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.\r
+\r
+**/ \r
+VOID\r
+EFIAPI\r
+DebugAgentTimerSetPeriod (\r
+ IN UINT32 TimerPeriodMilliseconds\r
+ )\r
+{\r
+ if (TimerPeriodMilliseconds == 0) {\r
+ // Disable timer and Disable FIQ\r
+ return;\r
+ } \r
+\r
+ // Set timer period and unmask FIQ\r
+}\r
+ \r
+\r
+/**\r
+ Perform End Of Interrupt for the debug agent timer. This is called in the \r
+ interrupt handler after the interrupt has been processed. \r
+\r
+**/ \r
+VOID\r
+EFIAPI\r
+DebugAgentTimerEndOfInterrupt (\r
+ VOID\r
+ )\r
+{\r
+ // EOI Timer interrupt for FIQ\r
+}\r
+ \r
+
\ No newline at end of file
--- /dev/null
+#/** @file\r
+# Component description file for Base PCI Cf8 Library.\r
+#\r
+# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.\r
+# Layers on top of an I/O Library instance.\r
+# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbDebugAgentTimerLib\r
+ FILE_GUID = 80949BBB-68EE-4a4c-B434-D5DB5A232F0C\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = DebugAgentTimerLib|SEC BASE DXE_CORE\r
+\r
+\r
+[Sources.common]\r
+ DebugAgentTimerLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+\r
--- /dev/null
+/** @file
+ Basic serial IO abstaction for GDB
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Uefi.h>
+#include <Library/GdbSerialLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#include <ArmEb/ArmEb.h>
+
+RETURN_STATUS
+EFIAPI
+GdbSerialLibConstructor (
+ VOID
+ )
+{
+ return GdbSerialInit (115200, 0, 8, 1);
+}
+
+RETURN_STATUS
+EFIAPI
+GdbSerialInit (
+ IN UINT64 BaudRate,
+ IN UINT8 Parity,
+ IN UINT8 DataBits,
+ IN UINT8 StopBits
+ )
+{
+ if ((Parity != 0) || (DataBits != 8) || (StopBits != 1)) {
+ return RETURN_UNSUPPORTED;
+ }
+
+ if (BaudRate != 115200) {
+ // Could add support for different Baud rates....
+ return RETURN_UNSUPPORTED;
+ }
+
+ UINT32 Base = PcdGet32 (PcdGdbUartBase);\r
+ \r
+ // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ\r
+ MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);\r
+ MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);\r
+\r
+ // no parity, 1 stop, no fifo, 8 data bits\r
+ MmioWrite32 (Base + UARTLCR_H, 0x60);\r
+\r
+ // clear any pending errors\r
+ MmioWrite32 (Base + UARTECR, 0);\r
+\r
+ // enable tx, rx, and uart overall\r
+ MmioWrite32 (Base + UARTCR, 0x301);\r
+\r
+ return RETURN_SUCCESS;\r
+}
+
+BOOLEAN
+EFIAPI
+GdbIsCharAvailable (
+ VOID
+ )
+{
+ UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
+\r
+ if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {\r
+ return TRUE;\r
+ } else {\r
+ return FALSE;\r
+ }\r
+}
+
+CHAR8
+EFIAPI
+GdbGetChar (
+ VOID
+ )
+{
+ UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;\r
+ \r
+ while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0);\r
+ return MmioRead8 (DR);\r
+}
+
+VOID
+EFIAPI
+GdbPutChar (
+ IN CHAR8 Char
+ )
+{
+ UINT32 FR = PcdGet32 (PcdGdbUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdGdbUartBase) + UARTDR;\r
+\r
+ while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0);\r
+ MmioWrite8 (DR, Char);\r
+ return;
+}
+
+VOID
+GdbPutString (
+ IN CHAR8 *String
+ )
+{
+ while (*String != '\0') {
+ GdbPutChar (*String);
+ String++;
+ }
+}
+
+
+
+
--- /dev/null
+#/** @file
+#
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = GdbSerialLib
+ FILE_GUID = E8EA1309-2F14-428f-ABE3-7016CE4B4305
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = GdbSerialLib
+
+ CONSTRUCTOR = GdbSerialLibConstructor
+
+
+[Sources.common]
+ GdbSerialLib.c
+
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ IoLib
+
+[FixedPcd]
+
+ gArmRealViewEbPkgTokenSpaceGuid.PcdGdbUartBase
\ No newline at end of file
--- /dev/null
+/** @file\r
+ PEI Services Table Pointer Library.\r
+ \r
+ This library is used for PEIM which does executed from flash device directly but\r
+ executed in memory.\r
+\r
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+#include <Library/PeiServicesTablePointerLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+/**\r
+ Caches a pointer PEI Services Table. \r
+ \r
+ Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer \r
+ in a platform specific manner.\r
+ \r
+ If PeiServicesTablePointer is NULL, then ASSERT().\r
+ \r
+ @param PeiServicesTablePointer The address of PeiServices pointer.\r
+**/\r
+VOID\r
+EFIAPI\r
+SetPeiServicesTablePointer (\r
+ IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer\r
+ )\r
+{\r
+ UINTN *PeiPtrLoc;\r
+ ASSERT (PeiServicesTablePointer != NULL);\r
+\r
+ PeiPtrLoc = (UINTN *)(UINTN)PcdGet32(PcdPeiServicePtrAddr);\r
+ *PeiPtrLoc = (UINTN)PeiServicesTablePointer;\r
+}\r
+\r
+/**\r
+ Retrieves the cached value of the PEI Services Table pointer.\r
+\r
+ Returns the cached value of the PEI Services Table pointer in a CPU specific manner \r
+ as specified in the CPU binding section of the Platform Initialization Pre-EFI \r
+ Initialization Core Interface Specification.\r
+ \r
+ If the cached PEI Services Table pointer is NULL, then ASSERT().\r
+\r
+ @return The pointer to PeiServices.\r
+\r
+**/\r
+CONST EFI_PEI_SERVICES **\r
+EFIAPI\r
+GetPeiServicesTablePointer (\r
+ VOID\r
+ )\r
+{\r
+ UINTN *PeiPtrLoc;\r
+\r
+ PeiPtrLoc = (UINTN *)(UINTN)PcdGet32(PcdPeiServicePtrAddr);\r
+ return (CONST EFI_PEI_SERVICES **)*PeiPtrLoc;\r
+}\r
+\r
+\r
--- /dev/null
+## @file\r
+# Instance of PEI Services Table Pointer Library using global variable for the table pointer.\r
+#\r
+# PEI Services Table Pointer Library implementation that retrieves a pointer to the\r
+# PEI Services Table from a global variable. Not available to modules that execute from\r
+# read-only memory.\r
+#\r
+# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php.\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = PeiServicesTablePointerLib\r
+ FILE_GUID = 1c747f6b-0a58-49ae-8ea3-0327a4fa10e3\r
+ MODULE_TYPE = PEIM\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = PeiServicesTablePointerLib|PEIM PEI_CORE SEC\r
+\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+#\r
+\r
+[Sources]\r
+ PeiServicesTablePointer.c\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec\r
+\r
+[LibraryClasses]\r
+ DebugLib\r
+ \r
+[Pcd]\r
+ gArmRealViewEbPkgTokenSpaceGuid.PcdPeiServicePtrAddr\r
--- /dev/null
+/** @file\r
+ Implement EFI RealTimeClock runtime services via RTC Lib.\r
+ \r
+ Currently this driver does not support runtime virtual calling.\r
+\r
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiDxe.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/RealTimeClockLib.h>\r
+\r
+\r
+/**\r
+ Returns the current time and date information, and the time-keeping capabilities\r
+ of the hardware platform.\r
+\r
+ @param Time A pointer to storage to receive a snapshot of the current time.\r
+ @param Capabilities An optional pointer to a buffer to receive the real time clock\r
+ device's capabilities.\r
+\r
+ @retval EFI_SUCCESS The operation completed successfully.\r
+ @retval EFI_INVALID_PARAMETER Time is NULL.\r
+ @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibGetTime (\r
+ OUT EFI_TIME *Time,\r
+ OUT EFI_TIME_CAPABILITIES *Capabilities\r
+ )\r
+{\r
+ //\r
+ // Fill in Time and Capabilities via data from you RTC\r
+ //\r
+ return EFI_DEVICE_ERROR;\r
+}\r
+\r
+\r
+/**\r
+ Sets the current local time and date information.\r
+\r
+ @param Time A pointer to the current time.\r
+\r
+ @retval EFI_SUCCESS The operation completed successfully.\r
+ @retval EFI_INVALID_PARAMETER A time field is out of range.\r
+ @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibSetTime (\r
+ IN EFI_TIME *Time\r
+ )\r
+{\r
+ //\r
+ // Use Time, to set the time in your RTC hardware\r
+ //\r
+ return EFI_DEVICE_ERROR;\r
+}\r
+\r
+\r
+/**\r
+ Returns the current wakeup alarm clock setting.\r
+\r
+ @param Enabled Indicates if the alarm is currently enabled or disabled.\r
+ @param Pending Indicates if the alarm signal is pending and requires acknowledgement.\r
+ @param Time The current alarm setting.\r
+\r
+ @retval EFI_SUCCESS The alarm settings were returned.\r
+ @retval EFI_INVALID_PARAMETER Any parameter is NULL.\r
+ @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibGetWakeupTime (\r
+ OUT BOOLEAN *Enabled,\r
+ OUT BOOLEAN *Pending,\r
+ OUT EFI_TIME *Time\r
+ )\r
+{\r
+ // Not a required feature\r
+ return EFI_UNSUPPORTED;\r
+}\r
+\r
+\r
+/**\r
+ Sets the system wakeup alarm clock time.\r
+\r
+ @param Enabled Enable or disable the wakeup alarm.\r
+ @param Time If Enable is TRUE, the time to set the wakeup alarm for.\r
+\r
+ @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If\r
+ Enable is FALSE, then the wakeup alarm was disabled.\r
+ @retval EFI_INVALID_PARAMETER A time field is out of range.\r
+ @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error.\r
+ @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibSetWakeupTime (\r
+ IN BOOLEAN Enabled,\r
+ OUT EFI_TIME *Time\r
+ )\r
+{\r
+ // Not a required feature\r
+ return EFI_UNSUPPORTED;\r
+}\r
+\r
+\r
+\r
+/**\r
+ This is the declaration of an EFI image entry point. This can be the entry point to an application\r
+ written to this specification, an EFI boot service driver, or an EFI runtime driver.\r
+\r
+ @param ImageHandle Handle that identifies the loaded image.\r
+ @param SystemTable System Table for this image.\r
+\r
+ @retval EFI_SUCCESS The operation completed successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibRtcInitialize (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ //\r
+ // Do some initialization if reqruied to turn on the RTC\r
+ //\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+/**\r
+ Fixup internal data so that EFI can be call in virtual mode.\r
+ Call the passed in Child Notify event and convert any pointers in\r
+ lib to virtual mode.\r
+\r
+ @param[in] Event The Event that is being processed\r
+ @param[in] Context Event Context\r
+**/\r
+VOID\r
+EFIAPI\r
+LibRtcVirtualNotifyEvent (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ //\r
+ // Only needed if you are going to support the OS calling RTC functions in virtual mode.\r
+ // You will need to call EfiConvertPointer (). To convert any stored physical addresses \r
+ // to virtual address. After the OS transistions to calling in virtual mode, all future\r
+ // runtime calls will be made in virtual mode.\r
+ //\r
+ return;\r
+}\r
+\r
+\r
+\r
--- /dev/null
+#/** @file\r
+# Memory Status Code Library for UEFI drivers\r
+#\r
+# Lib to provide memory journal status code reporting Routines\r
+# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbRealTimeClockLib\r
+ FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = RealTimeClockLib\r
+\r
+\r
+[Sources.common]\r
+ RealTimeClockLib.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+ DebugLib\r
+
\ No newline at end of file
--- /dev/null
+/** @file\r
+ Template library implementation to support ResetSystem Runtime call.\r
+ \r
+ Fill in the templates with what ever makes you system reset.\r
+\r
+\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#include <PiDxe.h>\r
+\r
+#include <Library/BaseLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/EfiResetSystemLib.h>\r
+\r
+#include <ArmEb/ArmEb.h>\r
+\r
+/**\r
+ Resets the entire platform.\r
+\r
+ @param ResetType The type of reset to perform.\r
+ @param ResetStatus The status code for the reset.\r
+ @param DataSize The size, in bytes, of WatchdogData.\r
+ @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or\r
+ EfiResetShutdown the data buffer starts with a Null-terminated\r
+ Unicode string, optionally followed by additional binary data.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibResetSystem (\r
+ IN EFI_RESET_TYPE ResetType,\r
+ IN EFI_STATUS ResetStatus,\r
+ IN UINTN DataSize,\r
+ IN CHAR16 *ResetData OPTIONAL\r
+ )\r
+{\r
+ if (ResetData != NULL) {\r
+ DEBUG ((EFI_D_ERROR, "%s", ResetData));\r
+ }\r
+\r
+ switch (ResetType) {\r
+ case EfiResetWarm:\r
+ // Map a warm reset into a cold reset\r
+ case EfiResetCold:\r
+ case EfiResetShutdown:\r
+ default:\r
+ CpuDeadLoop ();\r
+ break;\r
+ }\r
+\r
+ // If the reset didn't work, return an error.\r
+ ASSERT (FALSE);\r
+ return EFI_DEVICE_ERROR;\r
+}\r
+ \r
+\r
+\r
+/**\r
+ Initialize any infrastructure required for LibResetSystem () to function.\r
+\r
+ @param ImageHandle The firmware allocated handle for the EFI image.\r
+ @param SystemTable A pointer to the EFI System Table.\r
+ \r
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibInitializeResetSystem (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ return EFI_SUCCESS;\r
+}\r
+\r
--- /dev/null
+#/** @file\r
+# Reset System lib to make it easy to port new platforms\r
+#\r
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbResetSystemLib\r
+ FILE_GUID = CEFFA65C-B568-453e-9E11-B81AE683D035\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = EfiResetSystemLib\r
+\r
+\r
+[Sources.common]\r
+ ResetSystemLib.c\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec\r
+\r
+[LibraryClasses]\r
+ DebugLib\r
+ BaseLib\r
--- /dev/null
+/** @file\r
+ Serial I/O Port library functions with no library constructor/destructor\r
+\r
+\r
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Base.h>\r
+#include <Library/SerialPortLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+\r
+#include <ArmEb/ArmEb.h>\r
+\r
+/*\r
+\r
+ Programmed hardware of Serial port.\r
+\r
+ @return Always return EFI_UNSUPPORTED.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortInitialize (\r
+ VOID\r
+ )\r
+{\r
+ UINT32 Base = PcdGet32 (PcdConsoleUartBase);\r
+ \r
+ // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ\r
+ MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);\r
+ MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);\r
+\r
+ // no parity, 1 stop, no fifo, 8 data bits\r
+ MmioWrite32 (Base + UARTLCR_H, 0x60);\r
+\r
+ // clear any pending errors\r
+ MmioWrite32 (Base + UARTECR, 0);\r
+\r
+ // enable tx, rx, and uart overall\r
+ MmioWrite32 (Base + UARTCR, 0x301);\r
+\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Write data to serial device.\r
+\r
+ @param Buffer Point of data buffer which need to be writed.\r
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
+\r
+ @retval 0 Write data failed.\r
+ @retval !0 Actual number of bytes writed to serial device.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+SerialPortWrite (\r
+ IN UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
+)\r
+{\r
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;\r
+ UINTN Count;\r
+ \r
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
+ while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) == 0);\r
+ MmioWrite8 (DR, *Buffer);\r
+ }\r
+\r
+ return NumberOfBytes;\r
+}\r
+\r
+\r
+/**\r
+ Read data from serial device and save the datas in buffer.\r
+\r
+ @param Buffer Point of data buffer which need to be writed.\r
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
+\r
+ @retval 0 Read data failed.\r
+ @retval !0 Aactual number of bytes read from serial device.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+SerialPortRead (\r
+ OUT UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
+)\r
+{\r
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
+ UINT32 DR = PcdGet32 (PcdConsoleUartBase) + UARTDR;\r
+ UINTN Count;\r
+ \r
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
+ while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) != 0);\r
+ *Buffer = MmioRead8 (DR);\r
+ }\r
+\r
+ return NumberOfBytes;\r
+}\r
+\r
+\r
+/**\r
+ Check to see if any data is avaiable to be read from the debug device.\r
+\r
+ @retval EFI_SUCCESS At least one byte of data is avaiable to be read\r
+ @retval EFI_NOT_READY No data is avaiable to be read\r
+ @retval EFI_DEVICE_ERROR The serial device is not functioning properly\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+SerialPortPoll (\r
+ VOID\r
+ )\r
+{\r
+ UINT32 FR = PcdGet32 (PcdConsoleUartBase) + UARTFR;\r
+\r
+ if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {\r
+ return TRUE;\r
+ } else {\r
+ return FALSE;\r
+ }\r
+}\r
+\r
--- /dev/null
+#/** @file\r
+# EDK Serial port lib\r
+#\r
+# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbSerialPortLib\r
+ FILE_GUID = C653196A-3BE1-4ec7-850B-DB7E0A16150F\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = SerialPortLib\r
+\r
+\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources.common]\r
+ SerialPortLib.c\r
+\r
+[LibraryClasses]\r
+ IoLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec\r
+ \r
+[FixedPcd]\r
+ gArmRealViewEbPkgTokenSpaceGuid.PcdConsoleUartBase\r
+\r
--- /dev/null
+/** @file\r
+ TimerLib for ARM EB. Hardcoded to 100ns period\r
+\r
+ This library assume the following initialization, usually done in SEC. \r
+\r
+ // configure SP810 to use 1MHz clock and disable\r
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r
+ // Enable\r
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);\r
+\r
+ // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
+\r
+ // preload the timer count register\r
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);\r
+\r
+ // enable the timer\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);\r
+\r
+\r
+ Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Base.h>\r
+\r
+#include <Library/BaseLib.h>\r
+#include <Library/TimerLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+\r
+#include <ArmEb/ArmEb.h>\r
+\r
+\r
+/**\r
+ Stalls the CPU for at least the given number of microseconds.\r
+\r
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
+\r
+ @param MicroSeconds The minimum number of microseconds to delay.\r
+\r
+ @return The value of MicroSeconds inputted.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+MicroSecondDelay (\r
+ IN UINTN MicroSeconds\r
+ )\r
+{\r
+ UINT64 NanoSeconds;\r
+ \r
+ NanoSeconds = MultU64x32 (MicroSeconds, 1000);\r
+\r
+ while (NanoSeconds > (UINTN)-1) { \r
+ NanoSecondDelay((UINTN)-1);\r
+ NanoSeconds -= (UINTN)-1;\r
+ }\r
+\r
+ NanoSecondDelay (NanoSeconds);\r
+\r
+ return MicroSeconds;\r
+}\r
+\r
+/**\r
+ Stalls the CPU for at least the given number of nanoseconds.\r
+\r
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
+\r
+ @param NanoSeconds The minimum number of nanoseconds to delay.\r
+\r
+ @return The value of NanoSeconds inputted.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+NanoSecondDelay (\r
+ IN UINTN NanoSeconds\r
+ )\r
+{\r
+ UINT32 TickNumber;\r
+\r
+ if (NanoSeconds == 0) {\r
+ return NanoSeconds;\r
+ }\r
+\r
+ // Round up to 100ns Tick Number\r
+ TickNumber = (UINT32)NanoSeconds / 100;\r
+ TickNumber += ((UINT32)NanoSeconds % 100) == 0 ? 0 : 1;\r
+\r
+ // load the timer count register\r
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, TickNumber);\r
+\r
+ while (MmioRead32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {\r
+ ;\r
+ } \r
+ \r
+ return NanoSeconds;\r
+}\r
+\r
+/**\r
+ Retrieves the current value of a 64-bit free running performance counter.\r
+\r
+ The counter can either count up by 1 or count down by 1. If the physical\r
+ performance counter counts by a larger increment, then the counter values\r
+ must be translated. The properties of the counter can be retrieved from\r
+ GetPerformanceCounterProperties().\r
+\r
+ @return The current value of the free running performance counter.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+GetPerformanceCounter (\r
+ VOID\r
+ )\r
+{ \r
+ // Free running 64-bit/32-bit counter is needed here.\r
+ // Don't think we need this to boot, just to do performance profile\r
+ ASSERT (FALSE);\r
+ return (UINT64)0ULL;\r
+}\r
+\r
+\r
+/**\r
+ Retrieves the 64-bit frequency in Hz and the range of performance counter\r
+ values.\r
+\r
+ If StartValue is not NULL, then the value that the performance counter starts\r
+ with immediately after is it rolls over is returned in StartValue. If\r
+ EndValue is not NULL, then the value that the performance counter end with\r
+ immediately before it rolls over is returned in EndValue. The 64-bit\r
+ frequency of the performance counter in Hz is always returned. If StartValue\r
+ is less than EndValue, then the performance counter counts up. If StartValue\r
+ is greater than EndValue, then the performance counter counts down. For\r
+ example, a 64-bit free running counter that counts up would have a StartValue\r
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
+\r
+ @param StartValue The value the performance counter starts with when it\r
+ rolls over.\r
+ @param EndValue The value that the performance counter ends with before\r
+ it rolls over.\r
+\r
+ @return The frequency in Hz.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+GetPerformanceCounterProperties (\r
+ OUT UINT64 *StartValue, OPTIONAL\r
+ OUT UINT64 *EndValue OPTIONAL\r
+ )\r
+{\r
+ if (StartValue != NULL) {\r
+ // Timer starts with the reload value\r
+ *StartValue = (UINT64)0ULL;\r
+ }\r
+ \r
+ if (EndValue != NULL) {\r
+ // Timer counts up to 0xFFFFFFFF\r
+ *EndValue = 0xFFFFFFFF;\r
+ }\r
+ \r
+ return 100;\r
+}\r
+\r
+\r
--- /dev/null
+#/** @file\r
+# Timer library implementation\r
+#\r
+# A non-functional instance of the Timer Library that can be used as a template\r
+# for the implementation of a functional timer library instance. This library instance can\r
+# also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer\r
+# services as well as EBC modules that require timer services\r
+# Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbTimerLib\r
+ FILE_GUID = B2333114-328B-47cc-8E5E-F64E22E4B417\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = TimerLib \r
+\r
+[Sources.common]\r
+ TimerLib.c\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec\r
+\r
+[LibraryClasses]\r
+ DebugLib\r
+ IoLib\r
+ BaseLib\r
+\r
+[Pcd]\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds\r
+\r
--- /dev/null
+/**@file\r
+\r
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ MemoryInit.c\r
+ \r
+Abstract:\r
+\r
+ PEIM to provide fake memory init\r
+\r
+**/\r
+\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <PiPei.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+#include <Ppi/MasterBootMode.h>\r
+#include <Ppi/BootInRecoveryMode.h>\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/DebugLib.h>\r
+#include <Library/PeimEntryPoint.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Library/PeiServicesLib.h>\r
+\r
+\r
+//\r
+// Module globals\r
+//\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+InitializeMemory (\r
+ IN EFI_PEI_FILE_HANDLE FileHandle,\r
+ IN CONST EFI_PEI_SERVICES **PeiServices\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ \r
+\r
+Arguments:\r
+\r
+ FileHandle - Handle of the file being invoked.\r
+ PeiServices - Describes the list of possible PEI Services.\r
+ \r
+Returns:\r
+\r
+ Status - EFI_SUCCESS if the boot mode could be set\r
+\r
+--*/\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;\r
+ UINT64 MemoryBase;\r
+ UINT64 MemorySize;\r
+\r
+ DEBUG ((EFI_D_ERROR, "Memory Init PEIM Loaded\n"));\r
+\r
+ // NOTE: this needs to come from your memory controller initization process\r
+ MemoryBase = 0;\r
+ MemorySize = 0x10000000;\r
+\r
+ DEBUG ((EFI_D_ERROR, "Installing hardcoded 256MB\n"));\r
+ Status = PeiServicesInstallPeiMemory (MemoryBase, MemorySize);\r
+ ASSERT_EFI_ERROR (Status);\r
+ \r
+ Attributes =\r
+ (\r
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_TESTED\r
+ );\r
+ \r
+ BuildResourceDescriptorHob (\r
+ EFI_RESOURCE_SYSTEM_MEMORY,\r
+ Attributes,\r
+ MemoryBase,\r
+ MemorySize\r
+ );\r
+\r
+ return Status;\r
+}\r
--- /dev/null
+## @file\r
+# Component description file for BootMode module\r
+#\r
+# This module provides platform specific function to detect boot mode.\r
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = MemoryInit\r
+ FILE_GUID = D6F4724D-4504-418c-92BF-5E4D98FDBE85\r
+ MODULE_TYPE = PEIM\r
+ VERSION_STRING = 1.0\r
+\r
+ ENTRY_POINT = InitializeMemory\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ MemoryInit.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+\r
+\r
+[LibraryClasses]\r
+ PeimEntryPoint\r
+ DebugLib\r
+ HobLib\r
+\r
+\r
+[Ppis]\r
+\r
+[FixedPcd]\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device\r
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase\r
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize\r
+ \r
+[depex]\r
+ TRUE\r
+ \r
--- /dev/null
+/**@file\r
+\r
+Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ BootMode.c\r
+ \r
+Abstract:\r
+\r
+ Tiano PEIM to provide the platform support functionality within Windows\r
+\r
+**/\r
+\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <PiPei.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+#include <Ppi/MasterBootMode.h>\r
+#include <Ppi/BootInRecoveryMode.h>\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/DebugLib.h>\r
+#include <Library/PeimEntryPoint.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/HobLib.h>\r
+\r
+\r
+//\r
+// Module globals\r
+//\r
+EFI_PEI_PPI_DESCRIPTOR mPpiListBootMode = {\r
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+ &gEfiPeiMasterBootModePpiGuid,\r
+ NULL\r
+};\r
+\r
+EFI_PEI_PPI_DESCRIPTOR mPpiListRecoveryBootMode = {\r
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+ &gEfiPeiBootInRecoveryModePpiGuid,\r
+ NULL\r
+};\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+InitializePlatformPeim (\r
+ IN EFI_PEI_FILE_HANDLE FileHandle,\r
+ IN CONST EFI_PEI_SERVICES **PeiServices\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ \r
+\r
+Arguments:\r
+\r
+ FileHandle - Handle of the file being invoked.\r
+ PeiServices - Describes the list of possible PEI Services.\r
+ \r
+Returns:\r
+\r
+ Status - EFI_SUCCESS if the boot mode could be set\r
+\r
+--*/\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_RESOURCE_ATTRIBUTE_TYPE Attributes;\r
+ UINTN BootMode;\r
+\r
+ DEBUG ((EFI_D_ERROR, "ARM EB Platform PEIM Loaded\n"));\r
+\r
+ BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));\r
+ \r
+ Attributes =(\r
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+ EFI_RESOURCE_ATTRIBUTE_TESTED |\r
+ EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE\r
+ );\r
+\r
+ //BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY, Attributes, (UINTN)MemoryBegin, MemoryLength);\r
+\r
+ BuildFvHob (FixedPcdGet32(PcdFlashFvMainBase), FixedPcdGet32(PcdFlashFvMainSize));\r
+\r
+ BuildResourceDescriptorHob (EFI_RESOURCE_FIRMWARE_DEVICE,\r
+ (EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
+ EFI_RESOURCE_ATTRIBUTE_TESTED |\r
+ EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE),\r
+ FixedPcdGet32(PcdFlashFvMainBase), FixedPcdGet32(PcdFlashFvMainSize));\r
+\r
+ //BuildStackHob ((UINTN)StackBase, Hob->EfiMemoryTop - (UINTN)StackBase);\r
+\r
+\r
+ //\r
+ // Let's assume things are OK if not told otherwise\r
+ // Should we read an environment variable in order to easily change this?\r
+ //\r
+ BootMode = BOOT_WITH_FULL_CONFIGURATION;\r
+\r
+ Status = (**PeiServices).SetBootMode (PeiServices, (UINT8) BootMode);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ Status = (**PeiServices).InstallPpi (PeiServices, &mPpiListBootMode);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ if (BootMode == BOOT_IN_RECOVERY_MODE) {\r
+ Status = (**PeiServices).InstallPpi (PeiServices, &mPpiListRecoveryBootMode);\r
+ ASSERT_EFI_ERROR (Status);\r
+ }\r
+\r
+ return Status;\r
+}\r
--- /dev/null
+## @file\r
+# Component description file for BootMode module\r
+#\r
+# This module provides platform specific function to detect boot mode.\r
+# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+##\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = PlatformPei\r
+ FILE_GUID = 8E7E1414-2290-4a80-A325-F55CFF10907A\r
+ MODULE_TYPE = PEIM\r
+ VERSION_STRING = 1.0\r
+\r
+ ENTRY_POINT = InitializePlatformPeim\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources]\r
+ PlatformPei.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+\r
+\r
+[LibraryClasses]\r
+ PeimEntryPoint\r
+ DebugLib\r
+ HobLib\r
+\r
+\r
+[Ppis]\r
+ gEfiPeiMasterBootModePpiGuid # PPI ALWAYS_PRODUCED\r
+ gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED\r
+\r
+[FixedPcd]\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device\r
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase\r
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize\r
+ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize\r
+ \r
+[depex]\r
+ TRUE\r
+ \r
--- /dev/null
+#------------------------------------------------------------------------------ \r
+#\r
+# ARM EB Entry point. Reset vector in FV header will brach to\r
+# _ModuleEntryPoint. \r
+#\r
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler \r
+# does not support = assembly syntax for ldr.\r
+#\r
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+\r
+.text\r
+.align 3\r
+\r
+.globl ASM_PFX(CEntryPoint)\r
+.globl ASM_PFX(_ModuleEntryPoint)\r
+\r
+ASM_PFX(_ModuleEntryPoint):\r
+ \r
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR\r
+ //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8) \r
+\r
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
+ mrc p15, 0, r0, c1, c0, 2\r
+ orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)\r
+ mcr p15, 0, r0, c1, c0, 2\r
+ mov r0, #0x40000000 // Set EN bit in FPEXC\r
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
+ \r
+ // Set CPU vectors to 0 (which is currently flash)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
+ mcr p15, 0, r0, c12, c0, 0\r
+ isb // Sync changes to control registers\r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2 \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3 \r
+ add r4, r2, r3\r
+ mov r13, r4\r
+\r
+ // Call C entry point\r
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1 \r
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0 \r
+ blx ASM_PFX(CEntryPoint) \r
+\r
+ShouldNeverGetHere:\r
+ // _CEntryPoint should never return \r
+ b ShouldNeverGetHere\r
+\r
+ \r
--- /dev/null
+//------------------------------------------------------------------------------ \r
+//\r
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+ \r
+ IMPORT CEntryPoint\r
+ EXPORT _ModuleEntryPoint\r
+ \r
+ PRESERVE8\r
+ AREA ModuleEntryPoint, CODE, READONLY\r
+ \r
+\r
+StartupAddr DCD CEntryPoint\r
+\r
+_ModuleEntryPoint\r
+ \r
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR\r
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE\r
+\r
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
+ mrc p15, 0, r0, c1, c0, 2\r
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)\r
+ mcr p15, 0, r0, c1, c0, 2\r
+ mov r0, #0x40000000 // Set EN bit in FPEXC\r
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
+ \r
+ // Set CPU vectors to 0 (which is currently flash)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
+ mcr p15, 0, r0, c12, c0, 0\r
+ isb // Sync changes to control registers\r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2 \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3 \r
+ add r4, r2, r3\r
+ mov r13, r4\r
+ \r
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1 \r
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0 \r
+\r
+ // move sec startup address into a data register\r
+ // ensure we're jumping to FV version of the code (not boot remapped alias)\r
+ ldr r4, StartupAddr\r
+\r
+ // jump to SEC C code\r
+ blx r4\r
+ \r
+ // Call C entry point\r
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP\r
+ \r
+ // blx CEntryPoint \r
+\r
+ShouldNeverGetHere\r
+ // _CEntryPoint should never return \r
+ b ShouldNeverGetHere\r
+ \r
+ END\r
+\r
+\r
--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+\r
+#include <Library/ArmLib.h>\r
+#include <Library/PrePiLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+// DDR attributes\r
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
+\r
+// SoC registers. L3 interconnects\r
+#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000\r
+#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000\r
+#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE\r
+\r
+// SoC registers. L4 interconnects\r
+#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000\r
+#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000\r
+#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE\r
+\r
+VOID\r
+InitCache (\r
+ IN UINT32 MemoryBase,\r
+ IN UINT32 MemoryLength\r
+ )\r
+{\r
+ UINT32 CacheAttributes;\r
+ ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];\r
+ VOID *TranslationTableBase;\r
+ UINTN TranslationTableSize;\r
+\r
+ if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
+ } else {\r
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
+ }\r
+\r
+ // DDR\r
+ MemoryTable[0].PhysicalBase = MemoryBase;\r
+ MemoryTable[0].VirtualBase = MemoryBase;\r
+ MemoryTable[0].Length = MemoryLength;\r
+ MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
+\r
+ // SOC Registers. L3 interconnects\r
+ MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;\r
+ MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;\r
+ MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;\r
+ MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;\r
+ \r
+ // SOC Registers. L4 interconnects\r
+ MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
+ MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
+ MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;\r
+ MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;\r
+\r
+ // End of Table\r
+ MemoryTable[3].PhysicalBase = 0;\r
+ MemoryTable[3].VirtualBase = 0;\r
+ MemoryTable[3].Length = 0;\r
+ MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
+ \r
+ ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
+ \r
+ BuildMemoryAllocationHob ((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
+}\r
--- /dev/null
+/** @file\r
+ LZMA Decompress Library header file\r
+\r
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __LZMA_DECOMPRESS_H___\r
+#define __LZMA_DECOMPRESS_H___\r
+\r
+/**\r
+ Examines a GUIDed section and returns the size of the decoded buffer and the\r
+ size of an scratch buffer required to actually decode the data in a GUIDed section.\r
+\r
+ Examines a GUIDed section specified by InputSection. \r
+ If GUID for InputSection does not match the GUID that this handler supports,\r
+ then RETURN_UNSUPPORTED is returned. \r
+ If the required information can not be retrieved from InputSection,\r
+ then RETURN_INVALID_PARAMETER is returned.\r
+ If the GUID of InputSection does match the GUID that this handler supports,\r
+ then the size required to hold the decoded buffer is returned in OututBufferSize,\r
+ the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field\r
+ from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.\r
+ \r
+ If InputSection is NULL, then ASSERT().\r
+ If OutputBufferSize is NULL, then ASSERT().\r
+ If ScratchBufferSize is NULL, then ASSERT().\r
+ If SectionAttribute is NULL, then ASSERT().\r
+\r
+\r
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.\r
+ @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required\r
+ if the buffer specified by InputSection were decoded.\r
+ @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space\r
+ if the buffer specified by InputSection were decoded.\r
+ @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes\r
+ field of EFI_GUID_DEFINED_SECTION in the PI Specification.\r
+\r
+ @retval RETURN_SUCCESS The information about InputSection was returned.\r
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.\r
+ @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+LzmaGuidedSectionGetInfo (\r
+ IN CONST VOID *InputSection,\r
+ OUT UINT32 *OutputBufferSize,\r
+ OUT UINT32 *ScratchBufferSize,\r
+ OUT UINT16 *SectionAttribute\r
+ );\r
+\r
+/**\r
+ Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.\r
+ \r
+ Decodes the GUIDed section specified by InputSection. \r
+ If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned. \r
+ If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.\r
+ If the GUID of InputSection does match the GUID that this handler supports, then InputSection\r
+ is decoded into the buffer specified by OutputBuffer and the authentication status of this\r
+ decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the\r
+ data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,\r
+ the decoded data will be placed in caller allocated buffer specified by OutputBuffer.\r
+ \r
+ If InputSection is NULL, then ASSERT().\r
+ If OutputBuffer is NULL, then ASSERT().\r
+ If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().\r
+ If AuthenticationStatus is NULL, then ASSERT().\r
+\r
+\r
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.\r
+ @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation. \r
+ @param[out] ScratchBuffer A caller allocated buffer that may be required by this function\r
+ as a scratch buffer to perform the decode operation. \r
+ @param[out] AuthenticationStatus \r
+ A pointer to the authentication status of the decoded output buffer.\r
+ See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI\r
+ section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must\r
+ never be set by this handler.\r
+\r
+ @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.\r
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.\r
+ @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+LzmaGuidedSectionExtraction (\r
+ IN CONST VOID *InputSection,\r
+ OUT VOID **OutputBuffer,\r
+ OUT VOID *ScratchBuffer, OPTIONAL\r
+ OUT UINT32 *AuthenticationStatus\r
+ );\r
+ \r
+#endif // __LZMADECOMPRESS_H__\r
+\r
--- /dev/null
+#------------------------------------------------------------------------------ \r
+#\r
+# ARM EB Entry point. Reset vector in FV header will brach to\r
+# _ModuleEntryPoint. \r
+#\r
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler \r
+# does not support = assembly syntax for ldr.\r
+#\r
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+\r
+.text\r
+.align 3\r
+\r
+.globl ASM_PFX(CEntryPoint)\r
+.globl ASM_PFX(_ModuleEntryPoint)\r
+\r
+ASM_PFX(_ModuleEntryPoint):\r
+ \r
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR\r
+ //MmioOr32 (EB_SP810_CTRL_BASE ,BIT8) \r
+\r
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
+ mrc p15, 0, r0, c1, c0, 2\r
+ orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)\r
+ mcr p15, 0, r0, c1, c0, 2\r
+ mov r0, #0x40000000 // Set EN bit in FPEXC\r
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
+ \r
+ // Set CPU vectors to 0 (which is currently flash)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
+ mcr p15, 0, r0, c12, c0, 0\r
+ isb // Sync changes to control registers\r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2 \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3 \r
+ add r4, r2, r3\r
+ mov r13, r4\r
+\r
+ // Call C entry point\r
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1 \r
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0 \r
+ blx ASM_PFX(CEntryPoint) \r
+\r
+ShouldNeverGetHere:\r
+ // _CEntryPoint should never return \r
+ b ShouldNeverGetHere\r
+\r
+ \r
--- /dev/null
+//------------------------------------------------------------------------------ \r
+//\r
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+ \r
+ IMPORT CEntryPoint\r
+ EXPORT _ModuleEntryPoint\r
+ \r
+ PRESERVE8\r
+ AREA ModuleEntryPoint, CODE, READONLY\r
+ \r
+\r
+StartupAddr DCD CEntryPoint\r
+\r
+_ModuleEntryPoint\r
+ \r
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR\r
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE\r
+\r
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
+ mrc p15, 0, r0, c1, c0, 2\r
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)\r
+ mcr p15, 0, r0, c1, c0, 2\r
+ mov r0, #0x40000000 // Set EN bit in FPEXC\r
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
+ \r
+ // Set CPU vectors to 0 (which is currently flash)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
+ mcr p15, 0, r0, c12, c0, 0\r
+ isb // Sync changes to control registers\r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2 \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3 \r
+ add r4, r2, r3\r
+ mov r13, r4\r
+ \r
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1 \r
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0 \r
+\r
+ // move sec startup address into a data register\r
+ // ensure we're jumping to FV version of the code (not boot remapped alias)\r
+ ldr r4, StartupAddr\r
+\r
+ // jump to SEC C code\r
+ blx r4\r
+ \r
+ // Call C entry point\r
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP\r
+ \r
+ // blx CEntryPoint \r
+\r
+ShouldNeverGetHere\r
+ // _CEntryPoint should never return \r
+ b ShouldNeverGetHere\r
+ \r
+ END\r
+\r
+\r
--- /dev/null
+/** @file\r
+ C Entry point for the SEC. First C code after the reset vector.\r
+\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/PrePiLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/ArmLib.h>\r
+#include <Library/PeCoffGetEntryPointLib.h>\r
+#include <Library/DebugAgentLib.h>\r
+\r
+#include <Ppi/GuidedSectionExtraction.h>\r
+#include <Guid/LzmaDecompress.h>\r
+\r
+#include <ArmEb/ArmEb.h>\r
+\r
+#include "LzmaDecompress.h"\r
+\r
+VOID\r
+EFIAPI \r
+_ModuleEntryPoint(\r
+ VOID\r
+ );\r
+\r
+CHAR8 *\r
+DeCygwinPathIfNeeded (\r
+ IN CHAR8 *Name\r
+ );\r
+\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortInitialize (\r
+ VOID\r
+ );\r
+ \r
+ \r
+VOID\r
+UartInit (\r
+ VOID\r
+ )\r
+{\r
+ // SEC phase needs to run library constructors by hand.\r
+ // This assumes we are linked agains the SerialLib\r
+ // In non SEC modules the init call is in autogenerated code.\r
+ SerialPortInitialize ();\r
+}\r
+\r
+VOID\r
+TimerInit (\r
+ VOID\r
+ )\r
+{\r
+ // configure SP810 to use 1MHz clock and disable\r
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);\r
+ // Enable\r
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER2_EN);\r
+\r
+ // configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);\r
+\r
+ // preload the timer count register\r
+ MmioWrite32 (EB_SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);\r
+\r
+ // enable the timer\r
+ MmioOr32 (EB_SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);\r
+}\r
+\r
+\r
+VOID\r
+InitCache (\r
+ IN UINT32 MemoryBase,\r
+ IN UINT32 MemoryLength\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+ExtractGuidedSectionLibConstructor (\r
+ VOID\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+LzmaDecompressLibConstructor (\r
+ VOID\r
+ );\r
+\r
+\r
+VOID\r
+CEntryPoint (\r
+ IN VOID *MemoryBase,\r
+ IN UINTN MemorySize,\r
+ IN VOID *StackBase,\r
+ IN UINTN StackSize\r
+ )\r
+{\r
+ VOID *HobBase;\r
+\r
+ // HOB list is at bottom of stack area\r
+ // Stack grows from top-to-bottom towards HOB list\r
+ HobBase = (VOID *)StackBase;\r
+ CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);\r
+\r
+ // Turn off remapping NOR to 0. We can will now see DRAM in low memory\r
+ MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE\r
+\r
+ // Enable program flow prediction, if supported.\r
+ ArmEnableBranchPrediction ();\r
+\r
+ // Initialize CPU cache\r
+ InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);\r
+\r
+ // Add memory allocation hob for relocated FD\r
+ BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);\r
+\r
+ // Add the FVs to the hob list\r
+ BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));\r
+\r
+ // Start talking\r
+ UartInit ();\r
+\r
+ InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL);\r
+ SaveAndSetDebugTimerInterrupt (TRUE);\r
+\r
+ DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r
+\r
+ // Start up a free running timer so that the timer lib will work\r
+ TimerInit ();\r
+\r
+ // SEC phase needs to run library constructors by hand.\r
+ ExtractGuidedSectionLibConstructor ();\r
+ LzmaDecompressLibConstructor ();\r
+\r
+ // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
+ BuildPeCoffLoaderHob ();\r
+ BuildExtractSectionHob (\r
+ &gLzmaCustomDecompressGuid,\r
+ LzmaGuidedSectionGetInfo,\r
+ LzmaGuidedSectionExtraction\r
+ );\r
+\r
+ // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
+ DecompressFirstFv ();\r
+\r
+ // Load the DXE Core and transfer control to it\r
+ LoadDxeCoreFromFv (NULL, 0);\r
+ \r
+ // DXE Core should always load and never return\r
+ ASSERT (FALSE);\r
+}\r
+\r
--- /dev/null
+
+#/** @file
+# SEC - Reset vector code that jumps to C and loads DXE core
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEBSec
+ FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+
+
+[Sources.ARM]
+ ModuleEntryPoint.S | GCC
+ ModuleEntryPoint.asm | RVCT
+
+[Sources.ARM]
+ Sec.c
+ Cache.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ ArmLib
+ IoLib
+ ExtractGuidedSectionLib
+ LzmaDecompressLib
+ PeCoffGetEntryPointLib
+ DebugAgentLib
+
+
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable
+
+[FixedPcd]
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
+ gEmbeddedTokenSpaceGuid.PcdMemoryBase
+ gEmbeddedTokenSpaceGuid.PcdMemorySize
+
+
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
+
+
--- /dev/null
+#------------------------------------------------------------------------------ \r
+#\r
+# ARM EB Entry point. Reset vector in FV header will brach to\r
+# _ModuleEntryPoint. \r
+#\r
+# We use crazy macros, like LoadConstantToReg, since Xcode assembler \r
+# does not support = assembly syntax for ldr.\r
+#\r
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+#\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+\r
+.text\r
+.align 3\r
+\r
+.globl ASM_PFX(CEntryPoint)\r
+.globl ASM_PFX(_ModuleEntryPoint)\r
+.globl ASM_PFX(StartupAddr)\r
+\r
+ASM_PFX(_ModuleEntryPoint):\r
+ \r
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR\r
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE\r
+\r
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
+ mrc p15, 0, r0, c1, c0, 2\r
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)\r
+ mcr p15, 0, r0, c1, c0, 2\r
+ mov r0, #0x40000000 // Set EN bit in FPEXC\r
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
+ \r
+ // Set CPU vectors to 0 (which is currently flash)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
+ mcr p15, 0, r0, c12, c0, 0\r
+ isb // Sync changes to control registers\r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r0) // temp ram base arg 0 TODO: change "stackbase" to "temprambase"\r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r1) // temp ram size arg 1\r
+ lsr r3, r1, #1 // r4 = size of temp mem / 2\r
+ add r3, r3, r0 // r2 = temp ram base + r4\r
+ mov r13, r3 // result: stack pointer = temp ram base + (size of temp mem / 2)\r
+ \r
+ // lr points to area in reset vector block containing PEI core address\r
+ ldr r2, [lr] // pei core arg 3\r
+ \r
+ // move sec startup address into a data register\r
+ // ensure we're jumping to FV version of the code (not boot remapped alias)\r
+#ifndef __APPLE__\r
+// This does not generate a valid relocation for Xcode. Fix me...\r
+ ldr r4, ASM_PFX(StartupAddr)\r
+\r
+ // jump to SEC C code\r
+ blx r4\r
+#endif\r
+ \r
+\r
+ASM_PFX(ShouldNeverGetHere):\r
+ // _CEntryPoint should never return \r
+ b ASM_PFX(ShouldNeverGetHere)\r
+\r
+ \r
--- /dev/null
+//------------------------------------------------------------------------------ \r
+//\r
+// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+#include <AutoGen.h>\r
+\r
+ INCLUDE AsmMacroIoLib.inc\r
+ \r
+ IMPORT CEntryPoint\r
+ EXPORT _ModuleEntryPoint\r
+ \r
+ PRESERVE8\r
+ AREA ModuleEntryPoint, CODE, READONLY\r
+ \r
+\r
+StartupAddr DCD CEntryPoint\r
+\r
+_ModuleEntryPoint\r
+ \r
+ // Turn off remapping NOR to 0. We can now use DRAM in low memory\r
+ // CAN'T DO THIS HERE -- BRANCH FROM RESET VECTOR IS RELATIVE AND REMAINS IN REMAPPED NOR\r
+ //MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE\r
+\r
+ // Enable NEON register in case folks want to use them for optimizations (CopyMem)\r
+ mrc p15, 0, r0, c1, c0, 2\r
+ orr r0, r0, #0x00f00000 // Enable VFP access (V* instructions)\r
+ mcr p15, 0, r0, c1, c0, 2\r
+ mov r0, #0x40000000 // Set EN bit in FPEXC\r
+ mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly\r
+ \r
+ // Set CPU vectors to 0 (which is currently flash)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base\r
+ mcr p15, 0, r0, c12, c0, 0\r
+ isb // Sync changes to control registers\r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r0) // temp ram base arg 0 TODO: change "stackbase" to "temprambase"\r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r1) // temp ram size arg 1\r
+ lsr r3, r1, #1 // r4 = size of temp mem / 2\r
+ add r3, r3, r0 // r2 = temp ram base + r4\r
+ mov r13, r3 // result: stack pointer = temp ram base + (size of temp mem / 2)\r
+ \r
+ // lr points to area in reset vector block containing PEI core address\r
+ ldr r2, [lr] // pei core arg 3\r
+ \r
+ // move sec startup address into a data register\r
+ // ensure we're jumping to FV version of the code (not boot remapped alias)\r
+ ldr r4, StartupAddr\r
+\r
+ // jump to SEC C code\r
+ blx r4\r
+ \r
+ // Call C entry point\r
+ // THIS DOESN'T WORK, WE NEED A LONG JUMP\r
+ // blx CEntryPoint \r
+\r
+ShouldNeverGetHere\r
+ // _CEntryPoint should never return \r
+ b ShouldNeverGetHere\r
+ \r
+ END\r
+\r
+\r
--- /dev/null
+#------------------------------------------------------------------------------ \r
+#\r
+# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php.\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+ \r
+.text\r
+.align 3\r
+\r
+.globl ASM_PFX(SecSwitchStack)\r
+\r
+\r
+ \r
+#/**\r
+# This allows the caller to switch the stack and return\r
+#\r
+# @param StackDelta Signed amount by which to modify the stack pointer\r
+#\r
+# @return Nothing. Goes to the Entry Point passing in the new parameters\r
+#\r
+#**/\r
+#VOID\r
+#EFIAPI\r
+#SecSwitchStack (\r
+# VOID *StackDelta\r
+# )#\r
+#\r
+ASM_PFX(SecSwitchStack): \r
+ mov R1, R13\r
+ add R1, R0, R1\r
+ mov R13, R1\r
+ bx LR\r
+ \r
+ \r
+ \r
--- /dev/null
+;------------------------------------------------------------------------------ \r
+;\r
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+ \r
+ EXPORT SecSwitchStack\r
+ \r
+ AREA Switch_Stack, CODE, READONLY\r
+ \r
+;/**\r
+; This allows the caller to switch the stack and return\r
+;\r
+; @param StackDelta Signed amount by which to modify the stack pointer\r
+;\r
+; @return Nothing. Goes to the Entry Point passing in the new parameters\r
+;\r
+;**/\r
+;VOID\r
+;EFIAPI\r
+;SecSwitchStack (\r
+; VOID *StackDelta\r
+; );\r
+;\r
+SecSwitchStack \r
+ MOV R1, SP\r
+ ADD R1, R0, R1\r
+ MOV SP, R1\r
+ BX LR\r
+ END\r
--- /dev/null
+/** @file\r
+ C Entry point for the SEC. First C code after the reset vector.\r
+\r
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+ \r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+#include <Ppi/TemporaryRamSupport.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <ArmEb/ArmEb.h>\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+SecTemporaryRamSupport (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
+ IN UINTN CopySize\r
+ );\r
+\r
+VOID\r
+SecSwitchStack (\r
+ INTN StackDelta\r
+ );\r
+\r
+TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};\r
+\r
+EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {\r
+ {\r
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
+ &gEfiTemporaryRamSupportPpiGuid,\r
+ &mSecTemporaryRamSupportPpi\r
+ }\r
+};\r
+\r
+\r
+VOID\r
+EFIAPI \r
+_ModuleEntryPoint(\r
+ VOID\r
+ );\r
+\r
+VOID\r
+CEntryPoint (\r
+ IN UINTN TempRamBase,\r
+ IN UINTN TempRamSize,\r
+ IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r
+ )\r
+{\r
+ EFI_SEC_PEI_HAND_OFF SecCoreData;\r
+\r
+ // Turn off remapping NOR to 0. We can will now see DRAM in low memory (although it is not yet initialized)\r
+ // note: this makes SEC platform-specific for the EB platform\r
+ MmioOr32 (0x10001000 ,BIT8); //EB_SP810_CTRL_BASE\r
+ \r
+ //\r
+ // Bind this information into the SEC hand-off state\r
+ // Note: this must be in sync with the stuff in the asm file\r
+ // Note also: HOBs (pei temp ram) MUST be above stack\r
+ //\r
+ SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);\r
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);\r
+ SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);\r
+ SecCoreData.TemporaryRamBase = (VOID*)(UINTN)TempRamBase; \r
+ SecCoreData.TemporaryRamSize = TempRamSize;\r
+ SecCoreData.PeiTemporaryRamBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase + (SecCoreData.TemporaryRamSize / 2));\r
+ SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;\r
+ SecCoreData.StackBase = (VOID *)(UINTN)(SecCoreData.TemporaryRamBase);\r
+ SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;\r
+ \r
+ // jump to pei core entry point\r
+ (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);\r
+}\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+SecTemporaryRamSupport (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r
+ IN UINTN CopySize\r
+ )\r
+{\r
+ //\r
+ // Migrate the whole temporary memory to permenent memory.\r
+ // \r
+ CopyMem (\r
+ (VOID*)(UINTN)PermanentMemoryBase, \r
+ (VOID*)(UINTN)TemporaryMemoryBase, \r
+ CopySize\r
+ );\r
+\r
+ SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));\r
+\r
+ //\r
+ // We need *not* fix the return address because currently, \r
+ // The PeiCore is excuted in flash.\r
+ //\r
+\r
+ //\r
+ // Simulate to invalid temporary memory, terminate temporary memory\r
+ // \r
+ //ZeroMem ((VOID*)(UINTN)TemporaryMemoryBase, CopySize);\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r
--- /dev/null
+
+#/** @file
+# SEC - Reset vector code that jumps to C and loads DXE core
+#
+# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmRealViewEbSec
+ FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+
+
+
+[Sources.ARM]
+ Sec.c
+ Arm/SwitchStack.asm
+ Arm/SwitchStack.S
+ Arm/ModuleEntryPoint.S
+ Arm/ModuleEntryPoint.asm
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ IoLib
+
+[Ppis]
+ gEfiTemporaryRamSupportPpiGuid
+
+[FeaturePcd]
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
+
+
--- /dev/null
+/** @file
+ Template for Timer Architecture Protocol driver of the ARM flavor
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#include <PiDxe.h>
+
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+
+#include <Protocol/Timer.h>
+#include <Protocol/HardwareInterrupt.h>
+
+#include <ArmEb/ArmEb.h>
+
+
+// The notification function to call on every timer interrupt.
+volatile EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL;
+
+
+// The current period of the timer interrupt
+volatile UINT64 mTimerPeriod = 0;
+
+// Cached copy of the Hardware Interrupt protocol instance
+EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
+
+// Cached interrupt vector
+UINTN gVector;
+
+UINT32 mLastTickCount;
+
+
+/**
+
+ C Interrupt Handler calledin the interrupt context when Source interrupt is active.
+
+
+ @param Source Source of the interrupt. Hardware routing off a specific platform defines
+ what source means.
+
+ @param SystemContext Pointer to system register context. Mostly used by debuggers and will
+ update the system context after the return from the interrupt if
+ modified. Don't change these values unless you know what you are doing
+
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+ IN HARDWARE_INTERRUPT_SOURCE Source,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ )
+{
+ EFI_TPL OriginalTPL;
+
+ //
+ // DXE core uses this callback for the EFI timer tick. The DXE core uses locks
+ // that raise to TPL_HIGH and then restore back to current level. Thus we need
+ // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick.
+ //
+ OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+ // clear the periodic interrupt
+
+ MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_INT_CLR_REG, 0);
+
+ // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers
+ gInterrupt->EndOfInterrupt (gInterrupt, Source);
+
+ if (mTimerNotifyFunction) {
+ mTimerNotifyFunction (mTimerPeriod);
+ }
+
+ gBS->RestoreTPL (OriginalTPL);
+}
+
+
+/**
+ This function registers the handler NotifyFunction so it is called every time
+ the timer interrupt fires. It also passes the amount of time since the last
+ handler call to the NotifyFunction. If NotifyFunction is NULL, then the
+ handler is unregistered. If the handler is registered, then EFI_SUCCESS is
+ returned. If the CPU does not support registering a timer interrupt handler,
+ then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
+ when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to unregister a handler when a handler is not registered,
+ then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
+ register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+ is returned.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param NotifyFunction The function to call when a timer interrupt fires. This
+ function executes at TPL_HIGH_LEVEL. The DXE Core will
+ register a handler for the timer interrupt, so it can know
+ how much time has passed. This information is used to
+ signal timer based events. NULL will unregister the handler.
+ @retval EFI_SUCCESS The timer handler was registered.
+ @retval EFI_UNSUPPORTED The platform does not support timer interrupts.
+ @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
+ registered.
+ @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+ previously registered.
+ @retval EFI_DEVICE_ERROR The timer handler could not be registered.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverRegisterHandler (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_TIMER_NOTIFY NotifyFunction
+ )
+{
+ if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) {
+ return EFI_ALREADY_STARTED;
+ }
+
+ mTimerNotifyFunction = NotifyFunction;
+
+ return EFI_SUCCESS;
+}
+
+/**
+
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+
+ @retval EFI_SUCCESS The timer period was changed.
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverSetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ )
+{
+ EFI_STATUS Status;
+ UINT64 TimerTicks;
+
+
+ // always disable the timer
+ MmioAnd32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE);
+
+ if (TimerPeriod == 0) {
+ // leave timer disabled from above, and...
+
+ // disable timer 0/1 interrupt for a TimerPeriod of 0
+
+
+ Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector);
+ } else {
+ // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10)
+
+ TimerTicks = DivU64x32 (TimerPeriod, 10);
+
+
+
+ // if it's larger than 32-bits, pin to highest value
+
+ if (TimerTicks > 0xffffffff) {
+
+ TimerTicks = 0xffffffff;
+
+ }
+
+
+
+ // Program the SP804 timer with the new count value
+
+ MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_LOAD_REG, TimerTicks);
+
+
+
+ // enable the timer
+
+ MmioOr32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+
+
+
+ // enable timer 0/1 interrupts
+
+ Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector);
+ }
+
+ //
+ // Save the new timer period
+ //
+ mTimerPeriod = TimerPeriod;
+ return Status;
+}
+
+
+/**
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+ @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
+ 0 is returned, then the timer is currently disabled.
+
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGetTimerPeriod (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ )
+{
+ if (TimerPeriod == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ *TimerPeriod = mTimerPeriod;
+ return EFI_SUCCESS;
+}
+
+/**
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
+ interrupt from a software-generated timer interrupt.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The soft timer interrupt was generated.
+ @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts.
+
+**/
+EFI_STATUS
+EFIAPI
+TimerDriverGenerateSoftInterrupt (
+ IN EFI_TIMER_ARCH_PROTOCOL *This
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+
+
+/**
+ Interface stucture for the Timer Architectural Protocol.
+
+ @par Protocol Description:
+ This protocol provides the services to initialize a periodic timer
+ interrupt, and to register a handler that is called each time the timer
+ interrupt fires. It may also provide a service to adjust the rate of the
+ periodic timer interrupt. When a timer interrupt occurs, the handler is
+ passed the amount of time that has passed since the previous timer
+ interrupt.
+
+ @param RegisterHandler
+ Registers a handler that will be called each time the
+ timer interrupt fires. TimerPeriod defines the minimum
+ time between timer interrupts, so TimerPeriod will also
+ be the minimum time between calls to the registered
+ handler.
+
+ @param SetTimerPeriod
+ Sets the period of the timer interrupt in 100 nS units.
+ This function is optional, and may return EFI_UNSUPPORTED.
+ If this function is supported, then the timer period will
+ be rounded up to the nearest supported timer period.
+
+
+ @param GetTimerPeriod
+ Retrieves the period of the timer interrupt in 100 nS units.
+
+ @param GenerateSoftInterrupt
+ Generates a soft timer interrupt that simulates the firing of
+ the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
+ a period of time.
+
+**/
+EFI_TIMER_ARCH_PROTOCOL gTimer = {
+ TimerDriverRegisterHandler,
+ TimerDriverSetTimerPeriod,
+ TimerDriverGetTimerPeriod,
+ TimerDriverGenerateSoftInterrupt
+};
+
+
+/**
+ Initialize the state information for the Timer Architectural Protocol and
+ the Timer Debug support protocol that allows the debugger to break into a
+ running program.
+
+ @param ImageHandle of the loaded driver
+ @param SystemTable Pointer to the System Table
+
+ @retval EFI_SUCCESS Protocol registered
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
+ @retval EFI_DEVICE_ERROR Hardware problems
+
+**/
+EFI_STATUS
+EFIAPI
+TimerInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_HANDLE Handle = NULL;
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol(&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt);\r
+ ASSERT_EFI_ERROR(Status);\r
+
+ // configure free running timer (TIMER1) for 1MHz operation
+
+
+ // AND disable clock, OR configure 1MHz clock
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER1_EN, SP810_SYS_CTRL_TIMER1_TIMCLK);
+
+
+ // Renable timer
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_EN);
+
+
+ // configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled
+ MmioWrite32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
+
+ // enable the free running timer
+ MmioOr32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
+
+ // record free running tick value (should be close to 0xffffffff)
+ mLastTickCount = MmioRead32 (EB_SP804_TIMER1_BASE + SP804_TIMER_CURRENT_REG);
+
+
+ // Disable the timer
+ Status = TimerDriverSetTimerPeriod (&gTimer, 0);
+ ASSERT_EFI_ERROR (Status);
+
+ // Install interrupt handler
+ gVector = EB_TIMER01_INTERRUPT_NUM;
+ Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler);
+ ASSERT_EFI_ERROR (Status);
+
+
+ // configure periodic timer (TIMER0) for 1MHz operation
+ MmioAndThenOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER0_EN, SP810_SYS_CTRL_TIMER0_TIMCLK);
+
+
+ // Renable timer
+ MmioOr32 (EB_SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_EN);
+
+
+ // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled
+ MmioWrite32 (EB_SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE);
+
+ // Set up default timer
+ Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD
+ ASSERT_EFI_ERROR (Status);
+
+ // Install the Timer Architectural Protocol onto a new handle
+ Status = gBS->InstallMultipleProtocolInterfaces(
+ &Handle,
+ &gEfiTimerArchProtocolGuid, &gTimer,
+ NULL
+ );
+ ASSERT_EFI_ERROR(Status);
+
+ return Status;
+}
+
--- /dev/null
+#/** @file
+#
+# Component discription file for Timer module
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ArmEbTimerDxe
+ FILE_GUID = B93B3662-C599-42ad-99E5-CD592431AE97
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = TimerInitialize
+
+[Sources.common]
+ Timer.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmRealViewEbPkg/ArmRealViewEbPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ UefiRuntimeServicesTableLib
+ UefiLib
+ UefiBootServicesTableLib
+ BaseMemoryLib
+ DebugLib
+ UefiDriverEntryPoint
+ IoLib
+
+[Guids]
+
+[Protocols]
+ gEfiTimerArchProtocolGuid
+ gHardwareInterruptProtocolGuid
+
+[Pcd.common]
+ gEmbeddedTokenSpaceGuid.PcdTimerPeriod
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds
+
+
+[Depex]
+ gHardwareInterruptProtocolGuid
\ No newline at end of file
--- /dev/null
+@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
+@REM This program and the accompanying materials\r
+@REM are licensed and made available under the terms and conditions of the BSD License\r
+@REM which accompanies this distribution. The full text of the license may be found at\r
+@REM http://opensource.org/licenses/bsd-license.php\r
+@REM\r
+@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+@REM\r
+\r
+@REM Example usage of this script. default is a DEBUG build\r
+@REM b\r
+@REM b clean\r
+@REM b release \r
+@REM b release clean\r
+@REM b -v -y build.log\r
+\r
+ECHO OFF\r
+@REM Setup Build environment. Sets WORKSPACE and puts build in path\r
+CALL ..\edksetup.bat\r
+\r
+@REM Set for tools chain. Currently RVCT31\r
+SET TARGET_TOOLS=RVCT31\r
+SET TARGET=DEBUG\r
+\r
+@if /I "%1"=="RELEASE" (\r
+ @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it \r
+ SET TARGET=RELEASE\r
+ shift /1\r
+)\r
+\r
+SET BUILD_ROOT=%WORKSPACE%\Build\ArmRealViewEb\%TARGET%_%TARGET_TOOLS%\r
+\r
+@REM Build the ARM RealView EB firmware and creat an FD (FLASH Device) Image.\r
+CALL build -p ArmRealViewEbPkg\ArmRealViewEbPkg.dsc -a ARM -t RVCT31 -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8\r
+@if ERRORLEVEL 1 goto Exit\r
+\r
+@if /I "%1"=="CLEAN" goto Clean\r
+\r
+:Exit\r
+EXIT /B\r
+\r
+:Clean\r
--- /dev/null
+@REM Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
+@REM This program and the accompanying materials
+@REM are licensed and made available under the terms and conditions of the BSD License
+@REM which accompanies this distribution. The full text of the license may be found at
+@REM http://opensource.org/licenses/bsd-license.php
+@REM
+@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+@REM
+
+@REM Example usage of this script. default is a DEBUG build
+@REM b
+@REM b clean
+@REM b release
+@REM b release clean
+@REM b -v -y build.log
+
+ECHO OFF
+@REM Setup Build environment. Sets WORKSPACE and puts build in path
+CALL ..\edksetup.bat
+
+@REM Set for tools chain. Currently ARMGCC
+SET TARGET_TOOLS=ARMGCC
+SET TARGET=DEBUG
+
+
+@if /I "%1"=="RELEASE" (
+
+ @REM If 1st argument is release set TARGET to RELEASE and shift arguments to remove it
+
+ SET TARGET=RELEASE
+
+ shift /1
+
+)
+
+
+SET BUILD_ROOT=%WORKSPACE%\Build\ArmRealViewEb\%TARGET%_%TARGET_TOOLS%
+
+@REM Build the ARM RealView EB firmware and creat an FD (FLASH Device) Image.
+CALL build -p ArmRealViewEbPkg\ArmRealViewEbPkg.dsc -a ARM -t %TARGET_TOOLS% -b %TARGET% %1 %2 %3 %4 %5 %6 %7 %8
+@if ERRORLEVEL 1 goto Exit
+
+@if /I "%1"=="CLEAN" goto Clean
+
+
+ECHO Patching ..\Debugger_scripts ...
+SET DEBUGGER_SCRIPT=Debugger_scripts
+@for /f %%a IN ('dir /b %DEBUGGER_SCRIPT%\*.inc %DEBUGGER_SCRIPT%\*.cmm') do (
+ @CALL replace %DEBUGGER_SCRIPT%\%%a %BUILD_ROOT%\%%a ZZZZZZ %BUILD_ROOT% WWWWWW %WORKSPACE%
+)
+
+:Exit
+EXIT /B
+
+:Clean
--- /dev/null
+#!/bin/bash
+# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+set -e
+shopt -s nocasematch
+
+function process_debug_scripts {
+ if [[ -d $1 ]]; then
+ for filename in `ls $1`
+ do
+ sed -e "s@ZZZZZZ@$BUILD_ROOT@g" -e "s@WWWWWW@$WORKSPACE@g" \
+ "$1/$filename" \
+ > "$BUILD_ROOT/$filename"
+
+ #For ARMCYGWIN, we have to change /cygdrive/c to c:
+ if [[ $TARGET_TOOLS == RVCT31CYGWIN ]]
+ then
+ mv "$BUILD_ROOT/$filename" "$BUILD_ROOT/$filename"_temp
+ sed -e "s@/cygdrive/\(.\)@\1:@g" \
+ "$BUILD_ROOT/$filename"_temp \
+ > "$BUILD_ROOT/$filename"
+ rm -f "$BUILD_ROOT/$filename"_temp
+ fi
+ done
+ fi
+}
+
+
+#
+# Setup workspace if it is not set
+#
+if [ -z "$WORKSPACE" ]
+then
+ echo Initializing workspace
+ cd ..
+ export EDK_TOOLS_PATH=`pwd`/BaseTools
+ source edksetup.sh BaseTools
+else
+ echo Building from: $WORKSPACE
+fi
+
+#
+# Pick a default tool type for a given OS
+#
+case `uname` in
+ CYGWIN*)
+ TARGET_TOOLS=RVCT31CYGWIN
+ ;;
+ Linux*)
+ # Not tested
+ TARGET_TOOLS=ARMGCC
+ ;;
+ Darwin*)
+ Major=$(uname -r | cut -f 1 -d '.')
+ if [[ $Major == 9 ]]
+ then
+ # Not supported by this open source project
+ TARGET_TOOLS=XCODE31
+ else
+ TARGET_TOOLS=XCODE32
+ fi
+ ;;
+esac
+
+TARGET=DEBUG
+for arg in "$@"
+do
+ if [[ $arg == RELEASE ]];
+ then
+ TARGET=RELEASE
+ fi
+done
+
+BUILD_ROOT=$WORKSPACE/Build/ArmRealViewEb/"$TARGET"_"$TARGET_TOOLS"
+
+if [[ ! -e $EDK_TOOLS_PATH/Source/C/bin ]];
+then
+ # build the tools if they don't yet exist
+ echo Building tools: $EDK_TOOLS_PATH
+ make -C $EDK_TOOLS_PATH
+else
+ echo using prebuilt tools
+fi
+
+#
+# Build the edk2 ArmEb code
+#
+if [[ $TARGET == RELEASE ]]; then
+ build -p $WORKSPACE/ArmRealViewEbPkg/ArmRealViewEbPkg.dsc -a ARM -t $TARGET_TOOLS -b $TARGET -D DEBUG_TARGET=RELEASE $2 $3 $4 $5 $6 $7 $8
+else
+ build -p $WORKSPACE/ArmRealViewEbPkg/ArmRealViewEbPkg.dsc -a ARM -t $TARGET_TOOLS -b $TARGET $1 $2 $3 $4 $5 $6 $7 $8
+fi
+
+
+for arg in "$@"
+do
+ if [[ $arg == clean ]]; then
+ # no need to post process if we are doing a clean
+ exit
+ elif [[ $arg == cleanall ]]; then
+ make -C $EDK_TOOLS_PATH clean
+ exit
+
+ fi
+done
+
+
+echo Creating debugger scripts
+process_debug_scripts $WORKSPACE/ArmRealViewEbPkg/Debugger_scripts
+