1. used PciPlatfromProtocolGuid to get VgaIo and IsaIo supported capability.

[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciEnumeratorSupport.c

diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index a75460fa974b1f4aa4b9c0d85ee2d565647d70db..08c785a23be8893ed11b18e0e308a7ac66889dc6 100644 (file)
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -355,7 +355,7 @@ GatherDeviceInfo (
   //\r
   if (gFullEnumeration) {\r
 \r
-    PciDisableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
+    PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
 \r
   }\r
 \r
@@ -418,12 +418,12 @@ GatherPpbInfo (
     );\r
 \r
   if (gFullEnumeration) {\r
-    PciDisableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
+    PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
 \r
     //\r
     // Initalize the bridge control register\r
     //\r
-    PciDisableBridgeControlRegister (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_BITS_OWNED);\r
+    PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_BITS_OWNED);\r
 \r
   }\r
 \r
@@ -537,12 +537,12 @@ GatherP2CInfo (
     );\r
 \r
   if (gFullEnumeration) {\r
-    PciDisableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
+    PCI_DISABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
 \r
     //\r
     // Initalize the bridge control register\r
     //\r
-    PciDisableBridgeControlRegister (PciIoDevice, EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED);\r
+    PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED);\r
 \r
   }\r
   //\r
@@ -684,20 +684,20 @@ PciTestSupportedAttribute (
   //\r
   // Preserve the original value\r
   //\r
-  PciReadCommandRegister (PciIoDevice, OldCommand);\r
+  PCI_READ_COMMAND_REGISTER (PciIoDevice, OldCommand);\r
 \r
   //\r
   // Raise TPL to high level to disable timer interrupt while the BAR is probed\r
   //\r
   OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
 \r
-  PciSetCommandRegister (PciIoDevice, *Command);\r
-  PciReadCommandRegister (PciIoDevice, Command);\r
+  PCI_SET_COMMAND_REGISTER (PciIoDevice, *Command);\r
+  PCI_READ_COMMAND_REGISTER (PciIoDevice, Command);\r
 \r
   //\r
   // Write back the original value\r
   //\r
-  PciSetCommandRegister (PciIoDevice, *OldCommand);\r
+  PCI_SET_COMMAND_REGISTER (PciIoDevice, *OldCommand);\r
 \r
   //\r
   // Restore TPL to its original level\r
@@ -709,20 +709,20 @@ PciTestSupportedAttribute (
     //\r
     // Preserve the original value\r
     //\r
-    PciReadBridgeControlRegister (PciIoDevice, OldBridgeControl);\r
+    PCI_READ_BRIDGE_CONTROL_REGISTER (PciIoDevice, OldBridgeControl);\r
 \r
     //\r
     // Raise TPL to high level to disable timer interrupt while the BAR is probed\r
     //\r
     OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
 \r
-    PciSetBridgeControlRegister (PciIoDevice, *BridgeControl);\r
-    PciReadBridgeControlRegister (PciIoDevice, BridgeControl);\r
+    PCI_SET_BRIDGE_CONTROL_REGISTER (PciIoDevice, *BridgeControl);\r
+    PCI_READ_BRIDGE_CONTROL_REGISTER (PciIoDevice, BridgeControl);\r
 \r
     //\r
     // Write back the original value\r
     //\r
-    PciSetBridgeControlRegister (PciIoDevice, *OldBridgeControl);\r
+    PCI_SET_BRIDGE_CONTROL_REGISTER (PciIoDevice, *OldBridgeControl);\r
 \r
     //\r
     // Restore TPL to its original level\r
@@ -981,7 +981,7 @@ DetermineDeviceAttribute (
     //\r
     // Enable other supported attributes but not defined in PCI_IO_PROTOCOL\r
     //\r
-    PciEnableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE);\r
+    PCI_ENABLE_COMMAND_REGISTER (PciIoDevice, EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE);\r
 \r
     //\r
     // Enable IDE native mode\r
@@ -1057,9 +1057,9 @@ DetermineDeviceAttribute (
 \r
       if (EFI_ERROR (Status) || (!FastB2BSupport)) {\r
         FastB2BSupport = FALSE;\r
-        PciDisableBridgeControlRegister (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK);\r
+        PCI_DISABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK);\r
       } else {\r
-        PciEnableBridgeControlRegister (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK);\r
+        PCI_ENABLE_BRIDGE_CONTROL_REGISTER (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK);\r
       }\r
     }\r
 \r
@@ -1067,9 +1067,9 @@ DetermineDeviceAttribute (
     while (CurrentLink != NULL && CurrentLink != &PciIoDevice->ChildList) {\r
       Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
       if (FastB2BSupport) {\r
-        PciEnableCommandRegister (Temp, EFI_PCI_COMMAND_FAST_BACK_TO_BACK);\r
+        PCI_ENABLE_COMMAND_REGISTER (Temp, EFI_PCI_COMMAND_FAST_BACK_TO_BACK);\r
       } else {\r
-        PciDisableCommandRegister (Temp, EFI_PCI_COMMAND_FAST_BACK_TO_BACK);\r
+        PCI_DISABLE_COMMAND_REGISTER (Temp, EFI_PCI_COMMAND_FAST_BACK_TO_BACK);\r
       }\r
 \r
       CurrentLink = CurrentLink->ForwardLink;\r