\r
**/\r
\r
-#ifndef _EFI_PCI_LIB_H\r
-#define _EFI_PCI_LIB_H\r
+#ifndef _EFI_PCI_LIB_H_\r
+#define _EFI_PCI_LIB_H_\r
\r
//\r
// Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask\r
\r
/**\r
Install protocol gEfiPciHotplugDeviceGuid into hotplug device\r
- instance\r
+ instance.\r
\r
- @param PciIoDevice hotplug device instance\r
+ @param PciIoDevice hotplug device instance.\r
\r
**/\r
VOID\r
\r
/**\r
UnInstall protocol gEfiPciHotplugDeviceGuid into hotplug device\r
- instance\r
+ instance.\r
\r
- @param PciIoDevice hotplug device instance\r
+ @param PciIoDevice hotplug device instance.\r
\r
**/\r
VOID\r
);\r
\r
/**\r
- Retrieve the BAR information via PciIo interface\r
+ Retrieve the BAR information via PciIo interface.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
**/\r
VOID\r
GetBackPcCardBar (\r
Remove rejected pci device from specific root bridge\r
handle.\r
\r
- @param RootBridgeHandle specific parent root bridge handle\r
- @param Bridge Bridge device instance\r
+ @param RootBridgeHandle specific parent root bridge handle.\r
+ @param Bridge Bridge device instance.\r
\r
@retval EFI_SUCCESS Success operation.\r
**/\r
/**\r
Wrapper function for allocating resource for pci host bridge.\r
\r
- @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
**/\r
EFI_STATUS\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
);\r
\r
+/**\r
+ Wrapper function for allocating resource for pci host bridge without hotplug device support.\r
+ \r
+ @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
+ \r
+**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
);\r
\r
+/**\r
+ Wrapper function for allocating resource for pci host bridge with hotplug device support.\r
+ \r
+ @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
+ \r
+**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
\r
/**\r
Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
- Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug \r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
\r
- @param Bridge Bridge device instance\r
- @param StartBusNumber start point\r
- @param SubBusNumber Point to sub bus number\r
- @param PaddedBusRange Customized bus number\r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
\r
- @retval EFI_SUCCESS Success\r
- @retval EFI_DEVICE_ERROR Fail to scan bus\r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus (\r
OUT UINT8 *PaddedBusRange\r
);\r
\r
+/**\r
+ Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
+ \r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
+ \r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
+**/\r
EFI_STATUS\r
PciScanBus_WithHotPlugDeviceSupport (\r
IN PCI_IO_DEVICE *Bridge,\r
OUT UINT8 *PaddedBusRange\r
);\r
\r
+/**\r
+ Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
+ \r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
+ \r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
+**/\r
EFI_STATUS\r
PciScanBus_WithoutHotPlugDeviceSupport (\r
IN PCI_IO_DEVICE *Bridge,\r
);\r
\r
/**\r
- Process Option Rom on this host bridge\r
+ Process Option Rom on this host bridge.\r
\r
- @param Bridge Pci bridge device instance\r
+ @param Bridge Pci bridge device instance.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
-\r
EFI_STATUS\r
PciRootBridgeP2CProcess (\r
IN PCI_IO_DEVICE *Bridge\r
);\r
\r
/**\r
- Process Option Rom on this host bridge\r
+ Process Option Rom on this host bridge.\r
\r
- @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
- @retval EFI_NOT_FOUND Can not find the root bridge instance\r
- @retval EFI_SUCCESS Success process\r
+ @retval EFI_NOT_FOUND Can not find the root bridge instance.\r
+ @retval EFI_SUCCESS Success process.\r
**/\r
EFI_STATUS\r
PciHostBridgeP2CProcess (\r
\r
/**\r
This function is used to enumerate the entire host bridge\r
- in a given platform\r
+ in a given platform.\r
\r
@param PciResAlloc A pointer to the resource allocate protocol.\r
\r
- @retval EFI_OUT_OF_RESOURCES no enough resource\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_OUT_OF_RESOURCES no enough resource.\r
+ @retval EFI_SUCCESS Success.\r
\r
**/\r
-\r
EFI_STATUS\r
PciHostBridgeEnumerator (\r
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
\r
@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
\r
@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be write.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be write.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
EFI_STATUS\r
PciRootBridgeIoRead (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
- IN PCI_TYPE00 *Pci,\r
+ IN PCI_TYPE00 *Pci, OPTIONAL\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
IN UINT64 Address,\r
IN UINTN Count,\r