/** @file\r
Intel FSP API definition from Intel Firmware Support Package External\r
- Architecture Specification v2.0 - v2.2\r
+ Architecture Specification v2.0 and above.\r
\r
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
/// "XXXXXX_T" for FSP-T\r
/// "XXXXXX_M" for FSP-M\r
/// "XXXXXX_S" for FSP-S\r
+ /// "XXXXXX_I" for FSP-I\r
/// Where XXXXXX is an unique signature\r
///\r
UINT64 Signature;\r
///\r
/// Revision of the Data structure.\r
- /// For FSP spec 2.0/2.1 value is 1.\r
- /// For FSP spec 2.2 value is 2.\r
+ /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having ARCH_UPD.\r
+ /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in all UPD structures.\r
///\r
UINT8 Revision;\r
UINT8 Reserved[23];\r
} FSPT_ARCH_UPD;\r
\r
///\r
-/// FSPT_ARCH2_UPD Configuration.\r
+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.\r
///\r
typedef struct {\r
///\r
} FSPM_ARCH_UPD;\r
\r
///\r
-/// FSPM_ARCH2_UPD Configuration.\r
+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.\r
///\r
typedef struct {\r
///\r
///\r
UINT32 Length;\r
///\r
+ /// Pointer to the non-volatile storage (NVS) data buffer.\r
+ /// If it is NULL it indicates the NVS data is not available.\r
+ /// This value is deprecated starting with v2.4 of the FSP specification,\r
+ /// and will be removed in an upcoming version of the FSP specification.\r
+ ///\r
+ EFI_PHYSICAL_ADDRESS NvsBufferPtr;\r
+ ///\r
/// Pointer to the temporary stack base address to be\r
/// consumed inside FspMemoryInit() API.\r
///\r
/// This value is only valid if Revision is >= 2.\r
///\r
EFI_PHYSICAL_ADDRESS FspEventHandler;\r
- UINT8 Reserved1[24];\r
+ UINT8 Reserved1[16];\r
} FSPM_ARCH2_UPD;\r
\r
///\r
} FSPS_ARCH_UPD;\r
\r
///\r
-/// FSPS_ARCH2_UPD Configuration.\r
+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.\r
///\r
typedef struct {\r
///\r
UINT8 Reserved1[16];\r
} FSPS_ARCH2_UPD;\r
\r
+///\r
+/// FSPI_ARCH_UPD Configuration.\r
+///\r
+typedef struct {\r
+ ///\r
+ /// Revision of the structure is 1 for this version of the specification.\r
+ ///\r
+ UINT8 Revision;\r
+ UINT8 Reserved[3];\r
+ ///\r
+ /// Length of the structure in bytes. The current value for this field is 64.\r
+ ///\r
+ UINT32 Length;\r
+ ///\r
+ /// The physical memory-mapped base address of the bootloader SMM firmware volume (FV).\r
+ ///\r
+ EFI_PHYSICAL_ADDRESS BootloaderSmmFvBaseAddress;\r
+ ///\r
+ /// The length in bytes of the bootloader SMM firmware volume (FV).\r
+ ///\r
+ UINT64 BootloaderSmmFvLength;\r
+ ///\r
+ /// The physical memory-mapped base address of the bootloader SMM FV context data.\r
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP MM Foundation.\r
+ ///\r
+ EFI_PHYSICAL_ADDRESS BootloaderSmmFvContextData;\r
+ ///\r
+ /// The length in bytes of the bootloader SMM FV context data.\r
+ /// This data is provided to bootloader SMM drivers through a HOB by the FSP MM Foundation.\r
+ ///\r
+ UINT16 BootloaderSmmFvContextDataLength;\r
+ UINT8 Reserved1[30];\r
+} FSPI_ARCH_UPD;\r
+\r
///\r
/// FSPT_UPD_COMMON Configuration.\r
///\r
FSPS_ARCH2_UPD FspsArchUpd;\r
} FSPS_UPD_COMMON_FSP24;\r
\r
+///\r
+/// FSPI_UPD_COMMON Configuration.\r
+///\r
+typedef struct {\r
+ ///\r
+ /// FSP_UPD_HEADER Configuration.\r
+ ///\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+\r
+ ///\r
+ /// FSPI_ARCH_UPD Configuration.\r
+ ///\r
+ FSPI_ARCH_UPD FspiArchUpd;\r
+} FSPI_UPD_COMMON;\r
+\r
///\r
/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.\r
///\r