IntelFsp2Pkg: Add FSPI_ARCH_UPD.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3993

Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
and some comments for clarification.
Also fixed a bug in SplitFspBin.py for FSP-I support.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/FspEas/FspApi.h
index bf46f13f735b228ef33f8ccdb1c5b04704dbd315..361e916b5fa33736b883a960c4595a94931f83a4 100644 (file)
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -1,6 +1,6 @@
 /** @file\r
   Intel FSP API definition from Intel Firmware Support Package External\r
-  Architecture Specification v2.0 - v2.2\r
+  Architecture Specification v2.0 and above.\r
 \r
   Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
@@ -100,13 +100,14 @@ typedef struct {
   /// "XXXXXX_T" for FSP-T\r
   /// "XXXXXX_M" for FSP-M\r
   /// "XXXXXX_S" for FSP-S\r
+  /// "XXXXXX_I" for FSP-I\r
   /// Where XXXXXX is an unique signature\r
   ///\r
   UINT64    Signature;\r
   ///\r
   /// Revision of the Data structure.\r
-  ///   For FSP spec 2.0/2.1 value is 1.\r
-  ///   For FSP spec 2.2 value is 2.\r
+  ///   For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having ARCH_UPD.\r
+  ///   For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present in all UPD structures.\r
   ///\r
   UINT8     Revision;\r
   UINT8     Reserved[23];\r
@@ -134,7 +135,7 @@ typedef struct {
 } FSPT_ARCH_UPD;\r
 \r
 ///\r
-/// FSPT_ARCH2_UPD Configuration.\r
+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.\r
 ///\r
 typedef struct {\r
   ///\r
@@ -196,7 +197,7 @@ typedef struct {
 } FSPM_ARCH_UPD;\r
 \r
 ///\r
-/// FSPM_ARCH2_UPD Configuration.\r
+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.\r
 ///\r
 typedef struct {\r
   ///\r
@@ -209,6 +210,13 @@ typedef struct {
   ///\r
   UINT32                  Length;\r
   ///\r
+  /// Pointer to the non-volatile storage (NVS) data buffer.\r
+  /// If it is NULL it indicates the NVS data is not available.\r
+  /// This value is deprecated starting with v2.4 of the FSP specification,\r
+  /// and will be removed in an upcoming version of the FSP specification.\r
+  ///\r
+  EFI_PHYSICAL_ADDRESS    NvsBufferPtr;\r
+  ///\r
   /// Pointer to the temporary stack base address to be\r
   /// consumed inside FspMemoryInit() API.\r
   ///\r
@@ -232,7 +240,7 @@ typedef struct {
   /// This value is only valid if Revision is >= 2.\r
   ///\r
   EFI_PHYSICAL_ADDRESS    FspEventHandler;\r
-  UINT8                   Reserved1[24];\r
+  UINT8                   Reserved1[16];\r
 } FSPM_ARCH2_UPD;\r
 \r
 ///\r
@@ -265,7 +273,7 @@ typedef struct {
 } FSPS_ARCH_UPD;\r
 \r
 ///\r
-/// FSPS_ARCH2_UPD Configuration.\r
+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.\r
 ///\r
 typedef struct {\r
   ///\r
@@ -285,6 +293,40 @@ typedef struct {
   UINT8                   Reserved1[16];\r
 } FSPS_ARCH2_UPD;\r
 \r
+///\r
+/// FSPI_ARCH_UPD Configuration.\r
+///\r
+typedef struct {\r
+  ///\r
+  /// Revision of the structure is 1 for this version of the specification.\r
+  ///\r
+  UINT8                   Revision;\r
+  UINT8                   Reserved[3];\r
+  ///\r
+  /// Length of the structure in bytes. The current value for this field is 64.\r
+  ///\r
+  UINT32                  Length;\r
+  ///\r
+  /// The physical memory-mapped base address of the bootloader SMM firmware volume (FV).\r
+  ///\r
+  EFI_PHYSICAL_ADDRESS    BootloaderSmmFvBaseAddress;\r
+  ///\r
+  /// The length in bytes of the bootloader SMM firmware volume (FV).\r
+  ///\r
+  UINT64                  BootloaderSmmFvLength;\r
+  ///\r
+  /// The physical memory-mapped base address of the bootloader SMM FV context data.\r
+  /// This data is provided to bootloader SMM drivers through a HOB by the FSP MM Foundation.\r
+  ///\r
+  EFI_PHYSICAL_ADDRESS    BootloaderSmmFvContextData;\r
+  ///\r
+  /// The length in bytes of the bootloader SMM FV context data.\r
+  /// This data is provided to bootloader SMM drivers through a HOB by the FSP MM Foundation.\r
+  ///\r
+  UINT16                  BootloaderSmmFvContextDataLength;\r
+  UINT8                   Reserved1[30];\r
+} FSPI_ARCH_UPD;\r
+\r
 ///\r
 /// FSPT_UPD_COMMON Configuration.\r
 ///\r
@@ -393,6 +435,21 @@ typedef struct {
   FSPS_ARCH2_UPD    FspsArchUpd;\r
 } FSPS_UPD_COMMON_FSP24;\r
 \r
+///\r
+/// FSPI_UPD_COMMON Configuration.\r
+///\r
+typedef struct {\r
+  ///\r
+  /// FSP_UPD_HEADER Configuration.\r
+  ///\r
+  FSP_UPD_HEADER    FspUpdHeader;\r
+\r
+  ///\r
+  /// FSPI_ARCH_UPD Configuration.\r
+  ///\r
+  FSPI_ARCH_UPD     FspiArchUpd;\r
+} FSPI_UPD_COMMON;\r
+\r
 ///\r
 /// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.\r
 ///\r

diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h
index 697b20ed4ce3febf2d0c581570472f34614d26db..cf94f7b6a549d2710ecbfb61de13366e5d56be5a 100644 (file)
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -12,7 +12,7 @@
 \r
 #define FSP_IN_API_MODE          0\r
 #define FSP_IN_DISPATCH_MODE     1\r
-#define FSP_GLOBAL_DATA_VERSION  1\r
+#define FSP_GLOBAL_DATA_VERSION  0x2\r
 \r
 #pragma pack(1)\r
 \r

diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
index c7fb63168f2df7b783b9e804302940a2e1b480b5..5381716d81bb7bc0be0714c9da3877f2f33d9408 100644 (file)
--- a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
+++ b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
@@ -52,7 +52,7 @@ typedef struct {
   UINT8     Reserved1[2];\r
   ///\r
   /// Byte 0x0A: Indicates compliance with a revision of this specification in the BCD format.\r
-  ///            For revision v2.3 the value will be 0x23.\r
+  ///            For revision v2.4 the value will be 0x24.\r
   ///\r
   UINT8     SpecVersion;\r
   ///\r
@@ -93,11 +93,28 @@ typedef struct {
   ///   Bit 0: Graphics Support - Set to 1 when FSP supports enabling Graphics Display.\r
   ///   Bit 1: Dispatch Mode Support - Set to 1 when FSP supports the optional Dispatch Mode API defined in Section 7.2 and 9. This bit is only valid if FSP HeaderRevision is >= 4.\r
   ///   Bit 2: 64-bit mode support - Set to 1 to indicate FSP supports 64-bit long mode interfaces. Set to 0 to indicate FSP supports 32-bit mode interfaces. This bit is only valid if FSP HeaderRevision is >= 7.\r
-  ///   Bits 15:3 - Reserved\r
+  ///   Bit 3: FSP Variable Services Support - Set to 1 to indicate FSP utilizes the FSP Variable Services defined in Section 9.6 to store non-volatile data. This bit is only valid if FSP HeaderRevision is >= 7.\r
+  ///   Bits 15:4 - Reserved\r
   ///\r
   UINT16    ImageAttribute;\r
   ///\r
   /// Byte 0x22: Attributes of the FSP Component.\r
+  ///   Bit 0 - Build Type\r
+  ///     0 - Debug Build\r
+  ///     1 - Release Build\r
+  ///   Bit 1 - Release Type\r
+  ///     0 - Test Release\r
+  ///     1 - Official Release\r
+  ///   Bit 11:2 - Reserved\r
+  ///   Bits 15:12 - Component Type\r
+  ///     0000 - Reserved\r
+  ///     0001 - FSP-T\r
+  ///     0010 - FSP-M\r
+  ///     0011 - FSP-S\r
+  ///     0100 - FSP-I (FSP SMM)\r
+  ///     0101 to 0111 - Reserved\r
+  ///     1000 - FSP-O\r
+  ///     1001 to 1111 - Reserved\r
   ///\r
   UINT16    ComponentAttribute;\r
   ///\r

diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py b/IntelFsp2Pkg/Tools/SplitFspBin.py
index 317d9c1fa0e4314fe827ceb8fdfa21395c72e529..ddabab7d8cb091e3a37a5d586860f0fea9bf9dc7 100644 (file)
--- a/IntelFsp2Pkg/Tools/SplitFspBin.py
+++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
@@ -492,7 +492,7 @@ class FspImage:
         self.FihOffset = fihoff\r
         self.Offset    = offset\r
         self.FvIdxList = []\r
-        self.Type      = "XTMSIXXXXOXXXXXXX"[(fih.ComponentAttribute >> 12) & 0x0F]\r
+        self.Type      = "XTMSIXXXOXXXXXXX"[(fih.ComponentAttribute >> 12) & 0x0F]\r
         self.PatchList = patch\r
         self.PatchList.append(fihoff + 0x1C)\r
 \r