]> git.proxmox.com Git - mirror_edk2.git/blobdiff - IntelFspPkg/Include/FspInfoHeader.h
Add IntelFspWrapper to support boot EDKII on FSP bin.
[mirror_edk2.git] / IntelFspPkg / Include / FspInfoHeader.h
diff --git a/IntelFspPkg/Include/FspInfoHeader.h b/IntelFspPkg/Include/FspInfoHeader.h
new file mode 100644 (file)
index 0000000..cde7b59
--- /dev/null
@@ -0,0 +1,105 @@
+/** @file\r
+  Intel FSP Info Header definition from Intel Firmware Support Package External\r
+  Architecture Specification, April 2014, revision 001.\r
+\r
+  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php.\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _FSP_INFO_HEADER_H_\r
+#define _FSP_INFO_HEADER_H_\r
+\r
+///\r
+/// Fixed FSP header offset in the FSP image\r
+///\r
+#define  FSP_INFO_HEADER_OFF    0x94\r
+\r
+#define  OFFSET_IN_FSP_INFO_HEADER(x)  (UINT32)&((FSP_INFO_HEADER *)(UINTN)0)->x\r
+\r
+#pragma pack(1)\r
+\r
+typedef struct  {\r
+  ///\r
+  /// Signature ('FSPH') for the FSP Information Header\r
+  ///\r
+  UINT32  Signature;\r
+  ///\r
+  /// Length of the FSP Information Header\r
+  ///\r
+  UINT32  HeaderLength;\r
+  ///\r
+  /// Reserved\r
+  ///\r
+  UINT8   Reserved1[3];\r
+  ///\r
+  /// Revision of the FSP Information Header\r
+  ///\r
+  UINT8   HeaderRevision;\r
+  ///\r
+  /// Revision of the FSP binary\r
+  ///\r
+  UINT32  ImageRevision;\r
+\r
+\r
+  ///\r
+  /// Signature string that will help match the FSP Binary to a supported\r
+  /// hardware configuration.\r
+  ///\r
+  CHAR8   ImageId[8];\r
+  ///\r
+  /// Size of the entire FSP binary\r
+  ///\r
+  UINT32  ImageSize;\r
+  ///\r
+  /// FSP binary preferred base address\r
+  ///\r
+  UINT32  ImageBase;\r
+\r
+\r
+  ///\r
+  /// Attribute for the FSP binary\r
+  ///\r
+  UINT32  ImageAttribute;\r
+  ///\r
+  /// Offset of the FSP configuration region\r
+  ///\r
+  UINT32  CfgRegionOffset;\r
+  ///\r
+  /// Size of the FSP configuration region\r
+  ///\r
+  UINT32  CfgRegionSize;\r
+  ///\r
+  /// Number of API entries this FSP supports\r
+  ///\r
+  UINT32  ApiEntryNum;\r
+\r
+\r
+  ///\r
+  /// TempRamInit API entry offset\r
+  ///\r
+  UINT32  TempRamInitEntryOffset;\r
+  ///\r
+  /// FspInit API entry offset\r
+  ///\r
+  UINT32  FspInitEntryOffset;\r
+  ///\r
+  /// NotifyPhase API entry offset\r
+  ///\r
+  UINT32  NotifyPhaseEntryOffset;\r
+  ///\r
+  /// Reserved\r
+  ///\r
+  UINT32  Reserved2;\r
+\r
+} FSP_INFO_HEADER;\r
+\r
+#pragma pack()\r
+\r
+#endif\r