+ UINT32 PCFT; ///< Offset 0x39E Power Conservation Features\r
+ UINT32 SROT; ///< Offset 0x3A2 Supported Rotation Angles\r
+ UINT32 IUER; ///< Offset 0x3A6 Intel Ultrabook(TM) Event Register\r
+ UINT64 FDSS; ///< Offset 0x3AA DSS Buffer address allocated for IFFS feature\r
+ UINT32 FDSP; ///< Offset 0x3B2 Size of DSS buffer\r
+ UINT32 STAT; ///< Offset 0x3B6 State Indicator\r
+ UINT8 RM31[0x45]; ///< Offset 0x3BA - 0x3FF Reserved Must be zero\r