/** @file\r
Supporting functions implementaion for PCI devices management.\r
\r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
+(C) Copyright 2018 Hewlett Packard Enterprise Development LP<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
FreePool (PciIoDevice->DevicePath);\r
}\r
\r
+ if (PciIoDevice->BusNumberRanges != NULL) {\r
+ FreePool (PciIoDevice->BusNumberRanges);\r
+ }\r
+\r
FreePool (PciIoDevice);\r
}\r
\r
EFI_STATUS Status;\r
VOID *PlatformOpRomBuffer;\r
UINTN PlatformOpRomSize;\r
- UINT8 PciExpressCapRegOffset;\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
UINT8 Data8;\r
BOOLEAN HasEfiImage;\r
return Status;\r
}\r
\r
- //\r
- // Detect if PCI Express Device\r
- //\r
- PciExpressCapRegOffset = 0;\r
- Status = LocateCapabilityRegBlock (\r
- PciIoDevice,\r
- EFI_PCI_CAPABILITY_ID_PCIEXP,\r
- &PciExpressCapRegOffset,\r
- NULL\r
- );\r
- if (!EFI_ERROR (Status)) {\r
- PciIoDevice->IsPciExp = TRUE;\r
- }\r
-\r
//\r
// Force Interrupt line to "Unknown" or "No Connection"\r
//\r
PciIo = &(PciIoDevice->PciIo);\r
Data8 = PCI_INT_LINE_UNKNOWN;\r
PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &Data8);\r
- \r
+\r
//\r
// Process OpRom\r
//\r
);\r
if (!EFI_ERROR (Status)) {\r
PciIoDevice->EmbeddedRom = FALSE;\r
- PciIoDevice->RomSize = PlatformOpRomSize;\r
+ PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;\r
PciIoDevice->PciIo.RomSize = PlatformOpRomSize;\r
PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;\r
//\r
PciIoDevice->BusNumber,\r
PciIoDevice->DeviceNumber,\r
PciIoDevice->FunctionNumber,\r
- (UINT64) (UINTN) PciIoDevice->PciIo.RomImage,\r
+ PciIoDevice->PciIo.RomImage,\r
PciIoDevice->PciIo.RomSize\r
);\r
}\r
);\r
if (!EFI_ERROR (Status)) {\r
PciIoDevice->EmbeddedRom = FALSE;\r
- PciIoDevice->RomSize = PlatformOpRomSize;\r
+ PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;\r
PciIoDevice->PciIo.RomSize = PlatformOpRomSize;\r
PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;\r
//\r
PciIoDevice->BusNumber,\r
PciIoDevice->DeviceNumber,\r
PciIoDevice->FunctionNumber,\r
- (UINT64) (UINTN) PciIoDevice->PciIo.RomImage,\r
+ PciIoDevice->PciIo.RomImage,\r
PciIoDevice->PciIo.RomSize\r
);\r
- } \r
+ }\r
}\r
}\r
\r
0,\r
&Supports\r
);\r
- //\r
- // By default every bridge's IO and MMIO spaces are enabled.\r
- // Bridge's Bus Master will be enabled when any device behind it requests\r
- // to enable Bus Master.\r
- //\r
- Supports &= (UINT64) (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY);\r
+ Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;\r
PciIoDevice->PciIo.Attributes (\r
&(PciIoDevice->PciIo),\r
EfiPciIoAttributeOperationEnable,\r
0,\r
&Supports\r
);\r
- //\r
- // By default every bridge's IO and MMIO spaces are enabled.\r
- // Bridge's Bus Master will be enabled when any device behind it requests\r
- // to enable Bus Master.\r
- //\r
- Supports &= (UINT64) (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY);\r
+ Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;\r
PciIoDevice->PciIo.Attributes (\r
&(PciIoDevice->PciIo),\r
EfiPciIoAttributeOperationEnable,\r
}\r
\r
/**\r
- Get the active VGA device on the same segment.\r
+ Get the active VGA device on the specified Host Bridge.\r
\r
- @param VgaDevice PCI IO instance for the VGA device.\r
+ @param HostBridgeHandle Host Bridge handle.\r
\r
- @return The active VGA device on the same segment.\r
+ @return The active VGA device on the specified Host Bridge.\r
\r
**/\r
PCI_IO_DEVICE *\r
-ActiveVGADeviceOnTheSameSegment (\r
- IN PCI_IO_DEVICE *VgaDevice\r
+LocateVgaDeviceOnHostBridge (\r
+ IN EFI_HANDLE HostBridgeHandle\r
)\r
{\r
LIST_ENTRY *CurrentLink;\r
- PCI_IO_DEVICE *Temp;\r
+ PCI_IO_DEVICE *PciIoDevice;\r
\r
CurrentLink = mPciDevicePool.ForwardLink;\r
\r
while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {\r
\r
- Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
+ PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
\r
- if (Temp->PciRootBridgeIo->SegmentNumber == VgaDevice->PciRootBridgeIo->SegmentNumber) {\r
+ if (PciIoDevice->PciRootBridgeIo->ParentHandle== HostBridgeHandle) {\r
\r
- Temp = ActiveVGADeviceOnTheRootBridge (Temp);\r
+ PciIoDevice = LocateVgaDevice (PciIoDevice);\r
\r
- if (Temp != NULL) {\r
- return Temp;\r
+ if (PciIoDevice != NULL) {\r
+ return PciIoDevice;\r
}\r
}\r
\r
}\r
\r
/**\r
- Get the active VGA device on the root bridge.\r
+ Locate the active VGA device under the bridge.\r
\r
- @param RootBridge PCI IO instance for the root bridge.\r
+ @param Bridge PCI IO instance for the bridge.\r
\r
@return The active VGA device.\r
\r
**/\r
PCI_IO_DEVICE *\r
-ActiveVGADeviceOnTheRootBridge (\r
- IN PCI_IO_DEVICE *RootBridge\r
+LocateVgaDevice (\r
+ IN PCI_IO_DEVICE *Bridge\r
)\r
{\r
LIST_ENTRY *CurrentLink;\r
- PCI_IO_DEVICE *Temp;\r
+ PCI_IO_DEVICE *PciIoDevice;\r
\r
- CurrentLink = RootBridge->ChildList.ForwardLink;\r
+ CurrentLink = Bridge->ChildList.ForwardLink;\r
\r
- while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {\r
+ while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {\r
\r
- Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
+ PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
\r
- if (IS_PCI_VGA(&Temp->Pci) &&\r
- (Temp->Attributes &\r
+ if (IS_PCI_VGA(&PciIoDevice->Pci) &&\r
+ (PciIoDevice->Attributes &\r
(EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY |\r
EFI_PCI_IO_ATTRIBUTE_VGA_IO |\r
EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) != 0) {\r
- return Temp;\r
+ return PciIoDevice;\r
}\r
\r
- if (IS_PCI_BRIDGE (&Temp->Pci)) {\r
+ if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {\r
\r
- Temp = ActiveVGADeviceOnTheRootBridge (Temp);\r
+ PciIoDevice = LocateVgaDevice (PciIoDevice);\r
\r
- if (Temp != NULL) {\r
- return Temp;\r
+ if (PciIoDevice != NULL) {\r
+ return PciIoDevice;\r
}\r
}\r
\r
return NULL;\r
}\r
\r
-\r
-/**\r
- Get HPC PCI address according to its device path.\r
-\r
- @param RootBridge Root bridege Io instance.\r
- @param RemainingDevicePath Given searching device path.\r
- @param PciAddress Buffer holding searched result.\r
-\r
- @retval EFI_SUCCESS PCI address was stored in PciAddress\r
- @retval EFI_NOT_FOUND Can not find the specific device path.\r
-\r
-**/\r
-EFI_STATUS\r
-GetHpcPciAddressFromRootBridge (\r
- IN PCI_IO_DEVICE *RootBridge,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,\r
- OUT UINT64 *PciAddress\r
- )\r
-{\r
- EFI_DEV_PATH_PTR Node;\r
- PCI_IO_DEVICE *Temp;\r
- EFI_DEVICE_PATH_PROTOCOL *CurrentDevicePath;\r
- LIST_ENTRY *CurrentLink;\r
- BOOLEAN MisMatch;\r
-\r
- MisMatch = FALSE;\r
-\r
- CurrentDevicePath = RemainingDevicePath;\r
- Node.DevPath = CurrentDevicePath;\r
- Temp = NULL;\r
-\r
- while (!IsDevicePathEnd (CurrentDevicePath)) {\r
-\r
- CurrentLink = RootBridge->ChildList.ForwardLink;\r
- Node.DevPath = CurrentDevicePath;\r
-\r
- while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {\r
- Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
-\r
- if (Node.Pci->Device == Temp->DeviceNumber &&\r
- Node.Pci->Function == Temp->FunctionNumber) {\r
- RootBridge = Temp;\r
- break;\r
- }\r
-\r
- CurrentLink = CurrentLink->ForwardLink;\r
- }\r
-\r
- //\r
- // Check if we find the bridge\r
- //\r
- if (CurrentLink == &RootBridge->ChildList) {\r
-\r
- MisMatch = TRUE;\r
- break;\r
-\r
- }\r
-\r
- CurrentDevicePath = NextDevicePathNode (CurrentDevicePath);\r
- }\r
-\r
- if (MisMatch) {\r
-\r
- CurrentDevicePath = NextDevicePathNode (CurrentDevicePath);\r
-\r
- if (IsDevicePathEnd (CurrentDevicePath)) {\r
- *PciAddress = EFI_PCI_ADDRESS (RootBridge->BusNumber, Node.Pci->Device, Node.Pci->Function, 0);\r
- return EFI_SUCCESS;\r
- }\r
-\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- if (Temp != NULL) {\r
- *PciAddress = EFI_PCI_ADDRESS (Temp->BusNumber, Temp->DeviceNumber, Temp->FunctionNumber, 0);\r
- } else {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- return EFI_SUCCESS;\r
-\r
-}\r
-\r
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