/** @file\r
Internal library implementation for PCI Bus module.\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
//\r
\r
//\r
- // If non-stardard PCI Bridge I/O window alignment is supported,\r
+ // If non-standard PCI Bridge I/O window alignment is supported,\r
// set I/O aligment to minimum possible alignment for root bridge.\r
//\r
IoBridge = CreateResourceNode (\r
Resources[2] = PMem32Bridge;\r
Resources[3] = Mem64Bridge;\r
Resources[4] = PMem64Bridge;\r
- DumpResourceMap (RootBridgeDev, Resources, sizeof (Resources) / sizeof (Resources[0]));\r
+ DumpResourceMap (RootBridgeDev, Resources, ARRAY_SIZE (Resources));\r
);\r
\r
FreePool (AcpiConfig);\r
UINT64 PciAddress;\r
EFI_HPC_PADDING_ATTRIBUTES Attributes;\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *NextDescriptors;\r
UINT16 BusRange;\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r
BOOLEAN BusPadding;\r
}\r
\r
BusRange = 0;\r
+ NextDescriptors = Descriptors;\r
Status = PciGetBusRange (\r
- &Descriptors,\r
+ &NextDescriptors,\r
NULL,\r
NULL,\r
&BusRange\r
\r
FreePool (Descriptors);\r
\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
+ switch (Status) {\r
+ case EFI_SUCCESS:\r
+ BusPadding = TRUE;\r
+ break;\r
\r
- BusPadding = TRUE;\r
+ case EFI_NOT_FOUND:\r
+ //\r
+ // no bus number padding requested\r
+ //\r
+ break;\r
+\r
+ default:\r
+ return Status;\r
+ }\r
}\r
}\r
}\r