MdeModulePkg/PciBus: Correct typos

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / PciBusDxe / PciOptionRomSupport.c

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
index d390bb655a3986caec145226043a57bd4d4deb44..c75ef1a82505c003c663cee2147fd3fa82015d4c 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
@@ -1,7 +1,7 @@
 /** @file\r
   PCI Rom supporting funtions implementation for PCI Bus module.\r
 \r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -342,7 +342,7 @@ ContainEfiImage (
     }\r
 \r
     //\r
-    // The PCI Data Structure must be DWORD aligned. \r
+    // The PCI Data Structure must be DWORD aligned.\r
     //\r
     if (RomHeader->PcirOffset == 0 ||\r
         (RomHeader->PcirOffset & 3) != 0 ||\r
@@ -471,8 +471,8 @@ LoadOpRomImage (
     FirstCheck  = FALSE;\r
     OffsetPcir  = RomHeader->PcirOffset;\r
     //\r
-    // If the pointer to the PCI Data Structure is invalid, no further images can be located. \r
-    // The PCI Data Structure must be DWORD aligned. \r
+    // If the pointer to the PCI Data Structure is invalid, no further images can be located.\r
+    // The PCI Data Structure must be DWORD aligned.\r
     //\r
     if (OffsetPcir == 0 ||\r
         (OffsetPcir & 3) != 0 ||\r
@@ -583,23 +583,10 @@ RomDecode (
   )\r
 {\r
   UINT32              Value32;\r
-  UINT32              Offset;\r
-  UINT32              OffsetMax;\r
   EFI_PCI_IO_PROTOCOL *PciIo;\r
 \r
   PciIo = &PciDevice->PciIo;\r
   if (Enable) {\r
-    //\r
-    // Clear all bars\r
-    //\r
-    OffsetMax = 0x24;\r
-    if (IS_PCI_BRIDGE(&PciDevice->Pci)) {\r
-      OffsetMax = 0x14;\r
-    }\r
-\r
-    for (Offset = 0x10; Offset <= OffsetMax; Offset += sizeof (UINT32)) {\r
-      PciIo->Pci.Write (PciIo, EfiPciIoWidthUint32, Offset, 1, &gAllZero);\r
-    }\r
 \r
     //\r
     // set the Rom base address: now is hardcode\r
@@ -617,7 +604,7 @@ RomDecode (
     //\r
     // Programe all upstream bridge\r
     //\r
-    ProgrameUpstreamBridgeForRom(PciDevice, RomBar, TRUE);\r
+    ProgramUpstreamBridgeForRom (PciDevice, RomBar, TRUE);\r
 \r
     //\r
     // Setting the memory space bit in the function's command register\r
@@ -634,7 +621,7 @@ RomDecode (
     //\r
     // Destroy the programmed bar in all the upstream bridge.\r
     //\r
-    ProgrameUpstreamBridgeForRom(PciDevice, RomBar, FALSE);\r
+    ProgramUpstreamBridgeForRom (PciDevice, RomBar, FALSE);\r
 \r
     //\r
     // disable rom decode\r