\r
Provides some data structure definitions used by the SD/MMC host controller driver.\r
\r
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.\r
+Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Protocol/DriverBinding.h>\r
#include <Protocol/ComponentName.h>\r
#include <Protocol/ComponentName2.h>\r
+#include <Protocol/SdMmcOverride.h>\r
#include <Protocol/SdMmcPassThru.h>\r
\r
#include "SdMmcPciHci.h"\r
extern EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2;\r
extern EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding;\r
\r
+extern EDKII_SD_MMC_OVERRIDE *mOverride;\r
+\r
#define SD_MMC_HC_PRIVATE_SIGNATURE SIGNATURE_32 ('s', 'd', 't', 'f')\r
\r
#define SD_MMC_HC_PRIVATE_FROM_THIS(a) \\r
} EFI_SD_MMC_SLOT_TYPE;\r
\r
typedef struct {\r
- BOOLEAN Enable;\r
- EFI_SD_MMC_SLOT_TYPE SlotType;\r
- BOOLEAN MediaPresent;\r
- SD_MMC_CARD_TYPE CardType;\r
+ BOOLEAN Enable;\r
+ EFI_SD_MMC_SLOT_TYPE SlotType;\r
+ BOOLEAN MediaPresent;\r
+ BOOLEAN Initialized;\r
+ SD_MMC_CARD_TYPE CardType;\r
+ UINT64 CurrentFreq;\r
+ EDKII_SD_MMC_OPERATING_PARAMETERS OperatingParameters;\r
} SD_MMC_HC_SLOT;\r
\r
typedef struct {\r
SD_MMC_HC_SLOT Slot[SD_MMC_HC_MAX_SLOT];\r
SD_MMC_HC_SLOT_CAP Capability[SD_MMC_HC_MAX_SLOT];\r
UINT64 MaxCurrent[SD_MMC_HC_MAX_SLOT];\r
+ UINT16 ControllerVersion[SD_MMC_HC_MAX_SLOT];\r
\r
- UINT32 ControllerVersion;\r
+ //\r
+ // Some controllers may require to override base clock frequency\r
+ // value stored in Capabilities Register 1.\r
+ //\r
+ UINT32 BaseClkFreq[SD_MMC_HC_MAX_SLOT];\r
} SD_MMC_HC_PRIVATE_DATA;\r
\r
+typedef struct {\r
+ SD_MMC_BUS_MODE BusTiming;\r
+ UINT8 BusWidth;\r
+ UINT32 ClockFreq;\r
+ EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;\r
+} SD_MMC_BUS_SETTINGS;\r
+\r
#define SD_MMC_HC_TRB_SIG SIGNATURE_32 ('T', 'R', 'B', 'T')\r
\r
+#define SD_MMC_TRB_RETRIES 5\r
+\r
//\r
// TRB (Transfer Request Block) contains information for the cmd request.\r
//\r
EFI_PHYSICAL_ADDRESS DataPhy;\r
VOID *DataMap;\r
SD_MMC_HC_TRANSFER_MODE Mode;\r
+ SD_MMC_HC_ADMA_LENGTH_MODE AdmaLengthMode;\r
\r
EFI_EVENT Event;\r
BOOLEAN Started;\r
+ BOOLEAN CommandComplete;\r
UINT64 Timeout;\r
+ UINT32 Retries;\r
+\r
+ BOOLEAN PioModeTransferCompleted;\r
+ UINT32 PioBlockIndex;\r
\r
- SD_MMC_HC_ADMA_DESC_LINE *AdmaDesc;\r
+ SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;\r
+ SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc;\r
+ SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc;\r
EFI_PHYSICAL_ADDRESS AdmaDescPhy;\r
VOID *AdmaMap;\r
UINT32 AdmaPages;\r
IN UINT8 Slot\r
);\r
\r
+/**\r
+ SD/MMC card clock supply.\r
+\r
+ Refer to SD Host Controller Simplified spec 3.0 Section 3.2.1 for details.\r
+\r
+ @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.\r
+ @param[in] Slot The slot number of the SD card to send the command to.\r
+ @param[in] BusTiming BusTiming at which the frequency change is done.\r
+ @param[in] FirstTimeSetup Flag to indicate whether the clock is being setup for the first time.\r
+ @param[in] ClockFreq The max clock frequency to be set. The unit is KHz.\r
+\r
+ @retval EFI_SUCCESS The clock is supplied successfully.\r
+ @retval Others The clock isn't supplied successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+SdMmcHcClockSupply (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot,\r
+ IN SD_MMC_BUS_MODE BusTiming,\r
+ IN BOOLEAN FirstTimeSetup,\r
+ IN UINT64 ClockFreq\r
+ );\r
+\r
+/**\r
+ Software reset the specified SD/MMC host controller.\r
+\r
+ @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.\r
+ @param[in] Slot The slot number of the SD card to send the command to.\r
+\r
+ @retval EFI_SUCCESS The software reset executes successfully.\r
+ @retval Others The software reset fails.\r
+\r
+**/\r
+EFI_STATUS\r
+SdMmcHcReset (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot\r
+ );\r
+\r
+/**\r
+ Initial SD/MMC host controller with lowest clock frequency, max power and max timeout value\r
+ at initialization.\r
+\r
+ @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.\r
+ @param[in] Slot The slot number of the SD card to send the command to.\r
+\r
+ @retval EFI_SUCCESS The host controller is initialized successfully.\r
+ @retval Others The host controller isn't initialized successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+SdMmcHcInitHost (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot\r
+ );\r
+\r
#endif\r
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