--- /dev/null
+/** @file\r
+ EFI MM Control PPI definition.\r
+\r
+ This PPI is used initiate synchronous MMI activations. This PPI could be published by a processor\r
+ driver to abstract the MMI IPI or a driver which abstracts the ASIC that is supporting the APM port.\r
+ Because of the possibility of performing MMI IPI transactions, the ability to generate this event\r
+ from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.\r
+\r
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+ @par Revision Reference:\r
+ This PPI is introduced in PI Version 1.5.\r
+\r
+**/\r
+\r
+\r
+#ifndef _MM_CONTROL_PPI_H_\r
+#define _MM_CONTROL_PPI_H_\r
+\r
+#define EFI_PEI_MM_CONTROL_PPI_GUID \\r
+ { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }\r
+\r
+typedef struct _EFI_PEI_MM_CONTROL_PPI EFI_PEI_MM_CONTROL_PPI;\r
+\r
+/**\r
+ Invokes PPI activation from the PI PEI environment.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This The PEI_MM_CONTROL_PPI instance.\r
+ @param ArgumentBuffer The value passed to the MMI handler. This value corresponds to the\r
+ SwMmiInputValue in the RegisterContext parameter for the Register()\r
+ function in the EFI_MM_SW_DISPATCH_PROTOCOL and in the Context parameter\r
+ in the call to the DispatchFunction\r
+ @param ArgumentBufferSize The size of the data passed in ArgumentBuffer or NULL if ArgumentBuffer is NULL.\r
+ @param Periodic An optional mechanism to periodically repeat activation.\r
+ @param ActivationInterval An optional parameter to repeat at this period one\r
+ time or, if the Periodic Boolean is set, periodically.\r
+\r
+ @retval EFI_SUCCESS The MMI has been engendered.\r
+ @retval EFI_DEVICE_ERROR The timing is unsupported.\r
+ @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
+ @retval EFI_NOT_STARTED The MM base service has not been initialized.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_PEI_MM_ACTIVATE) (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_MM_CONTROL_PPI * This,\r
+ IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
+ IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
+ IN BOOLEAN Periodic OPTIONAL,\r
+ IN UINTN ActivationInterval OPTIONAL\r
+ );\r
+\r
+/**\r
+ Clears any system state that was created in response to the Trigger() call.\r
+\r
+ @param PeiServices General purpose services available to every PEIM.\r
+ @param This The PEI_MM_CONTROL_PPI instance.\r
+ @param Periodic Optional parameter to repeat at this period one\r
+ time or, if the Periodic Boolean is set, periodically.\r
+\r
+ @retval EFI_SUCCESS The MMI has been engendered.\r
+ @retval EFI_DEVICE_ERROR The source could not be cleared.\r
+ @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *PEI_MM_DEACTIVATE) (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_MM_CONTROL_PPI * This,\r
+ IN BOOLEAN Periodic OPTIONAL\r
+ );\r
+\r
+///\r
+/// The EFI_PEI_MM_CONTROL_PPI is produced by a PEIM. It provides an abstraction of the\r
+/// platform hardware that generates an MMI. There are often I/O ports that, when accessed, will\r
+/// generate the MMI. Also, the hardware optionally supports the periodic generation of these signals.\r
+///\r
+struct _PEI_MM_CONTROL_PPI {\r
+ PEI_MM_ACTIVATE Trigger;\r
+ PEI_MM_DEACTIVATE Clear;\r
+};\r
+\r
+extern EFI_GUID gEfiPeiMmControlPpiGuid;\r
+\r
+#endif\r
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