;------------------------------------------------------------------------------\r
;\r
-; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
; Abstract:\r
;\r
;------------------------------------------------------------------------------\r
\r
-%macro SAVEPREVSSP 0\r
- DB 0xF3, 0x0F, 0x01, 0xEA\r
-%endmacro\r
-\r
-%macro CLRSSBSY_RAX 0\r
- DB 0xF3, 0x0F, 0xAE, 0x30\r
-%endmacro\r
-\r
-%macro RSTORSSP_RAX 0\r
- DB 0xF3, 0x0F, 0x01, 0x28\r
-%endmacro\r
-\r
-%macro SETSSBSY 0\r
- DB 0xF3, 0x0F, 0x01, 0xE8\r
-%endmacro\r
-\r
-%macro READSSP_RAX 0\r
- DB 0xF3, 0x48, 0x0F, 0x1E, 0xC8\r
-%endmacro\r
-\r
-%macro INCSSP_RAX 0\r
- DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8\r
-%endmacro\r
-\r
;\r
; Macro for the PVALIDATE instruction, defined in AMD APM volume 3.\r
; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392753\r