MdePkg/BaseLib: BaseLib for RISCV64 architecture

[mirror_edk2.git] / MdePkg / Library / BaseLib / BaseLib.inf

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 3586beb0ab5c53646f2edcd05d751d33526d1ebc..a57ae2da31f3f6ae54ef2da31751e785a793e119 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -4,6 +4,7 @@
 #  Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 #  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -20,7 +21,7 @@
   LIBRARY_CLASS                  = BaseLib\r
 \r
 #\r
-#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64\r
 #\r
 \r
 [Sources]\r
@@ -381,6 +382,21 @@
   AArch64/CpuBreakpoint.asm         | MSFT\r
   AArch64/SpeculationBarrier.asm    | MSFT\r
 \r
+[Sources.RISCV64]\r
+  Math64.c\r
+  Unaligned.c\r
+  RiscV64/InternalSwitchStack.c\r
+  RiscV64/CpuBreakpoint.c\r
+  RiscV64/GetInterruptState.c\r
+  RiscV64/DisableInterrupts.c\r
+  RiscV64/EnableInterrupts.c\r
+  RiscV64/CpuPause.c\r
+  RiscV64/RiscVSetJumpLongJump.S    | GCC\r
+  RiscV64/RiscVCpuBreakpoint.S      | GCC\r
+  RiscV64/RiscVCpuPause.S           | GCC\r
+  RiscV64/RiscVInterrupt.S          | GCC\r
+  RiscV64/FlushCache.S              | GCC\r
+\r
 [Packages]\r
   MdePkg/MdePkg.dec\r
 \r