MdePkg BaseLib Ia32 assembly: Specify DWORD sizes

[mirror_edk2.git] / MdePkg / Library / BaseLib / BaseLib.inf

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 6d03f941fda23e2d1a377fee95f72d6797ff4365..e83a569bb9ca4ef582488dd9397dd9a814c1fb21 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -1,7 +1,7 @@
 ## @file\r
 #  Base Library implementation.\r
 #\r
-#  Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 #  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
 #\r
@@ -21,7 +21,7 @@
   MODULE_UNI_FILE                = BaseLib.uni\r
   FILE_GUID                      = 27d67720-ea68-48ae-93da-a3a074c90e30\r
   MODULE_TYPE                    = BASE\r
-  VERSION_STRING                 = 1.0\r
+  VERSION_STRING                 = 1.1\r
   LIBRARY_CLASS                  = BaseLib \r
 \r
 #\r
@@ -63,6 +63,7 @@
   LinkedList.c\r
   SafeString.c\r
   String.c\r
+  FilePaths.c\r
   BaseLibInternals.h\r
 \r
 [Sources.Ia32]\r
@@ -158,6 +159,7 @@
   Ia32/EnablePaging64.asm | MSFT\r
   Ia32/EnableCache.c | MSFT\r
   Ia32/DisableCache.c | MSFT\r
+  Ia32/RdRand.asm | MSFT\r
 \r
   Ia32/Wbinvd.asm | INTEL \r
   Ia32/WriteMm7.asm | INTEL \r
@@ -251,9 +253,11 @@
   Ia32/EnablePaging64.asm | INTEL\r
   Ia32/EnableCache.asm | INTEL\r
   Ia32/DisableCache.asm | INTEL\r
+  Ia32/RdRand.asm | INTEL\r
 \r
   Ia32/GccInline.c | GCC\r
   Ia32/Thunk16.nasm | GCC \r
+  Ia32/Thunk16.S | XCODE \r
   Ia32/EnableDisableInterrupts.S | GCC \r
   Ia32/EnablePaging64.S | GCC \r
   Ia32/DisablePaging32.S | GCC \r
@@ -278,6 +282,7 @@
   Ia32/LShiftU64.S | GCC \r
   Ia32/EnableCache.S | GCC\r
   Ia32/DisableCache.S | GCC\r
+  Ia32/RdRand.S | GCC\r
 \r
   Ia32/DivS64x64Remainder.c\r
   Ia32/InternalSwitchStack.c | MSFT\r
@@ -382,10 +387,12 @@
   X64/CpuBreakpoint.c | MSFT \r
   X64/WriteMsr64.c | MSFT \r
   X64/ReadMsr64.c | MSFT \r
+  X64/RdRand.asm | MSFT\r
 \r
   X64/CpuBreakpoint.asm | INTEL \r
   X64/WriteMsr64.asm | INTEL \r
   X64/ReadMsr64.asm | INTEL \r
+  X64/RdRand.asm | INTEL\r
 \r
   X64/Non-existing.c\r
   Math64.c\r
@@ -407,6 +414,7 @@
   X86DisablePaging32.c\r
   X64/GccInline.c | GCC\r
   X64/Thunk16.nasm | GCC \r
+  X64/Thunk16.S | XCODE \r
   X64/SwitchStack.S | GCC \r
   X64/SetJump.S | GCC \r
   X64/LongJump.S | GCC \r
@@ -416,6 +424,7 @@
   X64/CpuIdEx.S | GCC \r
   X64/EnableCache.S | GCC\r
   X64/DisableCache.S | GCC\r
+  X64/RdRand.S | GCC\r
   ChkStkGcc.c  | GCC \r
 \r
 [Sources.IPF]\r