1. Port X64, IPF and EBC arch for BaseLib

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / CpuIdEx.S

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
index 2d7ec493cfef6e1c8fd21c371a938c16852d10ff..48554cc96bb7f672ace3c87859dd8e101011533c 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
@@ -1,72 +1,67 @@
-//\r
-// Include common header file for this module.\r
-//\r
-#include "CommonHeader.h"\r
-\r
-#------------------------------------------------------------------------------\r
-#\r
-# Copyright (c) 2006, Intel Corporation\r
-# All rights reserved. This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution.  The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-# Module Name:\r
-#\r
-#   CpuIdEx.Asm\r
-#\r
-# Abstract:\r
-#\r
-#   AsmCpuidEx function\r
-#\r
-# Notes:\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-    .686:\r
-    .code:\r
-\r
-#------------------------------------------------------------------------------\r
-#  UINT32\r
-#  EFIAPI\r
-#  AsmCpuidEx (\r
-#    IN   UINT32  RegisterInEax,\r
-#    IN   UINT32  RegisterInEcx,\r
-#    OUT  UINT32  *RegisterOutEax  OPTIONAL,\r
-#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,\r
-#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,\r
-#    OUT  UINT32  *RegisterOutEdx  OPTIONAL\r
-#    )\r
-#------------------------------------------------------------------------------\r
-.globl ASM_PFX(AsmCpuidEx)\r
-ASM_PFX(AsmCpuidEx):\r
-    push    %ebx\r
-    push    %ebp\r
-    movl    %esp, %ebp\r
-    movl    12(%ebp), %eax\r
-    movl    16(%ebp), %ecx\r
-    cpuid\r
-    push    %ecx\r
-    movl    20(%ebp), %ecx\r
-    jecxz   L1\r
-    movl    %eax, (%ecx)\r
-L1:\r
-    movl    24(%ebp), %ecx\r
-    jecxz   L2\r
-    movl    %ebx, (%ecx)\r
-L2:\r
-    movl    28(%ebp), %ecx\r
-    jecxz   L3\r
-    popl    (%ecx)\r
-L3:\r
-    movl    32(%ebp), %edx\r
-    jecxz   L4\r
-    movl    %edx, (%ecx)\r
-L4:\r
-    movl    12(%ebp), %eax\r
-    leave\r
-    pop     %ebx\r
-    ret\r
+#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution.  The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+#   CpuIdEx.Asm
+#
+# Abstract:
+#
+#   AsmCpuidEx function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+    .686:
+    .code:
+
+#------------------------------------------------------------------------------
+#  UINT32
+#  EFIAPI
+#  AsmCpuidEx (
+#    IN   UINT32  RegisterInEax,
+#    IN   UINT32  RegisterInEcx,
+#    OUT  UINT32  *RegisterOutEax  OPTIONAL,
+#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,
+#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,
+#    OUT  UINT32  *RegisterOutEdx  OPTIONAL
+#    )
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmCpuidEx)
+ASM_PFX(AsmCpuidEx):
+    push    %ebx
+    push    %ebp
+    movl    %esp, %ebp
+    movl    12(%ebp), %eax
+    movl    16(%ebp), %ecx
+    cpuid
+    push    %ecx
+    movl    20(%ebp), %ecx
+    jecxz   L1
+    movl    %eax, (%ecx)
+L1:
+    movl    24(%ebp), %ecx
+    jecxz   L2
+    movl    %ebx, (%ecx)
+L2:
+    movl    28(%ebp), %ecx
+    jecxz   L3
+    popl    (%ecx)
+L3:
+    movl    32(%ebp), %edx
+    jecxz   L4
+    movl    %edx, (%ecx)
+L4:
+    movl    12(%ebp), %eax
+    leave
+    pop     %ebx
+    ret