Add EnableCache() and DisableCache() implementations for IA32 and X64 to the BaseLib

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / EnableCache.asm

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.asm b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm
new file mode 100644 (file)
index 0000000..e25a5bf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   EnableCache.Asm\r
+;\r
+; Abstract:\r
+;\r
+;  Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear \r
+;  the NW bit of CR0 to 0\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmEnableCache (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmEnableCache PROC\r
+    wbinvd\r
+    mov     eax, cr0\r
+    btr     eax, 29\r
+    btr     eax, 30\r
+    mov     cr0, eax\r
+    ret\r
+AsmEnableCache ENDP\r
+\r
+    END\r