MdePkg/BaseLib: Support IA32 processors without CLFLUSH

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / EnablePaging64.S

diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
index 61525b840311729c583fc493caff933d25f939fd..08950ce0e2b7155c9e47825546bfb5a9595d2f54 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
@@ -1,17 +1,17 @@
 #------------------------------------------------------------------------------\r
 #\r
-# Copyright (c) 2006, Intel Corporation\r
-# All rights reserved. This program and the accompanying materials\r
+# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
 # which accompanies this distribution.  The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
+# http://opensource.org/licenses/bsd-license.php.\r
 #\r
 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 #\r
 # Module Name:\r
 #\r
-#   EnablePaging64.Asm\r
+#   EnablePaging64.S\r
 #\r
 # Abstract:\r
 #\r
@@ -21,7 +21,7 @@
 #\r
 #------------------------------------------------------------------------------\r
 \r
-.global _InternalX86EnablePaging64\r
+ASM_GLOBAL ASM_PFX(InternalX86EnablePaging64)\r
 \r
 #------------------------------------------------------------------------------\r
 # VOID\r
@@ -34,9 +34,9 @@
 #   IN      UINT64                    NewStack\r
 #   );\r
 #------------------------------------------------------------------------------\r
-_InternalX86EnablePaging64:\r
+ASM_PFX(InternalX86EnablePaging64):\r
     cli\r
-    movl    $LongStart, (%esp)\r
+    movl    $LongStart, (%esp)          # offset for far retf, seg is the 1st arg\r
     movl    %cr4, %eax\r
     orb     $0x20, %al\r
     movl    %eax, %cr4                  # enable PAE\r
@@ -45,11 +45,11 @@ _InternalX86EnablePaging64:
     orb     $1, %ah                     # set LME\r
     wrmsr\r
     movl    %cr0, %eax\r
-    btsl    $31, %eax\r
+    btsl    $31, %eax                   # set PG\r
     movl    %eax, %cr0                  # enable paging\r
-    lret\r
+    lret                                # topmost 2 dwords hold the address\r
 LongStart:                              # long mode starts here\r
-    .byte   0x67, 0x48\r
+    .byte   0x67, 0x48                  # 32-bit address size, 64-bit operand size\r
     movl    (%esp), %ebx                # mov rbx, [esp]\r
     .byte   0x67, 0x48\r
     movl    8(%esp), %ecx               # mov rcx, [esp + 8]\r
@@ -58,6 +58,6 @@ LongStart:                              # long mode starts here
     .byte   0x67, 0x48\r
     movl    0x18(%esp), %esp            # mov rsp, [esp + 18h]\r
     .byte   0x48\r
-    addl    $0x-20, %esp                # add rsp, -20h\r
+    addl    $-0x20, %esp                # add rsp, -20h\r
     call    *%ebx                       # call rbx\r
-    jmp     .\r
+    jmp     .                           # no one should get here\r