#------------------------------------------------------------------------------\r
#\r
-# Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
.set IA32_REGS_SIZE, 52\r
\r
.text\r
+ .code16\r
\r
ASM_PFX(m16Start):\r
\r
ASM_PFX(BackFromUserCode):\r
push %ss\r
push %cs\r
- .byte 0x66\r
- call L_Base1 # push eip\r
+\r
+ calll L_Base1 # push eip\r
L_Base1:\r
- pushfw # pushfd actually\r
+ pushfl\r
cli # disable interrupts\r
push %gs\r
push %fs\r
push %es\r
push %ds\r
- pushaw # pushad actually\r
+ pushal\r
.byte 0x66, 0xba # mov edx, imm32\r
ASM_PFX(ThunkAttr): .space 4\r
testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
jz 1f\r
- movl $0x15cd2401, %eax # mov ax, 2401h & int 15h\r
+ movw $0x2401, %ax\r
+ int $0x15\r
cli # disable interrupts\r
jnc 2f\r
1:\r
orb $2, %al\r
outb %al, $0x92 # deactivate A20M#\r
2:\r
- xorw %ax, %ax # xor eax, eax\r
- movl %ss, %eax # mov ax, ss\r
- .byte 0x67\r
- lea IA32_REGS_SIZE(%esp), %bp\r
- .byte 0x66\r
- mov %ebp, (_ESP - IA32_REGS_SIZE)(%esi)\r
- mov (_EIP - IA32_REGS_SIZE)(%esi), %ebx\r
- shlw $4, %ax # shl eax, 4\r
- addw %ax, %bp # add ebp, eax\r
- .byte 0x66, 0xb8 # mov eax, imm32\r
+ xorl %eax, %eax\r
+ movw %ss, %ax\r
+ leal IA32_REGS_SIZE(%esp), %ebp\r
+ mov %ebp, (_ESP - IA32_REGS_SIZE)(%bp)\r
+ mov (_EIP - IA32_REGS_SIZE)(%bp), %bx\r
+ shll $4, %eax\r
+ addl %eax, %ebp\r
+ .byte 0x66, 0xb8 # mov eax, imm32\r
SavedCr4: .space 4\r
movl %eax, %cr4\r
- lgdtw %cs:(SavedGdt - L_Base1)(%edi)\r
- .byte 0x66, 0xb8 # mov eax, imm32\r
+ lgdtl %cs:(SavedGdt - L_Base1)(%bx)\r
+ .byte 0x66, 0xb8 # mov eax, imm32\r
SavedCr0: .space 4\r
movl %eax, %cr0\r
.byte 0xb8 # mov ax, imm16\r
SavedSs: .space 2\r
movl %eax, %ss\r
- .byte 0x66, 0xbc # mov esp, imm32\r
+ .byte 0x66, 0xbc # mov esp, imm32\r
SavedEsp: .space 4\r
- .byte 0x66\r
- lret # return to protected mode\r
+ lretl # return to protected mode\r
\r
_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)\r
.word 0x8\r
_16GdtrBase: .long _NullSegDesc\r
\r
ASM_PFX(ToUserCode):\r
- movl %ss, %edx\r
- movl %ecx, %ss # set new segment selectors\r
- movl %ecx, %ds\r
- movl %ecx, %es\r
- movl %ecx, %fs\r
- movl %ecx, %gs\r
- movl %eax, %cr0\r
- movl %ebp, %cr4 # real mode starts at next instruction\r
- movl %esi, %ss # set up 16-bit stack segment\r
- xchgw %bx, %sp # set up 16-bit stack pointer\r
- .byte 0x66\r
- call L_Base # push eip\r
-L_Base:\r
- popw %bp # ebp <- offset L_Base\r
- .byte 0x67; # address size override\r
- push (IA32_REGS_SIZE + 2)(%esp)\r
- lea (L_RealMode - L_Base)(%esi), %eax\r
- push %eax\r
- lret\r
+ movw %ss, %dx\r
+ movw %cx, %ss # set new segment selectors\r
+ movw %cx, %ds\r
+ movw %cx, %es\r
+ movw %cx, %fs\r
+ movw %cx, %gs\r
+ movl %eax, %cr0 # real mode starts at next instruction\r
+ # which (per SDM) *must* be a far JMP.\r
+ ljmpw $0,$0 # will be filled in by InternalAsmThunk16\r
+L_Base: # to point here.\r
+ movl %ebp, %cr4\r
+ movw %si, %ss # set up 16-bit stack segment\r
+ xchgl %ebx, %esp # set up 16-bit stack pointer\r
\r
-L_RealMode:\r
- mov %edx, %cs:(SavedSs - L_Base)(%esi)\r
- mov %bx, %cs:(SavedEsp - L_Base)(%esi)\r
- lidtw %cs:(_16Idtr - L_Base)(%esi)\r
- popaw # popad actually\r
+ movw IA32_REGS_SIZE(%esp), %bp # get BackToUserCode address from stack\r
+ mov %dx, %cs:(SavedSs - ASM_PFX(BackFromUserCode))(%bp)\r
+ mov %ebx, %cs:(SavedEsp - ASM_PFX(BackFromUserCode))(%bp)\r
+ lidtl %cs:(_16Idtr - ASM_PFX(BackFromUserCode))(%bp)\r
+ popal\r
pop %ds\r
pop %es\r
pop %fs\r
pop %gs\r
- popfw # popfd\r
- lretw # transfer control to user code\r
+ popfl\r
+ lretl # transfer control to user code\r
\r
_NullSegDesc: .quad 0\r
_16CsDesc:\r
.byte 0\r
GdtEnd:\r
\r
+ .code32\r
#\r
# @param RegSet The pointer to a IA32_DWORD_REGS structure\r
# @param Transition The pointer to the transition code\r
lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx\r
movw %cx, %ax\r
stosl # [edi] <- return address of user code\r
+ addl $(L_Base - ASM_PFX(BackFromUserCode)), %eax\r
+ movl %eax, (L_Base - SavedCr0 - 4)(%edx)\r
sgdtl (SavedGdt - SavedCr0)(%edx)\r
sidtl 0x24(%esp)\r
movl %cr0, %eax\r
andl $0x7ffffffe, %eax # clear PE, PG bits\r
movl %cr4, %ebp\r
mov %ebp, (SavedCr4 - SavedCr0)(%edx)\r
- andl $0x300, %ebp # clear all but PCE and OSFXSR bits\r
+ andl $0xffffffcf, %ebp # clear PAE, PSE bits\r
pushl $0x10\r
pop %ecx # ecx <- selector for data segments\r
lgdtl (_16Gdtr - SavedCr0)(%edx)\r
projects / mirror_edk2.git / blobdiff