MdePkg/BaseLib: Support IA32 processors without CLFLUSH

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / Thunk16.S

diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.S b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
index 331ea1634e9fd7c14a7197815e612fc60738ed3b..185655eecbe9b676fb0de694b9b72d426b5a7b2c 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/Thunk16.S
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
@@ -113,22 +113,18 @@ ASM_PFX(ToUserCode):
     movw    %cx, %es\r
     movw    %cx, %fs\r
     movw    %cx, %gs\r
-    movl    %eax, %cr0\r
-    movl    %ebp, %cr4                  # real mode starts at next instruction\r
+    movl    %eax, %cr0                  # real mode starts at next instruction\r
+                                        #  which (per SDM) *must* be a far JMP.\r
+    ljmpw   $0,$0                       # will be filled in by InternalAsmThunk16\r
+L_Base:                                 #  to point here.\r
+    movl    %ebp, %cr4\r
     movw    %si, %ss                    # set up 16-bit stack segment\r
     xchgl   %ebx, %esp                  # set up 16-bit stack pointer\r
-    calll   L_Base                      # push eip\r
-L_Base:\r
-    popl    %ebp                        # ebp <- offset L_Base\r
-    push    (IA32_REGS_SIZE + 2)(%esp)\r
-    lea (L_RealMode - L_Base)(%bp), %ax\r
-    push    %ax\r
-    lret\r
 \r
-L_RealMode:\r
-    mov     %dx, %cs:(SavedSs - L_Base)(%bp)\r
-    mov     %ebx, %cs:(SavedEsp - L_Base)(%bp)\r
-    lidtl   %cs:(_16Idtr - L_Base)(%bp)\r
+    movw    IA32_REGS_SIZE(%esp), %bp   # get BackToUserCode address from stack\r
+    mov     %dx, %cs:(SavedSs - ASM_PFX(BackFromUserCode))(%bp)\r
+    mov     %ebx, %cs:(SavedEsp - ASM_PFX(BackFromUserCode))(%bp)\r
+    lidtl   %cs:(_16Idtr - ASM_PFX(BackFromUserCode))(%bp)\r
     popal\r
     pop     %ds\r
     pop     %es\r
@@ -189,6 +185,8 @@ ASM_PFX(InternalAsmThunk16):
     lea     (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx\r
     movw    %cx, %ax\r
     stosl                               # [edi] <- return address of user code\r
+    addl    $(L_Base - ASM_PFX(BackFromUserCode)), %eax\r
+    movl    %eax, (L_Base - SavedCr0 - 4)(%edx)\r
     sgdtl   (SavedGdt - SavedCr0)(%edx)\r
     sidtl   0x24(%esp)\r
     movl    %cr0, %eax\r