+++ /dev/null
-/// @file\r
-/// Contains an implementation of CallPalProcStacked on Itanium-based\r
-/// architecture.\r
-///\r
-/// Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>\r
-/// This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php.\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-///\r
-/// Module Name: AsmCpuMisc.s\r
-///\r
-///\r
-\r
-\r
-.text\r
-.proc CpuBreakpoint\r
-.type CpuBreakpoint, @function\r
-\r
-CpuBreakpoint::\r
- break.i 0;;\r
- br.ret.dpnt b0;;\r
-\r
-.endp CpuBreakpoint\r
-\r
-.proc MemoryFence\r
-.type MemoryFence, @function\r
-\r
-MemoryFence::\r
- mf;; // memory access ordering\r
-\r
- // do we need the mf.a also here?\r
- mf.a // wait for any IO to complete?\r
- \r
- // not sure if we need serialization here, just put it, in case...\r
- \r
- srlz.d;;\r
- srlz.i;;\r
- \r
- br.ret.dpnt b0;;\r
-.endp MemoryFence\r
-\r
-.proc DisableInterrupts\r
-.type DisableInterrupts, @function\r
-\r
-DisableInterrupts::\r
- rsm 0x4000\r
- srlz.d;;\r
- br.ret.dpnt b0;;\r
-\r
-.endp DisableInterrupts\r
-\r
-.proc EnableInterrupts\r
-.type EnableInterrupts, @function\r
-\r
-EnableInterrupts::\r
- ssm 0x4000\r
- srlz.d;;\r
- br.ret.dpnt b0;;\r
-\r
-.endp EnableInterrupts\r
-\r
-.proc EnableDisableInterrupts\r
-.type EnableDisableInterrupts, @function\r
-\r
-EnableDisableInterrupts::\r
- ssm 0x4000\r
- srlz.d;;\r
- srlz.i;;\r
- rsm 0x4000\r
- srlz.d;;\r
-\r
- br.ret.dpnt b0;;\r
-\r
-.endp EnableDisableInterrupts\r
-\r