}\r
\r
/**\r
- Register a PCI device so PCI configuration registers may be accessed after \r
+ Registers a PCI device so PCI configuration registers may be accessed after \r
SetVirtualAddressMap().\r
\r
+ Registers the PCI device specified by Address so all the PCI configuration registers \r
+ associated with that PCI device may be accessed after SetVirtualAddressMap() is called.\r
+ \r
If Address > 0x0FFFFFFF, then ASSERT().\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
\r
- @return The value read from the PCI configuration register.\r
+ @return The read value from the PCI configuration register.\r
\r
**/\r
UINT8\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Data The value to write.\r
+ @param Value The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
EFIAPI\r
PciWrite8 (\r
IN UINTN Address,\r
- IN UINT8 Data\r
+ IN UINT8 Value\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
\r
- return (UINT8) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Data);\r
+ return (UINT8) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);\r
}\r
\r
/**\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
\r
- @return The value read from the PCI configuration register.\r
+ @return The read value from the PCI configuration register.\r
\r
**/\r
UINT16\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Data The value to write.\r
+ @param Value The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
EFIAPI\r
PciWrite16 (\r
IN UINTN Address,\r
- IN UINT16 Data\r
+ IN UINT16 Value\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
\r
- return (UINT16) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Data);\r
+ return (UINT16) DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);\r
}\r
\r
/**\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
\r
- @return The value read from the PCI configuration register.\r
+ @return The read value from the PCI configuration register.\r
\r
**/\r
UINT32\r
\r
@param Address Address that encodes the PCI Bus, Device, Function and\r
Register.\r
- @param Data The value to write.\r
+ @param Value The value to write.\r
\r
@return The value written to the PCI configuration register.\r
\r
EFIAPI\r
PciWrite32 (\r
IN UINTN Address,\r
- IN UINT32 Data\r
+ IN UINT32 Value\r
)\r
{\r
ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
\r
- return DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint32, Data);\r
+ return DxePciLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint32, Value);\r
}\r
\r
/**\r
@param Size Size in bytes of the transfer.\r
@param Buffer Pointer to a buffer containing the data to write.\r
\r
- @return Size\r
+ @return Size written to StartAddress.\r
\r
**/\r
UINTN\r