#define DMA4_CSDP_BURST_EN32 (0x2 << 14)\r
#define DMA4_CSDP_BURST_EN64 (0x3 << 14)\r
\r
-#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16) \r
+#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)\r
#define DMA4_CSDP_WRITE_MODE_POSTED (0x1 << 16)\r
-#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16) \r
+#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)\r
\r
#define DMA4_CSDP_DST_ENDIAN_LOCK_LOCK BIT18\r
#define DMA4_CSDP_DST_ENDIAN_LOCK_ADAPT 0\r
#define DMA4_CSDP_SRC_ENDIAN_BIG BIT21\r
#define DMA4_CSDP_SRC_ENDIAN_LITTLE 0\r
\r
-// Channel Control \r
+// Channel Control\r
#define DMA4_CCR_SYNCHRO_CONTROL_MASK 0x1f\r
\r
#define DMA4_CCR_FS_ELEMENT (0 | 0)\r
\r
#define DMA4_CCR_CONST_FILL_ENABLE BIT16\r
#define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17\r
- \r
+\r
#define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE BIT24\r
\r
#define DMA4_CSR_DROP BIT1\r
#define DMA4_CICR_ENABLE_ALL 0x1FBE\r
\r
\r
-#endif \r
+#endif\r
\r