SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
-#include <IndustryStandard/Pci.h> // PCI_MAX_BUS\r
-#include <IndustryStandard/Q35MchIch9.h> // INTEL_Q35_MCH_DEVIC...\r
-#include <Library/BaseMemoryLib.h> // ZeroMem()\r
-#include <Library/PcdLib.h> // PcdGet64()\r
-#include <Library/PciHostBridgeLib.h> // PCI_ROOT_BRIDGE_APE...\r
+#include <Library/PciHostBridgeLib.h> // PCI_ROOT_BRIDGE\r
#include <Library/PciHostBridgeUtilityLib.h> // PciHostBridgeUtilit...\r
-#include <Protocol/PciHostBridgeResourceAllocation.h> // EFI_PCI_HOST_BRIDGE...\r
-#include <Protocol/PciRootBridgeIo.h> // EFI_PCI_ATTRIBUTE_I...\r
\r
#include "PciHostBridge.h"\r
\r
-STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };\r
-\r
-\r
/**\r
Return all the root bridge instances in an array.\r
\r
UINTN *Count\r
)\r
{\r
- UINT64 Attributes;\r
- UINT64 AllocationAttributes;\r
- PCI_ROOT_BRIDGE_APERTURE Io;\r
- PCI_ROOT_BRIDGE_APERTURE Mem;\r
- PCI_ROOT_BRIDGE_APERTURE MemAbove4G;\r
-\r
- if (PcdGetBool (PcdPciDisableBusEnumeration)) {\r
- return ScanForRootBridges (Count);\r
- }\r
-\r
- ZeroMem (&Io, sizeof (Io));\r
- ZeroMem (&Mem, sizeof (Mem));\r
- ZeroMem (&MemAbove4G, sizeof (MemAbove4G));\r
-\r
- Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |\r
- EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |\r
- EFI_PCI_ATTRIBUTE_ISA_IO_16 |\r
- EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |\r
- EFI_PCI_ATTRIBUTE_VGA_MEMORY |\r
- EFI_PCI_ATTRIBUTE_VGA_IO_16 |\r
- EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
-\r
- AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;\r
- if (PcdGet64 (PcdPciMmio64Size) > 0) {\r
- AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;\r
- MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);\r
- MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +\r
- PcdGet64 (PcdPciMmio64Size) - 1;\r
- } else {\r
- CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));\r
- }\r
-\r
- Io.Base = PcdGet64 (PcdPciIoBase);\r
- Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);\r
- Mem.Base = PcdGet64 (PcdPciMmio32Base);\r
- Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);\r
-\r
- return PciHostBridgeUtilityGetRootBridges (\r
- Count,\r
- Attributes,\r
- AllocationAttributes,\r
- FALSE,\r
- PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,\r
- 0,\r
- PCI_MAX_BUS,\r
- &Io,\r
- &Mem,\r
- &MemAbove4G,\r
- &mNonExistAperture,\r
- &mNonExistAperture\r
- );\r
+ return ScanForRootBridges (Count);\r
}\r
\r
\r