OvmfPkg: make PcdQ35TsegMbytes dynamic

[mirror_edk2.git] / OvmfPkg / OvmfPkg.dec

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index d4ee152b16de06119c4cd9b8157642f497e21ea1..c46b72f069efe7c8d827fb3e82e1b6e0841b467a 100644 (file)
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -35,6 +35,10 @@
   #\r
   QemuFwCfgLib|Include/Library/QemuFwCfgLib.h\r
 \r
+  ##  @libraryclass  S3 support for QEMU fw_cfg\r
+  #\r
+  QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h\r
+\r
   ##  @libraryclass  Rewrite the BootOrder NvVar based on QEMU's "bootorder"\r
   #                  fw_cfg file.\r
   #\r
@@ -75,10 +79,6 @@
   ## This flag is used to control the destination port for PlatformDebugLibIoPort\r
   gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4\r
 \r
-  ## This flag determines the Power Management Base Address of choice, written\r
-  #  to PIIX4 function 3 offset 0x40-0x43 bits [15:6].\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdAcpiPmBaseAddress|0xB000|UINT16|5\r
-\r
   ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and\r
   #  LUNs are retrieved from the host during virtio-scsi setup.\r
   #  MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun\r
@@ -90,13 +90,6 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6\r
   gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7\r
 \r
-  ## The following setting controls how many megabytes we configure as TSEG on\r
-  #  Q35, for SMRAM purposes. Permitted values are: 1, 2, 8. Other values cause\r
-  #  undefined behavior.\r
-  #\r
-  #  This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below).\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT8|0x20\r
-\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa\r
@@ -109,30 +102,40 @@
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase|0x0|UINT32|0x17\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19\r
   gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f\r
 \r
-  ## The IO port aperture shared by all PCI root bridges.\r
-  #\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0xC000|UINT64|0x22\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x4000|UINT64|0x23\r
-\r
 [PcdsDynamic, PcdsDynamicEx]\r
   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b\r
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21\r
 \r
+  ## The IO port aperture shared by all PCI root bridges.\r
+  #\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23\r
+\r
   ## The 32-bit MMIO aperture shared by all PCI root bridges.\r
   #\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25\r
 \r
+  ## The 64-bit MMIO aperture shared by all PCI root bridges.\r
+  #\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27\r
+\r
+  ## The following setting controls how many megabytes we configure as TSEG on\r
+  #  Q35, for SMRAM purposes. Permitted values are: 1, 2, 8. Other values cause\r
+  #  undefined behavior.\r
+  #\r
+  #  This PCD is only consulted if PcdSmmSmramRequire is TRUE (see below).\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20\r
+\r
 [PcdsFeatureFlag]\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdSecureBootEnable|FALSE|BOOLEAN|3\r
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c\r
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d\r
 \r