OvmfPkg/AmdSevDxe: sort #includes, and entries in INF file sections

[mirror_edk2.git] / OvmfPkg / PlatformPei / Platform.h

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index 0829f89d3b6fc61837043d6bbf6ea8cda59cfaf7..f942e61bb4f90ab16bbc18420ca97f582e1b5fea 100644 (file)
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -1,7 +1,7 @@
 /** @file\r
   Platform PEI module include file.\r
 \r
-  Copyright (c) 2006 - 2007, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -15,6 +15,8 @@
 #ifndef _PLATFORM_PEI_H_INCLUDED_\r
 #define _PLATFORM_PEI_H_INCLUDED_\r
 \r
+#include <IndustryStandard/E820.h>\r
+\r
 VOID\r
 AddIoMemoryBaseSizeHob (\r
   EFI_PHYSICAL_ADDRESS        MemoryBase,\r
@@ -39,8 +41,35 @@ AddMemoryRangeHob (
   EFI_PHYSICAL_ADDRESS        MemoryLimit\r
   );\r
 \r
-EFI_PHYSICAL_ADDRESS\r
-MemDetect (\r
+VOID\r
+AddReservedMemoryBaseSizeHob (\r
+  EFI_PHYSICAL_ADDRESS        MemoryBase,\r
+  UINT64                      MemorySize,\r
+  BOOLEAN                     Cacheable\r
+  );\r
+\r
+VOID\r
+AddressWidthInitialization (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+Q35TsegMbytesInitialization (\r
+  VOID\r
+  );\r
+\r
+EFI_STATUS\r
+PublishPeiMemory (\r
+  VOID\r
+  );\r
+\r
+UINT32\r
+GetSystemMemorySizeBelow4gb (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+InitializeRamRegions (\r
   VOID\r
   );\r
 \r
@@ -49,4 +78,41 @@ PeiFvInitialization (
   VOID\r
   );\r
 \r
+VOID\r
+InstallFeatureControlCallback (\r
+  VOID\r
+  );\r
+\r
+EFI_STATUS\r
+InitializeXen (\r
+  VOID\r
+  );\r
+\r
+BOOLEAN\r
+XenDetect (\r
+  VOID\r
+  );\r
+\r
+VOID\r
+AmdSevInitialize (\r
+  VOID\r
+  );\r
+\r
+extern BOOLEAN mXen;\r
+\r
+VOID\r
+XenPublishRamRegions (\r
+  VOID\r
+  );\r
+\r
+extern EFI_BOOT_MODE mBootMode;\r
+\r
+extern BOOLEAN mS3Supported;\r
+\r
+extern UINT8 mPhysMemAddressWidth;\r
+\r
+extern UINT32 mMaxCpuCount;\r
+\r
+extern UINT16 mHostBridgeDevId;\r
+\r
 #endif // _PLATFORM_PEI_H_INCLUDED_\r