OvmfPkg/QemuVideoDxe: list "Qemu.h" in the INF file

[mirror_edk2.git] / PcAtChipsetPkg / PcAtChipsetPkg.dec

diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipsetPkg.dec
index cbd57070fb7be08e8a38c109dbb65f27067e459e..f11d2045a43014cd195fd9e3dcdb79d37c45cece 100644 (file)
--- a/PcAtChipsetPkg/PcAtChipsetPkg.dec
+++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec
@@ -5,6 +5,7 @@
 # PcAt defacto standard.\r
 #\r
 # Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>\r
 #\r
 # This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
@@ -173,5 +174,25 @@
   # @Prompt ACPI IO Port Base Address Mask\r
   gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask     |0xFFFE|UINT16|0x00000018\r
 \r
+  ## Reset Control Register address in I/O space.\r
+  # @Prompt Reset Control Register address\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlRegister|0x64|UINT64|0x00000019\r
+\r
+  ## 8bit Reset Control Register value for cold reset.\r
+  # @Prompt Reset Control Register value for cold reset\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlValueColdReset|0xFE|UINT8|0x0000001A\r
+\r
+  ## Specifies the initial value for Register_A in RTC.\r
+  # @Prompt Initial value for Register_A in RTC.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8|0x0000001B\r
+\r
+  ## Specifies the initial value for Register_B in RTC.\r
+  # @Prompt Initial value for Register_B in RTC.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8|0x0000001C\r
+\r
+  ## Specifies the initial value for Register_D in RTC.\r
+  # @Prompt Initial value for Register_D in RTC.\r
+  gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0000001D\r
+\r
 [UserExtensions.TianoCore."ExtraFiles"]\r
   PcAtChipsetPkgExtra.uni\r