QuarkPlatformPkg/PlatformInit: Clear memory based on TCG MOR request

[mirror_edk2.git] / QuarkPlatformPkg / Platform / Pei / PlatformInit / MemoryCallback.c

diff --git a/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c b/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c
index 728e2b1f6b69f5f66bf7d766be5bd04f11199ebc..d5fb94195d4011e0b4803a3b08495f49237bc1c2 100644 (file)
--- a/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c
+++ b/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c
@@ -7,7 +7,7 @@ following action is performed in this file,
   4. Set MTRR for PEI\r
   5. Create FV HOB and Flash HOB\r
 \r
   4. Set MTRR for PEI\r
   5. Create FV HOB and Flash HOB\r
 \r

-Copyright (c) 2013 Intel Corporation.\r
+Copyright (c) 2013 - 2016, Intel Corporation.\r

 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r


@@ -108,6 +108,9 @@ MemoryDiscoveredPpiNotifyCallback (
   UINT8                                 CpuAddressWidth;\r
   UINT32                                RegEax;\r
   MTRR_SETTINGS                         MtrrSettings;\r
   UINT8                                 CpuAddressWidth;\r
   UINT32                                RegEax;\r
   MTRR_SETTINGS                         MtrrSettings;\r

+  EFI_PEI_READ_ONLY_VARIABLE2_PPI       *VariableServices;\r
+  UINT8                                 MorControl;\r
+  UINTN                                 DataSize;\r

 \r
   DEBUG ((EFI_D_INFO, "Platform PEIM Memory Callback\n"));\r
 \r
 \r
   DEBUG ((EFI_D_INFO, "Platform PEIM Memory Callback\n"));\r
 \r


@@ -151,6 +154,52 @@ MemoryDiscoveredPpiNotifyCallback (
 \r
   PERF_END (NULL, "SetCache", NULL, 0);\r
 \r
 \r
   PERF_END (NULL, "SetCache", NULL, 0);\r
 \r

+  //\r
+  // Get necessary PPI\r
+  //\r
+  Status = PeiServicesLocatePpi (\r
+             &gEfiPeiReadOnlyVariable2PpiGuid,           // GUID\r
+             0,                                          // INSTANCE\r
+             NULL,                                       // EFI_PEI_PPI_DESCRIPTOR\r
+             (VOID **)&VariableServices                  // PPI\r
+             );\r
+  ASSERT_EFI_ERROR (Status);\r
+\r
+  //\r
+  // Detect MOR request by the OS.\r
+  //\r
+  MorControl = 0;\r
+  DataSize = sizeof (MorControl);\r
+  Status = VariableServices->GetVariable (\r
+                               VariableServices,\r
+                               MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME,\r
+                               &gEfiMemoryOverwriteControlDataGuid,\r
+                               NULL,\r
+                               &DataSize,\r
+                               &MorControl\r
+                               );\r
+  //\r
+  // If OS requested a memory overwrite perform it now for Embedded SRAM\r
+  //\r
+  if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {\r
+    DEBUG ((EFI_D_INFO, "Clear Embedded SRAM per MOR request.\n"));\r
+    if (PcdGet32 (PcdESramMemorySize) > 0) {\r
+      if (PcdGet32 (PcdEsramStage1Base) == 0) {\r
+        //\r
+        // ZeroMem() generates an ASSERT() if Buffer parameter is NULL.\r
+        // Clear byte at 0 and start clear operation at address 1.\r
+        //\r
+        *(UINT8 *)(0) = 0;\r
+        ZeroMem ((VOID *)1, (UINTN)PcdGet32 (PcdESramMemorySize) - 1);\r
+      } else {\r
+        ZeroMem (\r
+          (VOID *)(UINTN)PcdGet32 (PcdEsramStage1Base),\r
+          (UINTN)PcdGet32 (PcdESramMemorySize)\r
+          );\r
+      }\r
+    }\r
+  }\r
+\r

   //\r
   // Install PeiReset for PeiResetSystem service\r
   //\r
   //\r
   // Install PeiReset for PeiResetSystem service\r
   //\r