QuarkPlatformPkg/PlatformInit: Clear memory based on TCG MOR request

If TCG Memory Overwrite Request is set, then clear all memory
available for use by an OS.  An OS may optionally use embedded
SRAM in Quark SoC X1000, so the embedded SRAM should is cleared
too.  TCG MOR requests are communicated through a UEFI variable.
This module reads UEFI variable to check state of MOR request.

Cc: Kelly Steele <kelly.steele@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Kelly Steele <kelly.steele@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19776 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c b/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c
index 728e2b1f6b69f5f66bf7d766be5bd04f11199ebc..d5fb94195d4011e0b4803a3b08495f49237bc1c2 100644 (file)
--- a/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c
+++ b/QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c
@@ -7,7 +7,7 @@ following action is performed in this file,
   4. Set MTRR for PEI\r
   5. Create FV HOB and Flash HOB\r
 \r
-Copyright (c) 2013 Intel Corporation.\r
+Copyright (c) 2013 - 2016, Intel Corporation.\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
@@ -108,6 +108,9 @@ MemoryDiscoveredPpiNotifyCallback (
   UINT8                                 CpuAddressWidth;\r
   UINT32                                RegEax;\r
   MTRR_SETTINGS                         MtrrSettings;\r
+  EFI_PEI_READ_ONLY_VARIABLE2_PPI       *VariableServices;\r
+  UINT8                                 MorControl;\r
+  UINTN                                 DataSize;\r
 \r
   DEBUG ((EFI_D_INFO, "Platform PEIM Memory Callback\n"));\r
 \r
@@ -151,6 +154,52 @@ MemoryDiscoveredPpiNotifyCallback (
 \r
   PERF_END (NULL, "SetCache", NULL, 0);\r
 \r
+  //\r
+  // Get necessary PPI\r
+  //\r
+  Status = PeiServicesLocatePpi (\r
+             &gEfiPeiReadOnlyVariable2PpiGuid,           // GUID\r
+             0,                                          // INSTANCE\r
+             NULL,                                       // EFI_PEI_PPI_DESCRIPTOR\r
+             (VOID **)&VariableServices                  // PPI\r
+             );\r
+  ASSERT_EFI_ERROR (Status);\r
+\r
+  //\r
+  // Detect MOR request by the OS.\r
+  //\r
+  MorControl = 0;\r
+  DataSize = sizeof (MorControl);\r
+  Status = VariableServices->GetVariable (\r
+                               VariableServices,\r
+                               MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME,\r
+                               &gEfiMemoryOverwriteControlDataGuid,\r
+                               NULL,\r
+                               &DataSize,\r
+                               &MorControl\r
+                               );\r
+  //\r
+  // If OS requested a memory overwrite perform it now for Embedded SRAM\r
+  //\r
+  if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {\r
+    DEBUG ((EFI_D_INFO, "Clear Embedded SRAM per MOR request.\n"));\r
+    if (PcdGet32 (PcdESramMemorySize) > 0) {\r
+      if (PcdGet32 (PcdEsramStage1Base) == 0) {\r
+        //\r
+        // ZeroMem() generates an ASSERT() if Buffer parameter is NULL.\r
+        // Clear byte at 0 and start clear operation at address 1.\r
+        //\r
+        *(UINT8 *)(0) = 0;\r
+        ZeroMem ((VOID *)1, (UINTN)PcdGet32 (PcdESramMemorySize) - 1);\r
+      } else {\r
+        ZeroMem (\r
+          (VOID *)(UINTN)PcdGet32 (PcdEsramStage1Base),\r
+          (UINTN)PcdGet32 (PcdESramMemorySize)\r
+          );\r
+      }\r
+    }\r
+  }\r
+\r
   //\r
   // Install PeiReset for PeiResetSystem service\r
   //\r

diff --git a/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c b/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c
index eee696e0e7f000dc617b11606ebfd82215f54670..70c9cf98a0b976606a09d15e71c01b13e95134b2 100644 (file)
--- a/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c
+++ b/QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c
@@ -1,7 +1,7 @@
 /** @file\r
 Framework PEIM to initialize memory on a Quark Memory Controller.\r
 \r
-Copyright (c) 2013 Intel Corporation.\r
+Copyright (c) 2013 - 2016, Intel Corporation.\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
@@ -563,6 +563,8 @@ InstallEfiMemory (
   PEI_CAPSULE_PPI                       *Capsule;\r
   VOID                                  *LargeMemRangeBuf;\r
   UINTN                                 LargeMemRangeBufLen;\r
+  UINT8                                 MorControl;\r
+  UINTN                                 DataSize;\r
 \r
   //\r
   // Test the memory from 1M->TOM\r
@@ -617,6 +619,20 @@ InstallEfiMemory (
   RequiredMemSize = 0;\r
   RetriveRequiredMemorySize (PeiServices, &RequiredMemSize);\r
 \r
+  //\r
+  // Detect MOR request by the OS.\r
+  //\r
+  MorControl = 0;\r
+  DataSize = sizeof (MorControl);\r
+  Status = VariableServices->GetVariable (\r
+                               VariableServices,\r
+                               MEMORY_OVERWRITE_REQUEST_VARIABLE_NAME,\r
+                               &gEfiMemoryOverwriteControlDataGuid,\r
+                               NULL,\r
+                               &DataSize,\r
+                               &MorControl\r
+                               );\r
+\r
   PeiMemoryIndex = 0;\r
 \r
   for (Index = 0; Index < NumRanges; Index++)\r
@@ -624,6 +640,29 @@ InstallEfiMemory (
     DEBUG ((EFI_D_INFO, "Found 0x%x bytes at ", MemoryMap[Index].RangeLength));\r
     DEBUG ((EFI_D_INFO, "0x%x.\n", MemoryMap[Index].PhysicalAddress));\r
 \r
+    //\r
+    // If OS requested a memory overwrite perform it now.  Only do it for memory\r
+    // used by the OS.\r
+    //\r
+    if (MOR_CLEAR_MEMORY_VALUE (MorControl) && MemoryMap[Index].Type == DualChannelDdrMainMemory) {\r
+      DEBUG ((EFI_D_INFO, "Clear memory per MOR request.\n"));\r
+      if ((UINTN)MemoryMap[Index].RangeLength > 0) {\r
+        if ((UINTN)MemoryMap[Index].PhysicalAddress == 0) {\r
+          //\r
+          // ZeroMem() generates an ASSERT() if Buffer parameter is NULL.\r
+          // Clear byte at 0 and start clear operation at address 1.\r
+          //\r
+          *(UINT8 *)(0) = 0;\r
+          ZeroMem ((VOID *)1, (UINTN)MemoryMap[Index].RangeLength - 1);\r
+        } else {\r
+          ZeroMem (\r
+            (VOID *)(UINTN)MemoryMap[Index].PhysicalAddress,\r
+            (UINTN)MemoryMap[Index].RangeLength\r
+            );\r
+        }\r
+      }\r
+    }\r
+\r
     if ((MemoryMap[Index].Type == DualChannelDdrMainMemory) &&\r
         (MemoryMap[Index].PhysicalAddress + MemoryMap[Index].RangeLength < MAX_ADDRESS) &&\r
         (MemoryMap[Index].PhysicalAddress >= PeiMemoryBaseAddress) &&\r