+++ /dev/null
-/** @file\r
-Intel QNC SMBUS library implementation built upon I/O library.\r
-\r
-Copyright (c) 2013-2015 Intel Corporation.\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-//\r
-// Include common header file for this module.\r
-//\r
-#include "CommonHeader.h"\r
-\r
-/**\r
- Gets Io port base address of Smbus Host Controller.\r
-\r
- This internal function depends on a feature flag named PcdIchSmbusFixedIoPortBaseAddress\r
- to retrieve Smbus Io port base. If that feature flag is true, it will get Smbus Io port base\r
- address from a preset Pcd entry named PcdIchSmbusIoPortBaseAddress; otherwise, it will always\r
- read Pci configuration space to get that value in each Smbus bus transaction.\r
-\r
- @return The Io port base address of Smbus host controller.\r
-\r
-**/\r
-UINTN\r
-InternalGetSmbusIoPortBaseAddress (\r
- VOID\r
- )\r
-{\r
- UINTN IoPortBaseAddress;\r
-\r
- if (FeaturePcdGet (PcdSmbaIoBaseAddressFixed)) {\r
- IoPortBaseAddress = (UINTN) PcdGet16 (PcdSmbaIoBaseAddress);\r
- } else {\r
- IoPortBaseAddress = (UINTN) LpcPciCfg32 (R_QNC_LPC_SMBUS_BASE) & B_QNC_LPC_SMBUS_BASE_MASK;\r
- }\r
-\r
- //\r
- // Make sure that the IO port base address has been properly set.\r
- //\r
- ASSERT (IoPortBaseAddress != 0);\r
-\r
- return IoPortBaseAddress;\r
-}\r
-\r
-\r
-/**\r
- Acquires the ownership of SMBUS.\r
-\r
- This internal function reads the host state register.\r
- If the SMBUS is not available, RETURN_TIMEOUT is returned;\r
- Otherwise, it performs some basic initializations and returns\r
- RETURN_SUCCESS.\r
-\r
- @param IoPortBaseAddress The Io port base address of Smbus Host controller.\r
-\r
- @retval RETURN_SUCCESS The SMBUS command was executed successfully.\r
- @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
-\r
-**/\r
-RETURN_STATUS\r
-InternalSmBusAcquire (\r
- UINTN IoPortBaseAddress\r
- )\r
-{\r
-\r
- //\r
- // Clear host status register and exit.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCTL, 0);\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD0, 0);\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD1, 0);\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HSTS, B_QNC_SMBUS_HSTS_ALL);\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Starts the SMBUS transaction and waits until the end.\r
-\r
- This internal function start the SMBUS transaction and waits until the transaction\r
- of SMBUS is over by polling the INTR bit of Host status register.\r
- If the SMBUS is not available, RETURN_TIMEOUT is returned;\r
- Otherwise, it performs some basic initializations and returns\r
- RETURN_SUCCESS.\r
-\r
- @param IoPortBaseAddress The Io port base address of Smbus Host controller.\r
- @param HostControl The Host control command to start SMBUS transaction.\r
-\r
- @retval RETURN_SUCCESS The SMBUS command was executed successfully.\r
- @retval RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).\r
- @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected\r
- in the Host Status Register bit. Device errors are\r
- a result of a transaction collision, illegal command field,\r
- unclaimed cycle (host initiated), or bus errors (collisions).\r
-\r
-**/\r
-RETURN_STATUS\r
-InternalSmBusStart (\r
- IN UINTN IoPortBaseAddress,\r
- IN UINT8 HostControl\r
- )\r
-{\r
- UINT8 HostStatus;\r
-\r
- //\r
- // Set Host Control Register (Initiate Operation, Interrupt disabled).\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCTL, HostControl + B_QNC_SMBUS_START);\r
-\r
- do {\r
- //\r
- // Poll INTR bit of Host Status Register.\r
- //\r
- HostStatus = IoRead8 (IoPortBaseAddress + R_QNC_SMBUS_HSTS);\r
- } while ((HostStatus & (B_QNC_SMBUS_BYTE_DONE_STS | B_QNC_SMBUS_DERR | B_QNC_SMBUS_BERR)) == 0);\r
-\r
- if ((HostStatus & (B_QNC_SMBUS_DERR | B_QNC_SMBUS_BERR)) == 0) {\r
- return RETURN_SUCCESS;\r
- }\r
- //\r
- // Clear error bits of Host Status Register.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HSTS, (B_QNC_SMBUS_DERR | B_QNC_SMBUS_BERR));\r
-\r
- return RETURN_DEVICE_ERROR;\r
-}\r
-\r
-/**\r
- Executes an SMBUS quick, byte or word command.\r
-\r
- This internal function executes an SMBUS quick, byte or word commond.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
-\r
- @param HostControl The value of Host Control Register to set.\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Value The byte/word write to the SMBUS.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The byte/word read from the SMBUS.\r
-\r
-**/\r
-UINT16\r
-InternalSmBusNonBlock (\r
- IN UINT8 HostControl,\r
- IN UINTN SmBusAddress,\r
- IN UINT16 Value,\r
- OUT RETURN_STATUS *Status\r
- )\r
-{\r
- RETURN_STATUS ReturnStatus;\r
- UINTN IoPortBaseAddress;\r
-\r
- IoPortBaseAddress = InternalGetSmbusIoPortBaseAddress ();\r
-\r
- //\r
- // Try to acquire the ownership of QNC SMBUS.\r
- //\r
- ReturnStatus = InternalSmBusAcquire (IoPortBaseAddress);\r
- if (RETURN_ERROR (ReturnStatus)) {\r
- goto Done;\r
- }\r
-\r
- //\r
- // Set Host Commond Register.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));\r
- //\r
- // Write value to Host Data 0 and Host Data 1 Registers.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD0, (UINT8) Value);\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD1, (UINT8) (Value >> 8));\r
-\r
-\r
- //\r
- // Set SMBUS slave address for the device to send/receive from.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_TSA, (UINT8) SmBusAddress);\r
- //\r
- // Start the SMBUS transaction and wait for the end.\r
- //\r
- ReturnStatus = InternalSmBusStart (IoPortBaseAddress, HostControl);\r
- //\r
- // Read value from Host Data 0 and Host Data 1 Registers.\r
- //\r
- Value = (UINT16)(IoRead8 (IoPortBaseAddress + R_QNC_SMBUS_HD1) << 8);\r
- Value = (UINT16)(Value | IoRead8 (IoPortBaseAddress + R_QNC_SMBUS_HD0));\r
-\r
- //\r
- // Clear Host Status Register and Auxiliary Status Register.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HSTS, B_QNC_SMBUS_HSTS_ALL);\r
-\r
-Done:\r
- if (Status != NULL) {\r
- *Status = ReturnStatus;\r
- }\r
-\r
- return Value;\r
-}\r
-\r
-/**\r
- Executes an SMBUS quick read command.\r
-\r
- Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r
- Only the SMBUS slave address field of SmBusAddress is required.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If PEC is set in SmBusAddress, then ASSERT().\r
- If Command in SmBusAddress is not zero, then ASSERT().\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-SmBusQuickRead (\r
- IN UINTN SmBusAddress,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_QUICK,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_READ,\r
- 0,\r
- Status\r
- );\r
-\r
-}\r
-\r
-/**\r
- Executes an SMBUS quick write command.\r
-\r
- Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r
- Only the SMBUS slave address field of SmBusAddress is required.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If PEC is set in SmBusAddress, then ASSERT().\r
- If Command in SmBusAddress is not zero, then ASSERT().\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-SmBusQuickWrite (\r
- IN UINTN SmBusAddress,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_QUICK,\r
- SmBusAddress & V_QNC_SMBUS_RW_SEL_WRITE,\r
- 0,\r
- Status\r
- );\r
-\r
-}\r
-\r
-/**\r
- Executes an SMBUS receive byte command.\r
-\r
- Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r
- Only the SMBUS slave address field of SmBusAddress is required.\r
- The byte received from the SMBUS is returned.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Command in SmBusAddress is not zero, then ASSERT().\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The byte received from the SMBUS.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-SmBusReceiveByte (\r
- IN UINTN SmBusAddress,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return (UINT8) InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_BYTE,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_READ,\r
- 0,\r
- Status\r
- );\r
-\r
-}\r
-\r
-/**\r
- Executes an SMBUS send byte command.\r
-\r
- Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r
- The byte specified by Value is sent.\r
- Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Command in SmBusAddress is not zero, then ASSERT().\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Value The 8-bit value to send.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The parameter of Value.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-SmBusSendByte (\r
- IN UINTN SmBusAddress,\r
- IN UINT8 Value,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return (UINT8) InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_BYTE,\r
- SmBusAddress & V_QNC_SMBUS_RW_SEL_WRITE,\r
- Value,\r
- Status\r
- );\r
-\r
-}\r
-\r
-/**\r
- Executes an SMBUS read data byte command.\r
-\r
- Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
- The 8-bit value read from the SMBUS is returned.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The byte read from the SMBUS.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-SmBusReadDataByte (\r
- IN UINTN SmBusAddress,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return (UINT8) InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_BYTE_DATA,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_READ,\r
- 0,\r
- Status\r
- );\r
-}\r
-\r
-/**\r
- Executes an SMBUS write data byte command.\r
-\r
- Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r
- The 8-bit value specified by Value is written.\r
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
- Value is returned.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Value The 8-bit value to write.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The parameter of Value.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-SmBusWriteDataByte (\r
- IN UINTN SmBusAddress,\r
- IN UINT8 Value,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return (UINT8) InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_BYTE_DATA,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_WRITE,\r
- Value,\r
- Status\r
- );\r
-}\r
-\r
-/**\r
- Executes an SMBUS read data word command.\r
-\r
- Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
- The 16-bit value read from the SMBUS is returned.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The byte read from the SMBUS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-SmBusReadDataWord (\r
- IN UINTN SmBusAddress,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 2);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_WORD_DATA,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_READ,\r
- 0,\r
- Status\r
- );\r
-\r
-}\r
-\r
-/**\r
- Executes an SMBUS write data word command.\r
-\r
- Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r
- The 16-bit value specified by Value is written.\r
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
- Value is returned.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Value The 16-bit value to write.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The parameter of Value.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-SmBusWriteDataWord (\r
- IN UINTN SmBusAddress,\r
- IN UINT16 Value,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 2);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_WORD_DATA,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_WRITE,\r
- Value,\r
- Status\r
- );\r
-}\r
-\r
-/**\r
- Executes an SMBUS process call command.\r
-\r
- Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r
- The 16-bit value specified by Value is written.\r
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
- The 16-bit value returned by the process call command is returned.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Value The 16-bit value to write.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The 16-bit value returned by the process call command.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-SmBusProcessCall (\r
- IN UINTN SmBusAddress,\r
- IN UINT16 Value,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return InternalSmBusNonBlock (\r
- V_QNC_SMBUS_HCTL_CMD_PROCESS_CALL,\r
- SmBusAddress & V_QNC_SMBUS_RW_SEL_WRITE,\r
- Value,\r
- Status\r
- );\r
-\r
-}\r
-\r
-/**\r
- Executes an SMBUS block command.\r
-\r
- Executes an SMBUS block read, block write and block write-block read command\r
- on the SMBUS device specified by SmBusAddress.\r
- Bytes are read from the SMBUS and stored in Buffer.\r
- The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
- SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
-\r
- @param HostControl The value of Host Control Register to set.\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
- @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The number of bytes read from the SMBUS.\r
-\r
-**/\r
-UINTN\r
-InternalSmBusBlock (\r
- IN UINT8 HostControl,\r
- IN UINTN SmBusAddress,\r
- IN UINT8 *WriteBuffer,\r
- OUT UINT8 *ReadBuffer,\r
- OUT RETURN_STATUS *Status\r
- )\r
-{\r
- RETURN_STATUS ReturnStatus;\r
- UINTN Index;\r
- UINTN BytesCount;\r
- UINTN IoPortBaseAddress;\r
-\r
- IoPortBaseAddress = InternalGetSmbusIoPortBaseAddress ();\r
-\r
- BytesCount = SMBUS_LIB_LENGTH (SmBusAddress);\r
-\r
- //\r
- // Try to acquire the ownership of ICH SMBUS.\r
- //\r
- ReturnStatus = InternalSmBusAcquire (IoPortBaseAddress);\r
- if (RETURN_ERROR (ReturnStatus)) {\r
- goto Done;\r
- }\r
-\r
- //\r
- // Set Host Command Register.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));\r
-\r
- //\r
- // Clear byte pointer of 32-byte buffer.\r
- //\r
- IoRead8 (IoPortBaseAddress + R_QNC_SMBUS_HCTL);\r
-\r
- if (WriteBuffer != NULL) {\r
- //\r
- // Write the number of block to Host Block Data Byte Register.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HD0, (UINT8) BytesCount);\r
- //\r
- // Write data block to Host Block Data Register.\r
- //\r
- for (Index = 0; Index < BytesCount; Index++) {\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HBD + (UINT8)Index, WriteBuffer[Index]);\r
- }\r
- }\r
- //\r
- // Set SMBUS slave address for the device to send/receive from.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_TSA, (UINT8) SmBusAddress);\r
- //\r
- // Start the SMBUS transaction and wait for the end.\r
- //\r
- ReturnStatus = InternalSmBusStart (IoPortBaseAddress, HostControl);\r
- if (RETURN_ERROR (ReturnStatus)) {\r
- goto Done;\r
- }\r
-\r
- if (ReadBuffer != NULL) {\r
- //\r
- // Read the number of block from host block data byte register.\r
- //\r
- BytesCount = IoRead8 (IoPortBaseAddress + R_QNC_SMBUS_HD0);\r
- //\r
- // Write data block from Host Block Data Register.\r
- //\r
- for (Index = 0; Index < BytesCount; Index++) {\r
- ReadBuffer[Index] = IoRead8 (IoPortBaseAddress + R_QNC_SMBUS_HBD + (UINT8)Index);\r
- }\r
- }\r
-\r
-Done:\r
- //\r
- // Clear Host Status Register and Auxiliary Status Register.\r
- //\r
- IoWrite8 (IoPortBaseAddress + R_QNC_SMBUS_HSTS, B_QNC_SMBUS_HSTS_ALL);\r
-\r
- if (Status != NULL) {\r
- *Status = ReturnStatus;\r
- }\r
-\r
- return BytesCount;\r
-}\r
-\r
-/**\r
- Executes an SMBUS read block command.\r
-\r
- Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r
- Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
- Bytes are read from the SMBUS and stored in Buffer.\r
- The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
- SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
- If Length in SmBusAddress is not zero, then ASSERT().\r
- If Buffer is NULL, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The number of bytes read.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-SmBusReadBlock (\r
- IN UINTN SmBusAddress,\r
- OUT VOID *Buffer,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (Buffer != NULL);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return InternalSmBusBlock (\r
- V_QNC_SMBUS_HCTL_CMD_BLOCK,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_READ,\r
- NULL,\r
- Buffer,\r
- Status\r
- );\r
-}\r
-\r
-/**\r
- Executes an SMBUS write block command.\r
-\r
- Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r
- The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
- Bytes are written to the SMBUS from Buffer.\r
- The number of bytes written is returned, and will never return a value larger than 32-bytes.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
- If Buffer is NULL, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
-\r
- @return The number of bytes written.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-SmBusWriteBlock (\r
- IN UINTN SmBusAddress,\r
- OUT VOID *Buffer,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (Buffer != NULL);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
-\r
- return InternalSmBusBlock (\r
- V_QNC_SMBUS_HCTL_CMD_BLOCK,\r
- SmBusAddress | V_QNC_SMBUS_RW_SEL_WRITE,\r
- Buffer,\r
- NULL,\r
- Status\r
- );\r
-}\r
-\r
-/**\r
- Executes an SMBUS block process call command.\r
-\r
- Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r
- The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
- Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r
- If Status is not NULL, then the status of the executed command is returned in Status.\r
- It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r
- SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
- If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
- If WriteBuffer is NULL, then ASSERT().\r
- If ReadBuffer is NULL, then ASSERT().\r
- If any reserved bits of SmBusAddress are set, then ASSERT().\r
-\r
- @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
- SMBUS Command, SMBUS Data Length, and PEC.\r
- @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
- @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
- @param Status Return status for the executed command.\r
- This is an optional parameter and may be NULL.\r
- RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r
- RETURN_DEVICE_ERROR The request was not completed because a failure\r
- reflected in the Host Status Register bit. Device errors are a result\r
- of a transaction collision, illegal command field, unclaimed cycle\r
- (host initiated), or bus errors (collisions).\r
- RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r
- RETURN_UNSUPPORTED The SMBus operation is not supported.\r
-\r
- @return The number of bytes written.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-SmBusBlockProcessCall (\r
- IN UINTN SmBusAddress,\r
- IN VOID *WriteBuffer,\r
- OUT VOID *ReadBuffer,\r
- OUT RETURN_STATUS *Status OPTIONAL\r
- )\r
-{\r
- ASSERT (WriteBuffer != NULL);\r
- ASSERT (ReadBuffer != NULL);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r
- ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r
- ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r
- if (Status != NULL) {\r
- *Status = RETURN_UNSUPPORTED;\r
- }\r
- return 0;\r
-}\r
projects / mirror_edk2.git / blobdiff