+++ /dev/null
-/** @file\r
-\r
-Header file for Industry SD Card 2.0 spec.\r
-\r
-Copyright (c) 2013-2015 Intel Corporation.\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef _SD_CARD_H\r
-#define _SD_CARD_H\r
-\r
-#include "MMC.h"\r
-\r
-#pragma pack(1)\r
-\r
-#define CHECK_PATTERN 0xAA ///< Physical Layer Simplified Specification Version 3.01 recommended 0xAA\r
-\r
-#define ACMD6 6\r
-#define ACMD13 13\r
-#define ACMD23 23\r
-#define ACMD41 41\r
-#define ACMD42 42\r
-#define ACMD51 51\r
-\r
-\r
-#define SWITCH_FUNC CMD6\r
-#define SEND_IF_COND CMD8\r
-\r
-\r
-#define SET_BUS_WIDTH ACMD6\r
-#define SD_STATUS ACMD13\r
-#define SET_WR_BLK_ERASE_COUNT ACMD23\r
-#define SD_SEND_OP_COND ACMD41\r
-#define SET_CLR_CARD_DETECT ACMD42\r
-#define SEND_SCR ACMD51\r
-\r
-\r
-\r
-#define SD_BUS_WIDTH_1 0\r
-#define SD_BUS_WIDTH_4 2\r
-\r
-\r
-\r
-#define FREQUENCY_SD_PP (25 * 1000 * 1000)\r
-#define FREQUENCY_SD_PP_HIGH (50 * 1000 * 1000)\r
-\r
-\r
-#define SD_SPEC_10 0\r
-#define SD_SPEC_11 1\r
-#define SD_SPEC_20 2\r
-\r
-\r
-#define VOLTAGE_27_36 0x1\r
-\r
-typedef struct {\r
- UINT8 NotUsed: 1; // 1 [0:0]\r
- UINT8 CRC: 7; // CRC [7:1]\r
- UINT8 ECC: 2; // ECC code [9:8]\r
- UINT8 FILE_FORMAT: 2; // File format [11:10]\r
- UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12]\r
- UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]\r
- UINT8 COPY: 1; // Copy flag (OTP) [14:14]\r
- UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15]\r
- UINT16 Reserved0: 5; // 0 [20:16]\r
- UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21]\r
- UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22]\r
- UINT16 R2W_FACTOR: 3; // Write speed factor [28:26]\r
- UINT16 DEFAULT_ECC: 2; // Manufacturer default ECC [30:29]\r
- UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31]\r
- UINT16 WP_GRP_SIZE: 7; // Write protect group size [38:32]\r
- UINT16 SECTOR_SIZE: 7; // Erase sector size [45:39]\r
- UINT16 ERASE_BLK_EN: 1; // Erase single block enable [46:46]\r
- UINT16 Reserved1: 1; // 0 [47:47]\r
-\r
- UINT32 C_SIZE: 22; // Device size [69:48]\r
- UINT32 Reserved2: 6; // 0 [75:70]\r
- UINT32 DSR_IMP: 1; // DSR implemented [76:76]\r
- UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77]\r
- UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]\r
- UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79]\r
-\r
- UINT16 READ_BL_LEN: 4; // Max. read data block length [83:80]\r
- UINT16 CCC: 12; // Card command classes [95:84]\r
- UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96]\r
- UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]\r
- UINT8 TAAC ; // Data read access-time 1 [119:112]\r
- UINT8 Reserved3: 6; // 0 [125:120]\r
- UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126]\r
-}CSD_SDV2;\r
-\r
-typedef struct {\r
- UINT32 Reserved0;\r
- UINT32 Reserved1: 16;\r
- UINT32 SD_BUS_WIDTH: 4;\r
- UINT32 SD_SECURITY: 3;\r
- UINT32 DATA_STAT_AFTER_ERASE: 1;\r
- UINT32 SD_SPEC: 4;\r
- UINT32 SCR_STRUCT: 4;\r
-}SCR;\r
-\r
-\r
-typedef struct {\r
- UINT8 Reserved0[50];\r
- UINT8 ERASE_OFFSET: 2;\r
- UINT8 ERASE_TIMEOUT: 6;\r
- UINT16 ERASE_SIZE;\r
- UINT8 Reserved1: 4;\r
- UINT8 AU_SIZE: 4;\r
- UINT8 PERFORMANCE_MOVE;\r
- UINT8 SPEED_CLASS;\r
- UINT32 SIZE_OF_PROTECTED_AREA;\r
- UINT32 SD_CARD_TYPE: 16;\r
- UINT32 Reserved2: 13;\r
- UINT32 SECURED_MODE: 1;\r
- UINT32 DAT_BUS_WIDTH: 2;\r
-}SD_STATUS_REG;\r
-\r
-\r
-\r
-typedef struct {\r
- UINT8 Reserved0[34];\r
- UINT16 Group1BusyStatus;\r
- UINT16 Group2BusyStatus;\r
- UINT16 Group3BusyStatus;\r
- UINT16 Group4BusyStatus;\r
- UINT16 Group5BusyStatus;\r
- UINT16 Group6BusyStatus;\r
- UINT8 DataStructureVersion;\r
- UINT8 Group21Status;\r
- UINT8 Group43Status;\r
- UINT8 Group65Status;\r
- UINT16 Group1Function;\r
- UINT16 Group2Function;\r
- UINT16 Group3Function;\r
- UINT16 Group4Function;\r
- UINT16 Group5Function;\r
- UINT16 Group6Function;\r
- UINT16 MaxCurrent;\r
-}SWITCH_STATUS;\r
-\r
-\r
-#pragma pack()\r
-#endif\r
-\r