UefiCpuPkg: Clean up source files

[mirror_edk2.git] / UefiCpuPkg / CpuIo2Dxe / CpuIo2Dxe.h

diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h
index 7d00da16f4ffa3f2b236b7eda5990259bc8de0c2..286baf25f11e4c61aeca879c78c1947b6e0f072d 100644 (file)
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.h
@@ -1,14 +1,14 @@
 /** @file\r
   Internal include file for the CPU I/O 2 Protocol.\r
 \r
 /** @file\r
   Internal include file for the CPU I/O 2 Protocol.\r
 \r

-Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials                          \r
-are licensed and made available under the terms and conditions of the BSD License         \r
-which accompanies this distribution.  The full text of the license may be found at        \r
-http://opensource.org/licenses/bsd-license.php                                            \r
-                                                                                          \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r

 \r
 **/\r
 \r
 \r
 **/\r
 \r


@@ -29,30 +29,30 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 /**\r
   Reads memory-mapped registers.\r
 \r
 /**\r
   Reads memory-mapped registers.\r
 \r

-  The I/O operations are carried out exactly as requested. The caller is responsible \r
-  for satisfying any alignment and I/O width restrictions that a PI System on a \r
-  platform might require. For example on some platforms, width requests of \r
-  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will \r
+  The I/O operations are carried out exactly as requested. The caller is responsible\r
+  for satisfying any alignment and I/O width restrictions that a PI System on a\r
+  platform might require. For example on some platforms, width requests of\r
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r

   be handled by the driver.\r
   be handled by the driver.\r

-  \r
-  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, \r
-  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for \r
+\r
+  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
+  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r

   each of the Count operations that is performed.\r
   each of the Count operations that is performed.\r

-  \r
-  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, \r
-  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
+  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times on the same Address.\r
   write operation is performed Count times on the same Address.\r

-  \r
-  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, \r
-  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
+  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times from the first element of Buffer.\r
   write operation is performed Count times from the first element of Buffer.\r

-  \r
+\r

   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r
   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r

-  @param[in]  Address  The base address of the I/O operation. \r
-  @param[in]  Count    The number of I/O operations to perform. The number of \r
+  @param[in]  Address  The base address of the I/O operation.\r
+  @param[in]  Count    The number of I/O operations to perform. The number of\r

                        bytes moved is Width size * Count, starting at Address.\r
   @param[out] Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r
                        bytes moved is Width size * Count, starting at Address.\r
   @param[out] Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r


@@ -61,7 +61,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r

-  @retval EFI_UNSUPPORTED        The address range specified by Address, Width, \r
+  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,\r

                                  and Count is not valid for this PI system.\r
 \r
 **/\r
                                  and Count is not valid for this PI system.\r
 \r
 **/\r


@@ -78,30 +78,30 @@ CpuMemoryServiceRead (
 /**\r
   Writes memory-mapped registers.\r
 \r
 /**\r
   Writes memory-mapped registers.\r
 \r

-  The I/O operations are carried out exactly as requested. The caller is responsible \r
-  for satisfying any alignment and I/O width restrictions that a PI System on a \r
-  platform might require. For example on some platforms, width requests of \r
-  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will \r
+  The I/O operations are carried out exactly as requested. The caller is responsible\r
+  for satisfying any alignment and I/O width restrictions that a PI System on a\r
+  platform might require. For example on some platforms, width requests of\r
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r

   be handled by the driver.\r
   be handled by the driver.\r

-  \r
-  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, \r
-  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for \r
+\r
+  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
+  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r

   each of the Count operations that is performed.\r
   each of the Count operations that is performed.\r

-  \r
-  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, \r
-  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
+  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times on the same Address.\r
   write operation is performed Count times on the same Address.\r

-  \r
-  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, \r
-  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
+  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times from the first element of Buffer.\r
   write operation is performed Count times from the first element of Buffer.\r

-  \r
+\r

   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r
   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r

-  @param[in]  Address  The base address of the I/O operation. \r
-  @param[in]  Count    The number of I/O operations to perform. The number of \r
+  @param[in]  Address  The base address of the I/O operation.\r
+  @param[in]  Count    The number of I/O operations to perform. The number of\r

                        bytes moved is Width size * Count, starting at Address.\r
   @param[in]  Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r
                        bytes moved is Width size * Count, starting at Address.\r
   @param[in]  Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r


@@ -110,7 +110,7 @@ CpuMemoryServiceRead (
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r

-  @retval EFI_UNSUPPORTED        The address range specified by Address, Width, \r
+  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,\r

                                  and Count is not valid for this PI system.\r
 \r
 **/\r
                                  and Count is not valid for this PI system.\r
 \r
 **/\r


@@ -127,30 +127,30 @@ CpuMemoryServiceWrite (
 /**\r
   Reads I/O registers.\r
 \r
 /**\r
   Reads I/O registers.\r
 \r

-  The I/O operations are carried out exactly as requested. The caller is responsible \r
-  for satisfying any alignment and I/O width restrictions that a PI System on a \r
-  platform might require. For example on some platforms, width requests of \r
-  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will \r
+  The I/O operations are carried out exactly as requested. The caller is responsible\r
+  for satisfying any alignment and I/O width restrictions that a PI System on a\r
+  platform might require. For example on some platforms, width requests of\r
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r

   be handled by the driver.\r
   be handled by the driver.\r

-  \r
-  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, \r
-  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for \r
+\r
+  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
+  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r

   each of the Count operations that is performed.\r
   each of the Count operations that is performed.\r

-  \r
-  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, \r
-  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
+  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times on the same Address.\r
   write operation is performed Count times on the same Address.\r

-  \r
-  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, \r
-  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
+  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times from the first element of Buffer.\r
   write operation is performed Count times from the first element of Buffer.\r

-  \r
+\r

   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r
   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r

-  @param[in]  Address  The base address of the I/O operation. \r
-  @param[in]  Count    The number of I/O operations to perform. The number of \r
+  @param[in]  Address  The base address of the I/O operation.\r
+  @param[in]  Count    The number of I/O operations to perform. The number of\r

                        bytes moved is Width size * Count, starting at Address.\r
   @param[out] Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r
                        bytes moved is Width size * Count, starting at Address.\r
   @param[out] Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r


@@ -159,7 +159,7 @@ CpuMemoryServiceWrite (
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r

-  @retval EFI_UNSUPPORTED        The address range specified by Address, Width, \r
+  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,\r

                                  and Count is not valid for this PI system.\r
 \r
 **/\r
                                  and Count is not valid for this PI system.\r
 \r
 **/\r


@@ -176,30 +176,30 @@ CpuIoServiceRead (
 /**\r
   Write I/O registers.\r
 \r
 /**\r
   Write I/O registers.\r
 \r

-  The I/O operations are carried out exactly as requested. The caller is responsible \r
-  for satisfying any alignment and I/O width restrictions that a PI System on a \r
-  platform might require. For example on some platforms, width requests of \r
-  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will \r
+  The I/O operations are carried out exactly as requested. The caller is responsible\r
+  for satisfying any alignment and I/O width restrictions that a PI System on a\r
+  platform might require. For example on some platforms, width requests of\r
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r

   be handled by the driver.\r
   be handled by the driver.\r

-  \r
-  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, \r
-  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for \r
+\r
+  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,\r
+  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for\r

   each of the Count operations that is performed.\r
   each of the Count operations that is performed.\r

-  \r
-  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, \r
-  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,\r
+  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times on the same Address.\r
   write operation is performed Count times on the same Address.\r

-  \r
-  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, \r
-  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is \r
-  incremented for each of the Count operations that is performed. The read or \r
+\r
+  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,\r
+  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is\r
+  incremented for each of the Count operations that is performed. The read or\r

   write operation is performed Count times from the first element of Buffer.\r
   write operation is performed Count times from the first element of Buffer.\r

-  \r
+\r

   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r
   @param[in]  This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.\r
   @param[in]  Width    Signifies the width of the I/O or Memory operation.\r

-  @param[in]  Address  The base address of the I/O operation. \r
-  @param[in]  Count    The number of I/O operations to perform. The number of \r
+  @param[in]  Address  The base address of the I/O operation.\r
+  @param[in]  Count    The number of I/O operations to perform. The number of\r

                        bytes moved is Width size * Count, starting at Address.\r
   @param[in]  Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r
                        bytes moved is Width size * Count, starting at Address.\r
   @param[in]  Buffer   For read operations, the destination buffer to store the results.\r
                        For write operations, the source buffer from which to write data.\r


@@ -208,9 +208,9 @@ CpuIoServiceRead (
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r
   @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.\r
   @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
   @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.\r

-  @retval EFI_UNSUPPORTED        The address range specified by Address, Width, \r
+  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,\r

                                  and Count is not valid for this PI system.\r
                                  and Count is not valid for this PI system.\r

-                                 \r
+\r

 **/\r
 EFI_STATUS\r
 EFIAPI\r
 **/\r
 EFI_STATUS\r
 EFIAPI\r