UefiCpuPkg/Msr: Add CPUID signature check MACROs

[mirror_edk2.git] / UefiCpuPkg / Include / Register / Msr / XeonPhiMsr.h

diff --git a/UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h b/UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h
index 853d83bfc58c7f73428173d8a158363a82d839b6..43354d15c96cb4e01e4996c40ccdba664ebedc7f 100644 (file)
--- a/UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h
+++ b/UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h
@@ -6,7 +6,7 @@
   returned is a single 32-bit or 64-bit value, then a data structure is not\r
   provided for that MSR.\r
 \r
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -26,6 +26,22 @@
 \r
 #include <Register/ArchitecturalMsr.h>\r
 \r
+/**\r
+  Is Intel(R) Xeon(R) Phi(TM) processor Family?\r
+\r
+  @param   DisplayFamily  Display Family ID\r
+  @param   DisplayModel   Display Model ID\r
+\r
+  @retval  TRUE   Yes, it is.\r
+  @retval  FALSE  No, it isn't.\r
+**/\r
+#define IS_XEON_PHI_PROCESSOR(DisplayFamily, DisplayModel) \\r
+  (DisplayFamily == 0x06 && \\r
+   (                        \\r
+    DisplayModel == 0x57    \\r
+    )                       \\r
+   )\r
+\r
 /**\r
   Thread. SMI Counter (R/O).\r
 \r