Introduce UefiCpuLib library class in UefiCpuPkg and add one instance of BaseUefiCpuL...

[mirror_edk2.git] / UefiCpuPkg / Library / BaseUefiCpuLib / X64 / InitializeFpu.S

diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S
new file mode 100644 (file)
index 0000000..3d1556d
--- /dev/null
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S
@@ -0,0 +1,54 @@
+#------------------------------------------------------------------------------
+#*
+#*   Copyright 2009, Intel Corporation
+#*   All rights reserved. This program and the accompanying materials
+#*   are licensed and made available under the terms and conditions of the BSD License
+#*   which accompanies this distribution.  The full text of the license may be found at
+#*   http://opensource.org/licenses/bsd-license.php
+#*
+#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#*
+#*
+#------------------------------------------------------------------------------
+
+
+#\r
+# Float control word initial value: \r
+# all exceptions masked, double-precision, round-to-nearest\r
+#\r
+ASM_PFX(mFpuControlWord): .word     0x027F\r
+#\r
+# Multimedia-extensions control word:\r
+# all exceptions masked, round-to-nearest, flush to zero for masked underflow\r
+#\r
+ASM_PFX(mMmxControlWord): .long     0x01F80\r
+
+#
+# Initializes floating point units for requirement of UEFI specification.\r
+#\r
+# This function initializes floating-point control word to 0x027F (all exceptions\r
+# masked,double-precision, round-to-nearest) and multimedia-extensions control word\r
+# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero\r
+# for masked underflow).
+#
+ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
+ASM_PFX(InitializeFloatingPointUnits):
+
+    #\r
+    # Initialize floating point units\r
+    #\r
+    finit\r
+    fldcw   ASM_PFX(mFpuControlWord)\r
+    
+    #
+    # Set OSFXSR bit 9 in CR4
+    #
+    movq    %cr4, %rax 
+    or      $200, %rax
+    movq    %rax, %cr4
+    
+    ldmxcsr ASM_PFX(mMmxControlWord)
+    
+    ret
+