UefiCpuPkg/CpuExceptionHandlerLib: Support IA32 processors without DE or FXSAVE/FXRESTOR

[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / Ia32 / ExceptionHandlerAsm.S

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S
index 627f3e513c072d0f43222296237d56d24a8bba9b..3676809b4bbf5555ac46eebfd9f32b1013069aef 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.S
@@ -1,6 +1,6 @@
 #------------------------------------------------------------------------------\r
 #*\r
-#*   Copyright (c) 2012 - 2013, Intel Corporation. All rights reserved.<BR>\r
+#*   Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>\r
 #*   This program and the accompanying materials\r
 #*   are licensed and made available under the terms and conditions of the BSD License\r
 #*   which accompanies this distribution.  The full text of the license may be found at\r
@@ -447,10 +447,25 @@ ErrorCodeAndVectorOnStack:
     pushl   %eax\r
 \r
 #; UINT32  Cr0, Cr1, Cr2, Cr3, Cr4;\r
+## insure FXSAVE/FXRSTOR is enabled in CR4...\r
+## ... while we're at it, make sure DE is also enabled...\r
+    mov     $1, %eax\r
+    pushl   %ebx                         # temporarily save value of ebx on stack \r
+    cpuid                                # use CPUID to determine if FXSAVE/FXRESTOR\r
+                                         # and DE are supported\r
+    popl    %ebx                         # retore value of ebx that was overwritten\r
+                                         # by CPUID \r
     movl    %cr4, %eax\r
-    orl     $0x208, %eax\r
+    pushl   %eax                         # push cr4 firstly\r
+    testl   $BIT24, %edx                 # Test for FXSAVE/FXRESTOR support\r
+    jz      L1\r
+    orl     $BIT9, %eax                  # Set CR4.OSFXSR\r
+L1:    \r
+    testl   $BIT2, %edx                  # Test for Debugging Extensions support\r
+    jz      L2\r
+    orl     $BIT3, %eax                  # Set CR4.DE\r
+L2:    \r
     movl    %eax, %cr4\r
-    pushl   %eax\r
     movl    %cr3, %eax\r
     pushl   %eax\r
     movl    %cr2, %eax\r
@@ -477,7 +492,11 @@ ErrorCodeAndVectorOnStack:
 #; FX_SAVE_STATE_IA32 FxSaveState;\r
     subl    $512, %esp\r
     movl    %esp, %edi\r
+    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support.  \r
+                             # edx still contains result from CPUID above\r
+    jz      L3\r
     .byte      0x0f, 0x0ae, 0x07 #fxsave [edi]\r
+L3:  \r
 \r
 #; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
     cld\r
@@ -503,7 +522,13 @@ ErrorCodeAndVectorOnStack:
 \r
 #; FX_SAVE_STATE_IA32 FxSaveState;\r
     movl    %esp, %esi\r
+    movl    $1, %eax\r
+    cpuid                    # use CPUID to determine if FXSAVE/FXRESTOR \r
+                             # are supported\r
+    testl   $BIT24, %edx     # Test for FXSAVE/FXRESTOR support\r
+    jz      L4\r
     .byte      0x0f, 0x0ae, 0x0e # fxrstor [esi]\r
+L4:  \r
     addl    $512, %esp\r
 \r
 #; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r