//\r
CONST FIXED_MTRR mMtrrLibFixedMtrrTable[] = {\r
{\r
- MTRR_LIB_IA32_MTRR_FIX64K_00000,\r
+ MSR_IA32_MTRR_FIX64K_00000,\r
0,\r
SIZE_64KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX16K_80000,\r
+ MSR_IA32_MTRR_FIX16K_80000,\r
0x80000,\r
SIZE_16KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX16K_A0000,\r
+ MSR_IA32_MTRR_FIX16K_A0000,\r
0xA0000,\r
SIZE_16KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_C0000,\r
+ MSR_IA32_MTRR_FIX4K_C0000,\r
0xC0000,\r
SIZE_4KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_C8000,\r
+ MSR_IA32_MTRR_FIX4K_C8000,\r
0xC8000,\r
SIZE_4KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_D0000,\r
+ MSR_IA32_MTRR_FIX4K_D0000,\r
0xD0000,\r
SIZE_4KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_D8000,\r
+ MSR_IA32_MTRR_FIX4K_D8000,\r
0xD8000,\r
SIZE_4KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_E0000,\r
+ MSR_IA32_MTRR_FIX4K_E0000,\r
0xE0000,\r
SIZE_4KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_E8000,\r
+ MSR_IA32_MTRR_FIX4K_E8000,\r
0xE8000,\r
SIZE_4KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_F0000,\r
+ MSR_IA32_MTRR_FIX4K_F0000,\r
0xF0000,\r
SIZE_4KB\r
},\r
{\r
- MTRR_LIB_IA32_MTRR_FIX4K_F8000,\r
+ MSR_IA32_MTRR_FIX4K_F8000,\r
0xF8000,\r
SIZE_4KB\r
}\r
IN MTRR_SETTINGS *MtrrSetting\r
)\r
{\r
+ MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;\r
+\r
if (MtrrSetting == NULL) {\r
- return (MTRR_MEMORY_CACHE_TYPE) (AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE) & 0x7);\r
+ DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);\r
} else {\r
- return (MTRR_MEMORY_CACHE_TYPE) (MtrrSetting->MtrrDefType & 0x7);\r
+ DefType.Uint64 = MtrrSetting->MtrrDefType;\r
}\r
+\r
+ return (MTRR_MEMORY_CACHE_TYPE) DefType.Bits.Type;\r
}\r
\r
\r
OUT MTRR_CONTEXT *MtrrContext\r
)\r
{\r
+ MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;\r
//\r
// Disable interrupts and save current interrupt state\r
//\r
//\r
// Disable MTRRs\r
//\r
- AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 0);\r
+ DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);\r
+ DefType.Bits.E = 0;\r
+ AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);\r
}\r
\r
/**\r
IN MTRR_CONTEXT *MtrrContext\r
)\r
{\r
+ MSR_IA32_MTRR_DEF_TYPE_REGISTER DefType;\r
//\r
// Enable Cache MTRR\r
//\r
- AsmMsrBitFieldWrite64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, 10, 11, 3);\r
+ DefType.Uint64 = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);\r
+ DefType.Bits.E = 1;\r
+ DefType.Bits.FE = 1;\r
+ AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, DefType.Uint64);\r
\r
MtrrLibPostMtrrChangeEnableCache (MtrrContext);\r
}\r
for (Index = 0; Index < VariableMtrrCount; Index++) {\r
if (MtrrSetting == NULL) {\r
VariableSettings->Mtrr[Index].Base =\r
- AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1));\r
+ AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1));\r
VariableSettings->Mtrr[Index].Mask =\r
- AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1);\r
+ AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1));\r
} else {\r
VariableSettings->Mtrr[Index].Base = MtrrSetting->Variables.Mtrr[Index].Base;\r
VariableSettings->Mtrr[Index].Mask = MtrrSetting->Variables.Mtrr[Index].Mask;\r
\r
ZeroMem (VariableMtrr, sizeof (VARIABLE_MTRR) * MTRR_NUMBER_OF_VARIABLE_MTRR);\r
for (Index = 0, UsedMtrr = 0; Index < VariableMtrrCount; Index++) {\r
- if ((VariableSettings->Mtrr[Index].Mask & MTRR_LIB_CACHE_MTRR_ENABLED) != 0) {\r
+ if (((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &VariableSettings->Mtrr[Index].Mask)->Bits.V != 0) {\r
VariableMtrr[Index].Msr = (UINT32)Index;\r
VariableMtrr[Index].BaseAddress = (VariableSettings->Mtrr[Index].Base & MtrrValidAddressMask);\r
VariableMtrr[Index].Length = ((~(VariableSettings->Mtrr[Index].Mask & MtrrValidAddressMask)) & MtrrValidBitsMask) + 1;\r
BOOLEAN UseLeastAlignment;\r
\r
UseLeastAlignment = TRUE;\r
+ SubLength = 0;\r
\r
//\r
// Calculate the alignment of the base address.\r
IN UINT64 Alignment0,\r
OUT UINT32 *SubLeft, // subtractive from BaseAddress to get more aligned address, to save MTRR\r
OUT UINT32 *SubRight // subtractive from BaseAddress + Length, to save MTRR\r
-)\r
+ )\r
{\r
UINT64 Alignment;\r
UINT32 LeastLeftMtrrNumber;\r
*SubLeft = 0;\r
*SubRight = 0;\r
LeastSubtractiveMtrrNumber = 0;\r
+ BaseAlignment = 0;\r
\r
//\r
// Get the optimal left subtraction solution.\r
//\r
if (BaseAddress != 0) {\r
+ SubtractiveBaseAddress = 0;\r
+ SubtractiveLength = 0;\r
//\r
// Get the MTRR number needed without left subtraction.\r
//\r
UINT32 EndIndex;\r
UINT32 DeltaCount;\r
\r
+ LengthRight = 0;\r
+ LengthLeft = 0;\r
Limit = BaseAddress + Length;\r
StartIndex = *Count;\r
EndIndex = *Count;\r
\r
MTRR_LIB_ASSERT_ALIGNED (BaseAddress, Length);\r
if (Type == CacheInvalid) {\r
+ ASSERT (Ranges != NULL);\r
for (Index = 0; Index < RangeCount; Index++) {\r
if (Ranges[Index].BaseAddress <= BaseAddress && BaseAddress < Ranges[Index].BaseAddress + Ranges[Index].Length) {\r
\r
UINT32 SubtractiveRight;\r
BOOLEAN UseLeastAlignment;\r
\r
+ Alignment = 0;\r
+\r
MtrrNumber = MtrrLibGetMtrrNumber (Ranges, RangeCount, VariableMtrr, *VariableMtrrCount,\r
BaseAddress, Length, Type, Alignment0, &SubtractiveLeft, &SubtractiveRight);\r
\r
if (((BaseAddress & ~MtrrValidAddressMask) != 0) || (Length & ~MtrrValidAddressMask) != 0) {\r
return RETURN_UNSUPPORTED;\r
}\r
+ OriginalVariableMtrrCount = 0;\r
+ VariableSettings = NULL;\r
\r
ZeroMem (&WorkingFixedSettings, sizeof (WorkingFixedSettings));\r
for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {\r
ASSERT (OriginalVariableMtrrCount - FreeVariableMtrrCount <= FirmwareVariableMtrrCount);\r
\r
//\r
- // Move MTRRs after the FirmwraeVariableMtrrCount position to beginning\r
+ // Move MTRRs after the FirmwareVariableMtrrCount position to beginning\r
//\r
- WorkingIndex = FirmwareVariableMtrrCount;\r
- for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {\r
- if (!OriginalVariableMtrr[Index].Valid) {\r
- //\r
- // Found an empty MTRR in WorkingIndex position\r
- //\r
- for (; WorkingIndex < OriginalVariableMtrrCount; WorkingIndex++) {\r
- if (OriginalVariableMtrr[WorkingIndex].Valid) {\r
- break;\r
+ if (FirmwareVariableMtrrCount < OriginalVariableMtrrCount) {\r
+ WorkingIndex = FirmwareVariableMtrrCount;\r
+ for (Index = 0; Index < FirmwareVariableMtrrCount; Index++) {\r
+ if (!OriginalVariableMtrr[Index].Valid) {\r
+ //\r
+ // Found an empty MTRR in WorkingIndex position\r
+ //\r
+ for (; WorkingIndex < OriginalVariableMtrrCount; WorkingIndex++) {\r
+ if (OriginalVariableMtrr[WorkingIndex].Valid) {\r
+ break;\r
+ }\r
}\r
- }\r
\r
- if (WorkingIndex != OriginalVariableMtrrCount) {\r
- CopyMem (&OriginalVariableMtrr[Index], &OriginalVariableMtrr[WorkingIndex], sizeof (VARIABLE_MTRR));\r
- VariableSettingModified[Index] = TRUE;\r
- VariableSettingModified[WorkingIndex] = TRUE;\r
- OriginalVariableMtrr[WorkingIndex].Valid = FALSE;\r
+ if (WorkingIndex != OriginalVariableMtrrCount) {\r
+ CopyMem (&OriginalVariableMtrr[Index], &OriginalVariableMtrr[WorkingIndex], sizeof (VARIABLE_MTRR));\r
+ VariableSettingModified[Index] = TRUE;\r
+ VariableSettingModified[WorkingIndex] = TRUE;\r
+ OriginalVariableMtrr[WorkingIndex].Valid = FALSE;\r
+ }\r
}\r
}\r
}\r
if (VariableSettingModified[Index]) {\r
if (OriginalVariableMtrr[Index].Valid) {\r
VariableSettings->Mtrr[Index].Base = (OriginalVariableMtrr[Index].BaseAddress & MtrrValidAddressMask) | (UINT8) OriginalVariableMtrr[Index].Type;\r
- VariableSettings->Mtrr[Index].Mask = (~(OriginalVariableMtrr[Index].Length - 1)) & MtrrValidAddressMask | BIT11;\r
+ VariableSettings->Mtrr[Index].Mask = ((~(OriginalVariableMtrr[Index].Length - 1)) & MtrrValidAddressMask) | BIT11;\r
} else {\r
VariableSettings->Mtrr[Index].Base = 0;\r
VariableSettings->Mtrr[Index].Mask = 0;\r
\r
//\r
// Write variable MTRRs\r
+ // When only fixed MTRRs were changed, below loop doesn't run\r
+ // because OriginalVariableMtrrCount equals to 0.\r
//\r
for (Index = 0; Index < OriginalVariableMtrrCount; Index++) {\r
if (VariableSettingModified[Index]) {\r
MtrrLibPostMtrrChange (&MtrrContext);\r
}\r
\r
- return Status;\r
+ return RETURN_SUCCESS;\r
}\r
\r
/**\r
\r
for (Index = 0; Index < VariableMtrrCount; Index++) {\r
AsmWriteMsr64 (\r
- MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1),\r
+ MSR_IA32_MTRR_PHYSBASE0 + (Index << 1),\r
VariableSettings->Mtrr[Index].Base\r
);\r
AsmWriteMsr64 (\r
- MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1,\r
+ MSR_IA32_MTRR_PHYSMASK0 + (Index << 1),\r
VariableSettings->Mtrr[Index].Mask\r
);\r
}\r
//\r
// Get MTRR_DEF_TYPE value\r
//\r
- MtrrSetting->MtrrDefType = AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE);\r
+ MtrrSetting->MtrrDefType = AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE);\r
\r
return MtrrSetting;\r
}\r
//\r
// Set MTRR_DEF_TYPE value\r
//\r
- AsmWriteMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType);\r
+ AsmWriteMsr64 (MSR_IA32_MTRR_DEF_TYPE, MtrrSetting->MtrrDefType);\r
\r
MtrrLibPostMtrrChangeEnableCache (&MtrrContext);\r
\r