/** @file\r
Code for Processor S3 restoration\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#define LEGACY_REGION_BASE (0xA0000 - LEGACY_REGION_SIZE)\r
\r
ACPI_CPU_DATA mAcpiCpuData;\r
-UINT32 mNumberToFinish;\r
+volatile UINT32 mNumberToFinish;\r
MP_CPU_EXCHANGE_INFO *mExchangeInfo;\r
BOOLEAN mRestoreSmmConfigurationInS3 = FALSE;\r
VOID *mGdtForAp = NULL;\r
\r
UINT8 *mApHltLoopCode = NULL;\r
UINT8 mApHltLoopCodeTemplate[] = {\r
- 0xFA, // cli\r
- 0xF4, // hlt\r
- 0xEB, 0xFC // jmp $-2\r
+ 0x8B, 0x44, 0x24, 0x04, // mov eax, dword ptr [esp+4]\r
+ 0xF0, 0xFF, 0x08, // lock dec dword ptr [eax]\r
+ 0xFA, // cli\r
+ 0xF4, // hlt\r
+ 0xEB, 0xFC // jmp $-2\r
};\r
\r
/**\r
case MemoryMapped:\r
AcquireSpinLock (mMemoryMappedLock);\r
MmioBitFieldWrite32 (\r
- RegisterTableEntry->Index,\r
+ (UINTN)(RegisterTableEntry->Index | LShiftU64 (RegisterTableEntry->HighIndex, 32)),\r
RegisterTableEntry->ValidBitStart,\r
RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,\r
(UINT32)RegisterTableEntry->Value\r
CPU_REGISTER_TABLE *RegisterTableList;\r
UINT32 InitApicId;\r
UINTN Index;\r
- UINT32 TopOfStack;\r
+ UINTN TopOfStack;\r
UINT8 Stack[128];\r
\r
ProgramVirtualWireMode ();\r
}\r
\r
//\r
- // Count down the number with lock mechanism.\r
- //\r
- InterlockedDecrement (&mNumberToFinish);\r
-\r
- //\r
- // Place AP into the safe code\r
+ // Place AP into the safe code, count down the number with lock mechanism in the safe code.\r
//\r
- TopOfStack = (UINT32) (UINTN) Stack + sizeof (Stack);\r
- TopOfStack &= ~(UINT32) (CPU_STACK_ALIGNMENT - 1);\r
+ TopOfStack = (UINTN) Stack + sizeof (Stack);\r
+ TopOfStack &= ~(UINTN) (CPU_STACK_ALIGNMENT - 1);\r
CopyMem ((VOID *) (UINTN) mApHltLoopCode, mApHltLoopCodeTemplate, sizeof (mApHltLoopCodeTemplate));\r
- TransferApToSafeState ((UINT32) (UINTN) mApHltLoopCode, TopOfStack);\r
+ TransferApToSafeState ((UINTN)mApHltLoopCode, TopOfStack, (UINTN)&mNumberToFinish);\r
}\r
\r
/**\r
\r
CopyMem (DestinationRegisterTableList, SourceRegisterTableList, NumberOfCpus * sizeof (CPU_REGISTER_TABLE));\r
for (Index = 0; Index < NumberOfCpus; Index++) {\r
- DestinationRegisterTableList[Index].RegisterTableEntry = AllocatePool (DestinationRegisterTableList[Index].AllocatedSize);\r
- ASSERT (DestinationRegisterTableList[Index].RegisterTableEntry != NULL);\r
- CopyMem (DestinationRegisterTableList[Index].RegisterTableEntry, SourceRegisterTableList[Index].RegisterTableEntry, DestinationRegisterTableList[Index].AllocatedSize);\r
- //\r
- // Go though all MSRs in register table to initialize MSR spin lock\r
- //\r
- RegisterTableEntry = DestinationRegisterTableList[Index].RegisterTableEntry;\r
- for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; Index1++, RegisterTableEntry++) {\r
- if ((RegisterTableEntry->RegisterType == Msr) && (RegisterTableEntry->ValidBitLength < 64)) {\r
- //\r
- // Initialize MSR spin lock only for those MSRs need bit field writing\r
- //\r
- InitMsrSpinLockByIndex (RegisterTableEntry->Index);\r
+ if (DestinationRegisterTableList[Index].AllocatedSize != 0) {\r
+ RegisterTableEntry = AllocateCopyPool (\r
+ DestinationRegisterTableList[Index].AllocatedSize,\r
+ (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry\r
+ );\r
+ ASSERT (RegisterTableEntry != NULL);\r
+ DestinationRegisterTableList[Index].RegisterTableEntry = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry;\r
+ //\r
+ // Go though all MSRs in register table to initialize MSR spin lock\r
+ //\r
+ for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; Index1++, RegisterTableEntry++) {\r
+ if ((RegisterTableEntry->RegisterType == Msr) && (RegisterTableEntry->ValidBitLength < 64)) {\r
+ //\r
+ // Initialize MSR spin lock only for those MSRs need bit field writing\r
+ //\r
+ InitMsrSpinLockByIndex (RegisterTableEntry->Index);\r
+ }\r
}\r
}\r
}\r