UefiCpuPkg: Clean up source files

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / MpService.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 0d3223d714459fa7e616509513272c98ed30cd0f..9cf508a5c7108724e0b30198a731d4867bd0bb11 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -1,7 +1,7 @@
 /** @file\r
 SMM MP service implementation\r
 \r
-Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials\r
@@ -199,7 +199,7 @@ AllCpusInSmmWithExceptions (
 \r
 /**\r
   Has OS enabled Lmce in the MSR_IA32_MCG_EXT_CTL\r
-  \r
+\r
   @retval TRUE     Os enable lmce.\r
   @retval FALSE    Os not enable lmce.\r
 \r
@@ -228,9 +228,9 @@ IsLmceOsEnabled (
 }\r
 \r
 /**\r
-  Return if Local machine check exception signaled. \r
+  Return if Local machine check exception signaled.\r
 \r
-  Indicates (when set) that a local machine check exception was generated. This indicates that the current machine-check event was \r
+  Indicates (when set) that a local machine check exception was generated. This indicates that the current machine-check event was\r
   delivered to only the logical processor.\r
 \r
   @retval TRUE    LMCE was signaled.\r
@@ -891,7 +891,7 @@ Gen4GPageTable (
     if ((Pte[0] & IA32_PG_PS) == 0) {\r
       // 4K-page entries are already mapped. Just hide the first one anyway.\r
       Pte = (UINT64*)(UINTN)(Pte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));\r
-      Pte[0] &= ~IA32_PG_P; // Hide page 0\r
+      Pte[0] &= ~(UINT64)IA32_PG_P; // Hide page 0\r
     } else {\r
       // Create 4K-page entries\r
       Pages = (UINTN)AllocatePageTableMemory (1);\r
@@ -1046,7 +1046,7 @@ CpuSmmDebugEntry (
   )\r
 {\r
   SMRAM_SAVE_STATE_MAP *CpuSaveState;\r
-  \r
+\r
   if (FeaturePcdGet (PcdCpuSmmDebug)) {\r
     ASSERT(CpuIndex < mMaxNumberOfCpus);\r
     CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];\r