/** @file\r
Provides services to access SMRAM Save State Map\r
\r
-Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
///\r
/// Variables from SMI Handler\r
///\r
-extern UINT32 gSmbase;\r
-extern volatile UINT32 gSmiStack;\r
-extern UINT32 gSmiCr3;\r
-extern volatile UINT8 gcSmiHandlerTemplate[];\r
-extern CONST UINT16 gcSmiHandlerSize;\r
+X86_ASSEMBLY_PATCH_LABEL gPatchSmbase;\r
+extern volatile UINT32 gSmiStack;\r
+extern UINT32 gSmiCr3;\r
+extern volatile UINT8 gcSmiHandlerTemplate[];\r
+extern CONST UINT16 gcSmiHandlerSize;\r
\r
//\r
// Variables used by SMI Handler\r
//\r
// Initialize PROCESSOR_SMM_DESCRIPTOR\r
//\r
- Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + SMM_PSD_OFFSET);\r
+ Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + SMM_PSD_OFFSET);\r
CopyMem (Psd, &gcPsd, sizeof (gcPsd));\r
Psd->SmmGdtPtr = (UINT64)GdtBase;\r
Psd->SmmGdtSize = (UINT32)GdtSize;\r
//\r
gSmiStack = (UINT32)((UINTN)SmiStack + StackSize - sizeof (UINTN));\r
gSmiCr3 = Cr3;\r
- gSmbase = SmBase;\r
+ PatchInstructionX86 (gPatchSmbase, SmBase, 4);\r
gSmiHandlerIdtr.Base = IdtBase;\r
gSmiHandlerIdtr.Limit = (UINT16)(IdtSize - 1);\r
\r
// Copy template to CPU specific SMI handler location\r
//\r
CopyMem (\r
- (VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),\r
+ (VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),\r
(VOID*)gcSmiHandlerTemplate,\r
gcSmiHandlerSize\r
);\r