]> git.proxmox.com Git - mirror_edk2.git/blobdiff - UefiCpuPkg/UefiCpuPkg.uni
OvmfPkg/Csm/LegacyBiosDxe: Update to make it build for OVMF
[mirror_edk2.git] / UefiCpuPkg / UefiCpuPkg.uni
index a7073b10c80d0f92cb1a1d65f741257353dd1919..80af4fc1d20014ad867263aa8e93cc7bccf0dcf9 100644 (file)
@@ -5,13 +5,7 @@
 //\r
 // Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
 //\r
-// This program and the accompanying materials are licensed and made available under\r
-// the terms and conditions of the BSD License which accompanies this distribution.\r
-// The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-//\r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+// SPDX-License-Identifier: BSD-2-Clause-Patent\r
 //\r
 // **/\r
 \r
 \r
 #string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmStackSize_HELP  #language en-US "Specifies stack size in bytes for each processor in SMM."\r
 \r
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmShadowStackSize_PROMPT   #language en-US "Processor shadow stack size in SMM."\r
+\r
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmShadowStackSize_HELP   #language en-US "Specifies shadow stack size in bytes for each processor in SMM."\r
+\r
 #string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmApSyncTimeout_PROMPT  #language en-US "AP synchronization timeout value in SMM"\r
 \r
 #string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmApSyncTimeout_HELP  #language en-US "Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM."\r
                                                                                         "Processor trace is enabled through set BIT44(CPU_FEATURE_PROC_TRACE) in PcdCpuFeaturesSetting.<BR><BR>\n"\r
                                                                                         "This PCD is ignored if CPU processor trace is disabled.<BR><BR>\n"\r
                                                                                         "Default value is 0 which means single range output scheme will be used if CPU processor trace is enabled.<BR>\n"\r
-                                                                                        "0 - Single Range output scheme.<BR>\n"\r\r
-                                                                                        "1 - ToPA(Table of physical address) scheme.<BR>\n"\r
\ No newline at end of file
+                                                                                        "0 - Single Range output scheme.<BR>\n"\r
+                                                                                        "1 - ToPA(Table of physical address) scheme.<BR>\n"\r
+\r
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_PROMPT  #language en-US "Specify exception vectors which need switching stack."\r
+\r
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuStackSwitchExceptionList_HELP  #language en-US "List of exception vectors which need switching stack.\n"\r
+                                                                                           "This PCD will only take into effect if PcdCpuStackGuard is enabled.n"\r
+                                                                                           "By default exception #DD(8), #PF(14) are supported.n"\r
+\r
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_PROMPT  #language en-US "Specify size of good stack of exception which need switching stack."\r
+\r
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuKnownGoodStackSize_HELP  #language en-US "Size of good stack for an exception.\n"\r
+                                                                                     "This PCD will only take into effect if PcdCpuStackGuard is enabled.\n"\r
+\r