UefiPayloadPkg: Enhance UEFI payload for coreboot and Slim Bootloader

[mirror_edk2.git] / UefiPayloadPkg / SecCore / SecCore.inf

diff --git a/UefiPayloadPkg/SecCore/SecCore.inf b/UefiPayloadPkg/SecCore/SecCore.inf
new file mode 100644 (file)
index 0000000..82ca7f5
--- /dev/null
+++ b/UefiPayloadPkg/SecCore/SecCore.inf
@@ -0,0 +1,58 @@
+## @file\r
+# This is the first module taking control from the coreboot.\r
+#\r
+#  Copyright (c) 2013 - 2019, Intel Corporation. All rights reserved.<BR>\r
+#\r
+#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+#\r
+##\r
+\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = SecCore\r
+  FILE_GUID                      = BA7BE337-6CFB-4dbb-B26C-21EC2FC16073\r
+  MODULE_TYPE                    = SEC\r
+  VERSION_STRING                 = 1.0\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC\r
+#\r
+\r
+[Sources]\r
+  SecMain.c\r
+  SecMain.h\r
+  FindPeiCore.c\r
+\r
+[Sources.IA32]\r
+  Ia32/Stack.nasm\r
+  Ia32/SecEntry.nasm\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+  MdeModulePkg/MdeModulePkg.dec\r
+  UefiCpuPkg/UefiCpuPkg.dec\r
+  UefiPayloadPkg/UefiPayloadPkg.dec\r
+\r
+[LibraryClasses]\r
+  BaseMemoryLib\r
+  DebugLib\r
+  BaseLib\r
+  PcdLib\r
+  DebugAgentLib\r
+  UefiCpuLib\r
+  PeCoffGetEntryPointLib\r
+  PeCoffExtraActionLib\r
+\r
+[Ppis]\r
+  gEfiSecPlatformInformationPpiGuid             # PPI ALWAYS_PRODUCED\r
+  gEfiTemporaryRamSupportPpiGuid                # PPI ALWAYS_PRODUCED\r
+  gEfiPayLoadHobBasePpiGuid                     # PPI ALWAYS_PRODUCED\r
+\r
+[Pcd]\r
+  gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemBase\r
+  gUefiPayloadPkgTokenSpaceGuid.PcdPayloadFdMemSize\r
+  gUefiPayloadPkgTokenSpaceGuid.PcdPayloadStackTop\r