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[mirror_edk2.git] / Vlv2DeviceRefCodePkg / ValleyView2Soc / NorthCluster / Include / Protocol / VlvPlatformPolicy.h

diff --git a/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/Protocol/VlvPlatformPolicy.h b/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/Protocol/VlvPlatformPolicy.h
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--- /dev/null
+++ b/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/Protocol/VlvPlatformPolicy.h
@@ -0,0 +1,111 @@
+\r
+/*++\r
+\r
+Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved\r
+\r
+  This program and the accompanying materials are licensed and made available under\r
+  the terms and conditions of the BSD License that accompanies this distribution.\r
+  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php.\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+\r
+Module Name:\r
+\r
+  VlvPlatformPolicy.h\r
+\r
+Abstract:\r
+\r
+  Interface definition details between MCH and platform drivers during DXE phase.\r
+\r
+--*/\r
+\r
+#ifndef _VLV_PLATFORM_POLICY_H_\r
+#define _VLV_PLATFORM_POLICY_H_\r
+\r
+//\r
+// VLV Policy provided by platform for DXE phase {5BAB88BA-E0E2-4674-B6AD-B812F6881CD6}\r
+//\r
+#define DXE_VLV_PLATFORM_POLICY_GUID \\r
+  {0x5bab88ba, 0xe0e2, 0x4674, 0xb6, 0xad, 0xb8, 0x12, 0xf6, 0x88, 0x1c, 0xd6}\r
+\r
+//\r
+// Extern the GUID for protocol users.\r
+//\r
+extern EFI_GUID gDxeVlvPlatformPolicyGuid;\r
+\r
+//\r
+// Protocol revision number\r
+// Any backwards compatible changes to this protocol will result in an update in the revision number\r
+// Major changes will require publication of a new protocol\r
+//\r
+#define DXE_VLV_PLATFORM_POLICY_PROTOCOL_REVISION 0\r
+\r
+\r
+typedef struct {\r
+  UINT8  PFITStatus;\r
+  UINT8  IgdTheramlSupport;\r
+  UINT8  ALSEnabled;\r
+  UINT8  LidStatus;\r
+} IGD_PANEL_FEATURES;\r
+\r
+typedef struct {\r
+  UINT8   Reserved00;                     \r
+  UINT8   Reserved01;                     \r
+  UINT16  Reserved02;  \r
+  UINT16  Reserved03; \r
+  UINT16  Reserved04; \r
+  UINT16  Reserved05;  \r
+  UINT16  Reserved06;  \r
+  UINT16  Reserved07; \r
+  UINT16  Reserved08; \r
+  UINT16  Reserved09;  \r
+  UINT16  Reserved0A; \r
+  UINT16  Reserved0B;\r
+  UINT16  Reserved0C;\r
+  UINT16  Reserved0D;\r
+  UINT8   Reserved0E;\r
+  UINT8   Reserved0F;\r
+  UINT32  Reserved10;\r
+  UINT32  Reserved11;\r
+  UINT32  Reserved12;\r
+  UINT32  Reserved13;\r
+  UINT32  Reserved14;\r
+  UINT8   Reserved15;\r
+  UINT8   Reserved16;\r
+} DPTF_SETTINGS;\r
+\r
+//\r
+// MCH DXE Platform Policiy ==================================================\r
+//\r
+\r
+#define NO_AUDIO   0\r
+#define HD_AUDIO   1\r
+#define LPE_AUDIO  2\r
+\r
+typedef struct _DXE_VLV_PLATFORM_POLICY_PROTOCOL {\r
+  UINT8                   Revision;\r
+  IGD_PANEL_FEATURES      IgdPanelFeatures;\r
+  DPTF_SETTINGS           Reserved;\r
+  UINT8                   GraphicReserve00;\r
+  UINT8                   GraphicsPerfAnalyzers;\r
+  UINT8                   PwmReserved00;\r
+  UINT8                   PwmReserved01;  \r
+  UINT8                   PmSupport;\r
+  UINT8                   GraphicReserve01;\r
+  UINT8                   GfxPause;\r
+  UINT8                   GraphicsFreqReq;\r
+  UINT8                   GraphicReserve03;\r
+  UINT8                   GraphicReserve02;\r
+  UINT8                   GraphicReserve04;\r
+  UINT8                   PavpMode;\r
+  UINT8                   GraphicReserve05;\r
+  UINT8                   UlClockGating;\r
+  UINT8                   IdleReserve;\r
+  UINT8                   AudioTypeSupport;\r
+  UINT8                   GraphicReserve06;\r
+} DXE_VLV_PLATFORM_POLICY_PROTOCOL;\r
+\r
+#endif\r