+++ /dev/null
-/**\r
-**/\r
-/**\r
-\r
-Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved\r
-\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-\r
-\r
- @file\r
- PchS3Support.h\r
-\r
- @brief\r
- This file defines the PCH S3 support Protocol.\r
-\r
-**/\r
-#ifndef _PCH_S3_SUPPORT_PROTOCOL_H_\r
-#define _PCH_S3_SUPPORT_PROTOCOL_H_\r
-\r
-#ifndef ECP_FLAG\r
-#include <Pi/PiS3BootScript.h>\r
-#endif\r
-\r
-#define EFI_PCH_S3_SUPPORT_PROTOCOL_GUID \\r
- { \\r
- 0xe287d20b, 0xd897, 0x4e1e, 0xa5, 0xd9, 0x97, 0x77, 0x63, 0x93, 0x6a, 0x4 \\r
- }\r
-\r
-#include <Protocol/PchPlatformPolicy.h>\r
-\r
-///\r
-/// Extern the GUID for protocol users.\r
-///\r
-extern EFI_GUID gEfiPchS3SupportProtocolGuid;\r
-\r
-///\r
-/// Forward reference for ANSI C compatibility\r
-///\r
-typedef struct _EFI_PCH_S3_SUPPORT_PROTOCOL EFI_PCH_S3_SUPPORT_PROTOCOL;\r
-\r
-typedef enum {\r
- PchS3ItemTypeSendCodecCommand,\r
- PchS3ItemTypePollStatus,\r
- PchS3ItemTypeInitPcieRootPortDownstream,\r
- PchS3ItemTypePcieSetPm,\r
- PchS3ItemTypePmTimerStall,\r
- PchS3ItemTypeMax\r
-} EFI_PCH_S3_DISPATCH_ITEM_TYPE;\r
-\r
-///\r
-/// It's better not to use pointer here because the size of pointer in DXE is 8, but it's 4 in PEI\r
-/// plug 4 to ParameterSize in PEIM if you really need it\r
-///\r
-typedef struct {\r
- UINT32 HdaBar;\r
- UINT32 CodecCmdData;\r
-} EFI_PCH_S3_PARAMETER_SEND_CODEC_COMMAND;\r
-\r
-typedef struct {\r
- UINT64 MmioAddress;\r
- EFI_BOOT_SCRIPT_WIDTH Width;\r
- UINT64 Mask;\r
- UINT64 Value;\r
- UINT32 Timeout; // us\r
-} EFI_PCH_S3_PARAMETER_POLL_STATUS;\r
-\r
-typedef struct {\r
- UINT8 RootPortBus;\r
- UINT8 RootPortDevice;\r
- UINT8 RootPortFunc;\r
- UINT8 TempBusNumberMin;\r
- UINT8 TempBusNumberMax;\r
-} EFI_PCH_S3_PARAMETER_INIT_PCIE_ROOT_PORT_DOWNSTREAM;\r
-\r
-typedef struct {\r
- UINT8 RootPortBus;\r
- UINT8 RootPortDevice;\r
- UINT8 RootPortFunc;\r
- PCH_PCI_EXPRESS_ASPM_CONTROL RootPortAspm;\r
- UINT8 NumOfDevAspmOverride;\r
- UINT32 DevAspmOverrideAddr;\r
- UINT8 TempBusNumberMin;\r
- UINT8 TempBusNumberMax;\r
- UINT8 NumOfDevLtrOverride;\r
- UINT32 DevLtrOverrideAddr;\r
-} EFI_PCH_S3_PARAMETER_PCIE_SET_PM;\r
-\r
-typedef struct {\r
- UINT32 DelayTime; // us\r
-} EFI_PCH_S3_PARAMETER_PM_TIMER_STALL;\r
-\r
-typedef struct {\r
- EFI_PCH_S3_DISPATCH_ITEM_TYPE Type;\r
- VOID *Parameter;\r
-} EFI_PCH_S3_DISPATCH_ITEM;\r
-\r
-///\r
-/// Member functions\r
-///\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_PCH_S3_SUPPORT_SET_S3_DISPATCH_ITEM) (\r
- IN EFI_PCH_S3_SUPPORT_PROTOCOL * This,\r
- IN EFI_PCH_S3_DISPATCH_ITEM * DispatchItem,\r
- OUT EFI_PHYSICAL_ADDRESS * S3DispatchEntryPoint\r
- );\r
-\r
-/**\r
-\r
- @brief\r
- Set an item to be dispatched at S3 resume time. At the same time, the entry point\r
- of the PCH S3 support image is returned to be used in subsequent boot script save\r
- call\r
-\r
- @param[in] This Pointer to the protocol instance.\r
- @param[in] DispatchItem The item to be dispatched.\r
- @param[in] S3DispatchEntryPoint The entry point of the PCH S3 support image.\r
-\r
- @retval EFI_STATUS Successfully completed.\r
- @retval EFI_OUT_OF_RESOURCES Out of resources.\r
-\r
-**/\r
-\r
-///\r
-/// Protocol definition\r
-///\r
-struct _EFI_PCH_S3_SUPPORT_PROTOCOL {\r
- EFI_PCH_S3_SUPPORT_SET_S3_DISPATCH_ITEM SetDispatchItem;\r
-};\r
-\r
-#endif\r