+++ /dev/null
-/*++\r
-\r
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
- \r\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
- \r\r
-\r
-\r
-Module Name:\r
-\r
- EfiRegTableLib.c\r
-\r
-Abstract:\r
-\r
- Lib function for table driven register initialization.\r
-\r
-Revision History\r
-\r
---*/\r
-\r
-#include <Library/EfiRegTableLib.h>\r
-#include <Library/S3BootScriptLib.h>\r
-\r
-//\r
-// Local Functions\r
-//\r
-\r
-/**\r
- Local worker function to process PCI_WRITE table entries. Performs write and\r
- may also call BootScriptSave protocol if indicated in the Entry flags\r
-\r
- @param Entry A pointer to the PCI_WRITE entry to process\r
-\r
- @param PciRootBridgeIo A pointer to the instance of PciRootBridgeIo that is used\r
- when processing the entry.\r
-\r
- @retval Nothing.\r
-\r
-**/\r
-STATIC\r
-VOID\r
-PciWrite (\r
- EFI_REG_TABLE_PCI_WRITE *Entry,\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo\r
- )\r
-{\r
- EFI_STATUS Status;\r
-\r
- Status = PciRootBridgeIo->Pci.Write (\r
- PciRootBridgeIo,\r
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- (UINT64) Entry->PciAddress,\r
- 1,\r
- &Entry->Data\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- if (OPCODE_FLAGS (Entry->OpCode) & OPCODE_FLAG_S3SAVE) {\r
- Status = S3BootScriptSavePciCfgWrite (\r
- (EFI_BOOT_SCRIPT_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- (UINT64) Entry->PciAddress,\r
- 1,\r
- &Entry->Data\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-}\r
-\r
-/**\r
- Local worker function to process PCI_READ_MODIFY_WRITE table entries.\r
- Performs RMW write and may also call BootScriptSave protocol if indicated in\r
- the Entry flags.\r
-\r
- @param Entry A pointer to the PCI_READ_MODIFY_WRITE entry to process.\r
-\r
- @param PciRootBridgeIo A pointer to the instance of PciRootBridgeIo that is used\r
- when processing the entry.\r
-\r
- @retval Nothing.\r
-\r
-**/\r
-STATIC\r
-VOID\r
-PciReadModifyWrite (\r
- EFI_REG_TABLE_PCI_READ_MODIFY_WRITE *Entry,\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINT32 TempData;\r
-\r
- Status = PciRootBridgeIo->Pci.Read (\r
- PciRootBridgeIo,\r
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- (UINT64) Entry->PciAddress,\r
- 1,\r
- &TempData\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Entry->OrMask &= Entry->AndMask;\r
- TempData &= ~Entry->AndMask;\r
- TempData |= Entry->OrMask;\r
-\r
- Status = PciRootBridgeIo->Pci.Write (\r
- PciRootBridgeIo,\r
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- (UINT64) Entry->PciAddress,\r
- 1,\r
- &TempData\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- if (OPCODE_FLAGS (Entry->OpCode) & OPCODE_FLAG_S3SAVE) {\r
- Status = S3BootScriptSavePciCfgReadWrite (\r
- (EFI_BOOT_SCRIPT_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- (UINT64) Entry->PciAddress,\r
- &Entry->OrMask,\r
- &Entry->AndMask\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-}\r
-\r
-/**\r
- Local worker function to process MEM_READ_MODIFY_WRITE table entries.\r
- Performs RMW write and may also call BootScriptSave protocol if indicated in\r
- the Entry flags.\r
-\r
- @param Entry A pointer to the MEM_READ_MODIFY_WRITE entry to process.\r
-\r
- @param PciRootBridgeIo A pointer to the instance of PciRootBridgeIo that is used\r
- when processing the entry.\r
-\r
- @retval Nothing.\r
-\r
-**/\r
-STATIC\r
-VOID\r
-MemReadModifyWrite (\r
- EFI_REG_TABLE_MEM_READ_MODIFY_WRITE *Entry,\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINT32 TempData;\r
-\r
- Status = PciRootBridgeIo->Mem.Read (\r
- PciRootBridgeIo,\r
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- (UINT64) Entry->MemAddress,\r
- 1,\r
- &TempData\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Entry->OrMask &= Entry->AndMask;\r
- TempData &= ~Entry->AndMask;\r
- TempData |= Entry->OrMask;\r
-\r
- Status = PciRootBridgeIo->Mem.Write (\r
- PciRootBridgeIo,\r
- (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- (UINT64) Entry->MemAddress,\r
- 1,\r
- &TempData\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- if (OPCODE_FLAGS (Entry->OpCode) & OPCODE_FLAG_S3SAVE) {\r
- Status = S3BootScriptSaveMemReadWrite (\r
- (EFI_BOOT_SCRIPT_WIDTH) (OPCODE_EXTRA_DATA (Entry->OpCode)),\r
- Entry->MemAddress,\r
- &Entry->OrMask,\r
- &Entry->AndMask\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-}\r
-\r
-//\r
-// Exported functions\r
-//\r
-\r
-/**\r
- Processes register table assuming which may contain PCI, IO, MEM, and STALL\r
- entries.\r
-\r
- No parameter checking is done so the caller must be careful about omitting\r
- values for PciRootBridgeIo or CpuIo parameters. If the regtable does\r
- not contain any PCI accesses, it is safe to omit the PciRootBridgeIo (supply\r
- NULL). If the regtable does not contain any IO or Mem entries, it is safe to\r
- omit the CpuIo (supply NULL).\r
-\r
- The RegTableEntry parameter is not checked, but is required.\r
-\r
- gBS is assumed to have been defined and is used when processing stalls.\r
-\r
- The function processes each entry sequentially until an OP_TERMINATE_TABLE\r
- entry is encountered.\r
-\r
- @param RegTableEntry A pointer to the register table to process\r
-\r
- @param PciRootBridgeIo A pointer to the instance of PciRootBridgeIo that is used\r
- when processing PCI table entries\r
-\r
- @param CpuIo A pointer to the instance of CpuIo that is used when processing IO and\r
- MEM table entries\r
-\r
- @retval Nothing.\r
-\r
-**/\r
-VOID\r
-ProcessRegTablePci (\r
- EFI_REG_TABLE *RegTableEntry,\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
- EFI_CPU_IO_PROTOCOL *CpuIo\r
- )\r
-{\r
- while (OPCODE_BASE (RegTableEntry->Generic.OpCode) != OP_TERMINATE_TABLE) {\r
- switch (OPCODE_BASE (RegTableEntry->Generic.OpCode)) {\r
- case OP_PCI_WRITE:\r
- PciWrite ((EFI_REG_TABLE_PCI_WRITE *) RegTableEntry, PciRootBridgeIo);\r
- break;\r
-\r
- case OP_PCI_READ_MODIFY_WRITE:\r
- PciReadModifyWrite ((EFI_REG_TABLE_PCI_READ_MODIFY_WRITE *) RegTableEntry, PciRootBridgeIo);\r
- break;\r
-\r
- case OP_MEM_READ_MODIFY_WRITE:\r
- MemReadModifyWrite ((EFI_REG_TABLE_MEM_READ_MODIFY_WRITE *) RegTableEntry, PciRootBridgeIo);\r
- break;\r
-\r
- default:\r
- DEBUG ((EFI_D_ERROR, "RegTable ERROR: Unknown RegTable OpCode (%x)\n", OPCODE_BASE (RegTableEntry->Generic.OpCode)));\r
- ASSERT (0);\r
- break;\r
- }\r
-\r
- RegTableEntry++;\r
- }\r
-}\r
-\r
-/**\r
- Processes register table assuming which may contain IO, MEM, and STALL\r
- entries, but must NOT contain any PCI entries. Any PCI entries cause an\r
- ASSERT in a DEBUG build and are skipped in a free build.\r
-\r
- No parameter checking is done. Both RegTableEntry and CpuIo parameters are\r
- required.\r
-\r
- gBS is assumed to have been defined and is used when processing stalls.\r
-\r
- The function processes each entry sequentially until an OP_TERMINATE_TABLE\r
- entry is encountered.\r
-\r
- @param RegTableEntry A pointer to the register table to process\r
-\r
- @param CpuIo A pointer to the instance of CpuIo that is used when processing IO and\r
- MEM table entries\r
-\r
- @retval Nothing.\r
-\r
-**/\r
-VOID\r
-ProcessRegTableCpu (\r
- EFI_REG_TABLE *RegTableEntry,\r
- EFI_CPU_IO_PROTOCOL *CpuIo\r
- )\r
-{\r
- while (OPCODE_BASE (RegTableEntry->Generic.OpCode) != OP_TERMINATE_TABLE) {\r
- switch (OPCODE_BASE (RegTableEntry->Generic.OpCode)) {\r
- default:\r
- DEBUG ((EFI_D_ERROR, "RegTable ERROR: Unknown RegTable OpCode (%x)\n", OPCODE_BASE (RegTableEntry->Generic.OpCode)));\r
- ASSERT (0);\r
- break;\r
- }\r
-\r
- RegTableEntry++;\r
- }\r
-}\r
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