+++ /dev/null
-/** @file\r
-\r
- Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>\r
- \r
-\r
- SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
- \r
-\r
-\r
-Module Name:\r
-\r
-\r
- Platform.c\r
-\r
-Abstract:\r
-\r
- Platform Initialization Driver.\r
-\r
-\r
---*/\r
-\r
-#include "PlatformDxe.h"\r
-#include "Platform.h"\r
-#include "PchCommonDefinitions.h"\r
-#include <Protocol/UsbPolicy.h>\r
-#include <Protocol/PchPlatformPolicy.h>\r
-#include <Protocol/TpmMp.h>\r
-#include <Protocol/CpuIo2.h>\r
-#include <Library/S3BootScriptLib.h>\r
-#include <Guid/PciLanInfo.h>\r
-#include <Guid/ItkData.h>\r
-#include <Library/PciLib.h>\r
-#include <PlatformBootMode.h>\r
-#include <Guid/EventGroup.h>\r
-#include <Guid/Vlv2Variable.h>\r
-#include <Protocol/GlobalNvsArea.h>\r
-#include <Protocol/IgdOpRegion.h>\r
-#include <Library/PcdLib.h>\r
-#include <Protocol/VariableLock.h>\r
-\r
-\r
-//\r
-// VLV2 GPIO GROUP OFFSET\r
-//\r
-#define GPIO_SCORE_OFFSET 0x0000\r
-#define GPIO_NCORE_OFFSET 0x1000\r
-#define GPIO_SSUS_OFFSET 0x2000\r
-\r
-typedef struct {\r
- UINT32 offset;\r
- UINT32 val;\r
-} CFIO_PNP_INIT;\r
-\r
-GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service[] =\r
-{\r
-// Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset\r
- GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS ,NA ,F0 , , ,NONE ,0x47),\r
- GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS ,NA ,F0 , , ,NONE ,0x41),\r
-};\r
-\r
-\r
-EFI_GUID mSystemHiiExportDatabase = EFI_HII_EXPORT_DATABASE_GUID;\r
-EFI_GUID mPlatformDriverGuid = EFI_PLATFORM_DRIVER_GUID;\r
-SYSTEM_CONFIGURATION mSystemConfiguration;\r
-SYSTEM_PASSWORDS mSystemPassword;\r
-EFI_HANDLE mImageHandle;\r
-BOOLEAN mMfgMode = FALSE;\r
-VOID *mDxePlatformStringPack;\r
-UINT32 mPlatformBootMode = PLATFORM_NORMAL_MODE;\r
-extern CHAR16 gItkDataVarName[];\r
-\r
-\r
-EFI_PLATFORM_INFO_HOB mPlatformInfo;\r
-EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo;\r
-EFI_EVENT mReadyToBootEvent;\r
-\r
-UINT8 mSmbusRsvdAddresses[] = PLATFORM_SMBUS_RSVD_ADDRESSES;\r
-UINT8 mNumberSmbusAddress = sizeof( mSmbusRsvdAddresses ) / sizeof( mSmbusRsvdAddresses[0] );\r
-UINT32 mSubsystemVidDid;\r
-UINT32 mSubsystemAudioVidDid;\r
-\r
-UINTN mPciLanCount = 0;\r
-VOID *mPciLanInfo = NULL;\r
-UINTN SpiBase;\r
-\r
-static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface = {\r
- ProgramToneFrequency,\r
- GenerateBeepTone\r
-};\r
-\r
-EFI_USB_POLICY_PROTOCOL mUsbPolicyData = {0};\r
-\r
-\r
-CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service[] =\r
-{\r
- {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0\r
- {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0\r
- {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0\r
- {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0\r
- {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0\r
- {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0\r
- {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0\r
- {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0\r
- {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0\r
- {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val\r
- {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val\r
- {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val\r
- {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val\r
- {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val\r
- {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val\r
- {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val\r
- {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val\r
- {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val\r
-};\r
-\r
-VOID\r
-EfiOrMem (\r
- IN VOID *Destination,\r
- IN VOID *Source,\r
- IN UINTN Length\r
- );\r
-\r
-#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
-STATIC\r
-VOID\r
-InitFirmwareId();\r
-#endif\r
-\r
-\r
-VOID\r
-InitializeClockRouting(\r
- );\r
-\r
-VOID\r
-InitializeSlotInfo (\r
- );\r
-\r
-#if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r
-VOID\r
-InitializeSensorInfoVariable (\r
- );\r
-#endif\r
-\r
-VOID\r
-InitTcoReset (\r
- );\r
-\r
-VOID\r
-InitExI ();\r
-\r
-VOID\r
-InitItk();\r
-\r
-VOID\r
-InitPlatformBootMode();\r
-\r
-VOID\r
-InitMfgAndConfigModeStateVar();\r
-\r
-VOID\r
-InitPchPlatformPolicy (\r
- IN EFI_PLATFORM_INFO_HOB *PlatformInfo\r
- );\r
-\r
-VOID\r
-InitVlvPlatformPolicy (\r
- );\r
-\r
-VOID\r
-InitSioPlatformPolicy(\r
- );\r
-\r
-VOID\r
-PchInitBeforeBoot(\r
- );\r
-\r
-VOID\r
-UpdateDVMTSetup(\r
- );\r
-\r
-VOID\r
-InitPlatformUsbPolicy (\r
- VOID\r
- );\r
-\r
-VOID\r
-InitRC6Policy(\r
- VOID\r
- );\r
-\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-SaveSetupRecoveryVar(\r
- VOID\r
- )\r
-{\r
- EFI_STATUS Status = EFI_SUCCESS;\r
- UINTN SizeOfNvStore = 0;\r
- UINTN SizeOfSetupVar = 0;\r
- SYSTEM_CONFIGURATION *SetupData = NULL;\r
- SYSTEM_CONFIGURATION *RecoveryNvData = NULL;\r
- EDKII_VARIABLE_LOCK_PROTOCOL *VariableLock = NULL;\r
-\r
-\r
- DEBUG ((EFI_D_INFO, "SaveSetupRecoveryVar() Entry \n"));\r
- SizeOfNvStore = sizeof(SYSTEM_CONFIGURATION);\r
- RecoveryNvData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r
- if (NULL == RecoveryNvData) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto Exit; \r
- }\r
- \r
- Status = gRT->GetVariable(\r
- L"SetupRecovery",\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &SizeOfNvStore,\r
- RecoveryNvData\r
- );\r
- \r
- if (EFI_ERROR (Status)) {\r
- // Don't find the "SetupRecovery" variable.\r
- // have to copy "Setup" variable to "SetupRecovery" variable.\r
- SetupData = AllocateZeroPool (sizeof(SYSTEM_CONFIGURATION));\r
- if (NULL == SetupData) {\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto Exit; \r
- }\r
- SizeOfSetupVar = sizeof(SYSTEM_CONFIGURATION);\r
- Status = gRT->GetVariable(\r
- NORMAL_SETUP_NAME,\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &SizeOfSetupVar,\r
- SetupData\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- \r
- Status = gRT->SetVariable (\r
- L"SetupRecovery",\r
- &gEfiNormalSetupGuid,\r
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
- sizeof(SYSTEM_CONFIGURATION),\r
- SetupData\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- Status = gBS->LocateProtocol (&gEdkiiVariableLockProtocolGuid, NULL, (VOID **) &VariableLock);\r
- if (!EFI_ERROR (Status)) {\r
- Status = VariableLock->RequestToLock (VariableLock, L"SetupRecovery", &gEfiNormalSetupGuid);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
- \r
- }\r
-\r
-Exit:\r
- if (RecoveryNvData)\r
- FreePool (RecoveryNvData);\r
- if (SetupData)\r
- FreePool (SetupData);\r
- \r
- return Status;\r
- \r
-}\r
-\r
-\r
-VOID\r
-TristateLpcGpioConfig (\r
- IN UINT32 Gpio_Mmio_Offset,\r
- IN UINT32 Gpio_Pin_Num,\r
- GPIO_CONF_PAD_INIT* Gpio_Conf_Data\r
- )\r
-\r
-{\r
- UINT32 index;\r
- UINT32 mmio_conf0;\r
- UINT32 mmio_padval;\r
- PAD_CONF0 conf0_val;\r
- PAD_VAL pad_val;\r
-\r
- //\r
- // GPIO WELL -- Memory base registers\r
- //\r
-\r
- //\r
- // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r
- // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900\r
- //\r
-\r
- for(index=0; index < Gpio_Pin_Num; index++)\r
- {\r
- //\r
- // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index.\r
- //\r
- mmio_conf0 = IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_CONF0 + Gpio_Conf_Data[index].offset * 16;\r
- mmio_padval= IO_BASE_ADDRESS + Gpio_Mmio_Offset + R_PCH_CFIO_PAD_VAL + Gpio_Conf_Data[index].offset * 16;\r
-\r
-#ifdef EFI_DEBUG\r
- DEBUG ((EFI_D_INFO, "%s, ", Gpio_Conf_Data[index].pad_name));\r
-\r
-#endif\r
- DEBUG ((EFI_D_INFO, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ",\r
- Gpio_Conf_Data[index].usage,\r
- Gpio_Conf_Data[index].func,\r
- Gpio_Conf_Data[index].int_type,\r
- Gpio_Conf_Data[index].pull,\r
- mmio_conf0));\r
-\r
- //\r
- // Step 1: PadVal Programming\r
- //\r
- pad_val.dw = MmioRead32(mmio_padval);\r
-\r
- //\r
- // Config PAD_VAL only for GPIO (Non-Native) Pin\r
- //\r
- if(Native != Gpio_Conf_Data[index].usage)\r
- {\r
- pad_val.dw &= ~0x6; // Clear bits 1:2\r
- pad_val.dw |= (Gpio_Conf_Data[index].usage & 0x6); // Set bits 1:2 according to PadVal\r
-\r
- //\r
- // set GPO default value\r
- //\r
- if(Gpio_Conf_Data[index].usage == GPO && Gpio_Conf_Data[index].gpod4 != NA)\r
- {\r
- pad_val.r.pad_val = Gpio_Conf_Data[index].gpod4;\r
- }\r
- }\r
-\r
-\r
- DEBUG ((EFI_D_INFO, "Set PAD_VAL = 0x%08x, ", pad_val.dw));\r
-\r
- MmioWrite32(mmio_padval, pad_val.dw);\r
-\r
- //\r
- // Step 2: CONF0 Programming\r
- // Read GPIO default CONF0 value, which is assumed to be default value after reset.\r
- //\r
- conf0_val.dw = MmioRead32(mmio_conf0);\r
-\r
- //\r
- // Set Function #\r
- //\r
- conf0_val.r.Func_Pin_Mux = Gpio_Conf_Data[index].func;\r
-\r
- if(GPO == Gpio_Conf_Data[index].usage)\r
- {\r
- //\r
- // If used as GPO, then internal pull need to be disabled\r
- //\r
- conf0_val.r.Pull_assign = 0; // Non-pull\r
- }\r
- else\r
- {\r
- //\r
- // Set PullUp / PullDown\r
- //\r
- if(P_20K_H == Gpio_Conf_Data[index].pull)\r
- {\r
- conf0_val.r.Pull_assign = 0x1; // PullUp\r
- conf0_val.r.Pull_strength = 0x2;// 20K\r
- }\r
- else if(P_20K_L == Gpio_Conf_Data[index].pull)\r
- {\r
- conf0_val.r.Pull_assign = 0x2; // PullDown\r
- conf0_val.r.Pull_strength = 0x2;// 20K\r
- }\r
- else if(P_NONE == Gpio_Conf_Data[index].pull)\r
- {\r
- conf0_val.r.Pull_assign = 0; // Non-pull\r
- }\r
- else\r
- {\r
- ASSERT(FALSE); // Invalid value\r
- }\r
- }\r
-\r
- //\r
- // Set INT Trigger Type\r
- //\r
- conf0_val.dw &= ~0x0f000000; // Clear bits 27:24\r
-\r
- //\r
- // Set INT Trigger Type\r
- //\r
- if(TRIG_ == Gpio_Conf_Data[index].int_type)\r
- {\r
- //\r
- // Interrupt not capable, clear bits 27:24\r
- //\r
- }\r
- else\r
- {\r
- conf0_val.dw |= (Gpio_Conf_Data[index].int_type & 0x0f)<<24;\r
- }\r
-\r
- DEBUG ((EFI_D_INFO, "Set CONF0 = 0x%08x\n", conf0_val.dw));\r
-\r
- //\r
- // Write back the targeted GPIO config value according to platform (board) GPIO setting\r
- //\r
- MmioWrite32 (mmio_conf0, conf0_val.dw);\r
- }\r
-\r
- // A0 BIOS Spec doesn't mention it although X0 does. comment out now.\r
- // GPIO SCORE write 0x01001002 to IOBASE + 0x0900\r
- //\r
-}\r
-\r
-VOID\r
-EFIAPI\r
-SpiBiosProtectionFunction(\r
- EFI_EVENT Event,\r
- VOID *Context\r
- )\r
-{\r
-\r
- UINTN mPciD31F0RegBase;\r
- UINTN BiosFlaLower0;\r
- UINTN BiosFlaLimit0;\r
- UINTN BiosFlaLower1;\r
- UINTN BiosFlaLimit1; \r
- \r
-\r
- BiosFlaLower0 = PcdGet32(PcdFlashMicroCodeAddress)-PcdGet32(PcdFlashAreaBaseAddress);\r
- BiosFlaLimit0 = PcdGet32(PcdFlashMicroCodeSize)-1; \r
- #ifdef MINNOW2_FSP_BUILD\r
- BiosFlaLower1 = PcdGet32(PcdFlashFvFspBase)-PcdGet32(PcdFlashAreaBaseAddress);\r
- BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvFspBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r
- #else\r
- BiosFlaLower1 = PcdGet32(PcdFlashFvMainBase)-PcdGet32(PcdFlashAreaBaseAddress);\r
- BiosFlaLimit1 = (PcdGet32(PcdFlashFvRecoveryBase)-PcdGet32(PcdFlashFvMainBase)+PcdGet32(PcdFlashFvRecoverySize))-1;\r
- #endif\r
-\r
- \r
- mPciD31F0RegBase = MmPciAddress (0,\r
- DEFAULT_PCI_BUS_NUMBER_PCH,\r
- PCI_DEVICE_NUMBER_PCH_LPC,\r
- PCI_FUNCTION_NUMBER_PCH_LPC,\r
- 0\r
- );\r
- SpiBase = MmioRead32(mPciD31F0RegBase + R_PCH_LPC_SPI_BASE) & B_PCH_LPC_SPI_BASE_BAR;\r
-\r
- //\r
- //Set SMM_BWP, WPD and LE bit\r
- //\r
- MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_SMM_BWP);\r
- MmioAnd32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8)(~B_PCH_SPI_BCR_BIOSWE));\r
- MmioOr32 ((UINTN) (SpiBase + R_PCH_SPI_BCR), (UINT8) B_PCH_SPI_BCR_BLE);\r
-\r
- //\r
- //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already.\r
- //\r
- if( (MmioRead16(SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) != 0 ||\r
- (MmioRead32(SpiBase + R_PCH_SPI_IND_LOCK)& B_PCH_SPI_IND_LOCK_PR0) != 0) {\r
- //\r
- //Already locked. we could take no action here\r
- //\r
- DEBUG((EFI_D_INFO, "PR0 already locked down. Stop configuring PR0.\n"));\r
- return;\r
- }\r
-\r
- //\r
- //Set PR0\r
- //\r
- MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR0),\r
- B_PCH_SPI_PR0_RPE|B_PCH_SPI_PR0_WPE|\\r
- (B_PCH_SPI_PR0_PRB_MASK&(BiosFlaLower0>>12))|(B_PCH_SPI_PR0_PRL_MASK&(BiosFlaLimit0>>12)<<16));\r
-\r
- //\r
- //Set PR1\r
- //\r
-\r
- MmioOr32((UINTN)(SpiBase + R_PCH_SPI_PR1),\r
- B_PCH_SPI_PR1_RPE|B_PCH_SPI_PR1_WPE|\\r
- (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16));\r
-\r
- //\r
- //Lock down PRx\r
- //\r
- MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));\r
-\r
- //\r
- // Verify if it's really locked.\r
- //\r
- if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {\r
- DEBUG((EFI_D_ERROR, "Failed to lock down PRx.\n"));\r
- }\r
- return;\r
-\r
-}\r
-\r
-VOID\r
-EFIAPI\r
-InitPciDevPME (\r
- EFI_EVENT Event,\r
- VOID *Context\r
- )\r
-{\r
- UINTN VarSize;\r
-\r
- VarSize = sizeof(SYSTEM_CONFIGURATION);\r
- gRT->GetVariable(\r
- NORMAL_SETUP_NAME,\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &VarSize,\r
- &mSystemConfiguration\r
- );\r
-\r
- //\r
- //Program HDA PME_EN\r
- //\r
- PchAzaliaPciCfg32Or (R_PCH_HDA_PCS, B_PCH_HDA_PCS_PMEE);\r
-\r
- //\r
- //Program SATA PME_EN\r
- //\r
- PchSataPciCfg32Or (R_PCH_SATA_PMCS, B_PCH_SATA_PMCS_PMEE);\r
-\r
- DEBUG ((EFI_D_INFO, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration.EhciPllCfgEnable));\r
- if (mSystemConfiguration.EhciPllCfgEnable != 1) {\r
- //\r
- //Program EHCI PME_EN\r
- //\r
- PchMmPci32Or (\r
- 0,\r
- 0,\r
- PCI_DEVICE_NUMBER_PCH_USB,\r
- PCI_FUNCTION_NUMBER_PCH_EHCI,\r
- R_PCH_EHCI_PWR_CNTL_STS,\r
- B_PCH_EHCI_PWR_CNTL_STS_PME_EN\r
- );\r
- }\r
- {\r
- UINTN EhciPciMmBase;\r
- UINT32 Buffer32 = 0;\r
-\r
- EhciPciMmBase = MmPciAddress (0,\r
- 0,\r
- PCI_DEVICE_NUMBER_PCH_USB,\r
- PCI_FUNCTION_NUMBER_PCH_EHCI,\r
- 0\r
- );\r
- DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase));\r
- Buffer32 = MmioRead32(EhciPciMmBase + R_PCH_EHCI_PWR_CNTL_STS);\r
- DEBUG ((EFI_D_INFO, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32));\r
- }\r
-}\r
-\r
-VOID\r
-EFIAPI\r
-InitThermalZone (\r
- EFI_EVENT Event,\r
- VOID *Context\r
- )\r
-{\r
- UINTN VarSize;\r
- EFI_GLOBAL_NVS_AREA_PROTOCOL *GlobalNvsArea;\r
- VarSize = sizeof(SYSTEM_CONFIGURATION);\r
- gRT->GetVariable(\r
- NORMAL_SETUP_NAME,\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &VarSize,\r
- &mSystemConfiguration\r
- );\r
- gBS->LocateProtocol (\r
- &gEfiGlobalNvsAreaProtocolGuid,\r
- NULL,\r
- (void **)&GlobalNvsArea\r
- );\r
- GlobalNvsArea->Area->CriticalThermalTripPoint = mSystemConfiguration.CriticalThermalTripPoint;\r
- GlobalNvsArea->Area->PassiveThermalTripPoint = mSystemConfiguration.PassiveThermalTripPoint;\r
-}\r
-#if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r
-\r
-#endif\r
-\r
-\r
-EFI_STATUS\r
-EFIAPI\r
-TristateLpcGpioS0i3Config (\r
- UINT32 Gpio_Mmio_Offset,\r
- UINT32 Gpio_Pin_Num,\r
- CFIO_PNP_INIT* Gpio_Conf_Data\r
- )\r
-{\r
-\r
- UINT32 index;\r
- UINT32 mmio_reg;\r
- UINT32 mmio_val;\r
-\r
- DEBUG ((DEBUG_INFO, "TristateLpcGpioS0i3Config\n"));\r
-\r
- for(index=0; index < Gpio_Pin_Num; index++)\r
- {\r
- mmio_reg = IO_BASE_ADDRESS + Gpio_Mmio_Offset + Gpio_Conf_Data[index].offset;\r
-\r
- MmioWrite32(mmio_reg, Gpio_Conf_Data[index].val);\r
- mmio_val = 0;\r
- mmio_val = MmioRead32(mmio_reg);\r
-\r
- DEBUG ((EFI_D_INFO, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg, mmio_val));\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-EFI_BOOT_SCRIPT_SAVE_PROTOCOL *mBootScriptSave;\r
-\r
-/**\r
- Event Notification during exit boot service to enabel ACPI mode\r
-\r
- Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r
-\r
- Clear all ACPI event status and disable all ACPI events\r
- Disable PM sources except power button\r
- Clear status bits\r
-\r
- Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r
-\r
- Update EC to disable SMI and enable SCI\r
-\r
- Enable SCI\r
-\r
- Enable PME_B0_EN in GPE0a_EN\r
-\r
- @param Event - EFI Event Handle\r
- @param Context - Pointer to Notify Context\r
-\r
- @retval Nothing\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-EnableAcpiCallback (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
- )\r
-{\r
- UINT32 RegData32;\r
- UINT16 Pm1Cnt;\r
- UINT16 AcpiBase;\r
- UINT32 Gpe0aEn;\r
-\r
- AcpiBase = MmioRead16 (\r
- PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH,\r
- PCI_DEVICE_NUMBER_PCH_LPC,\r
- PCI_FUNCTION_NUMBER_PCH_LPC) + R_PCH_LPC_ACPI_BASE\r
- ) & B_PCH_LPC_ACPI_BASE_BAR;\r
-\r
- DEBUG ((EFI_D_INFO, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase));\r
-\r
- //\r
- // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2\r
- //\r
- RegData32 = IoRead32(AcpiBase + R_PCH_SMI_EN);\r
- RegData32 &= ~(B_PCH_SMI_EN_SWSMI_TMR | B_PCH_SMI_EN_LEGACY_USB2 | B_PCH_SMI_EN_INTEL_USB2);\r
- IoWrite32(AcpiBase + R_PCH_SMI_EN, RegData32);\r
-\r
- RegData32 = IoRead32(AcpiBase + R_PCH_SMI_STS);\r
- RegData32 |= B_PCH_SMI_STS_SWSMI_TMR;\r
- IoWrite32(AcpiBase + R_PCH_SMI_STS, RegData32);\r
-\r
- //\r
- // Disable PM sources except power button\r
- // power button is enabled only for PCAT. Disabled it on Tablet platform\r
- //\r
-\r
- IoWrite16(AcpiBase + R_PCH_ACPI_PM1_EN, B_PCH_ACPI_PM1_EN_PWRBTN);\r
- IoWrite16(AcpiBase + R_PCH_ACPI_PM1_STS, 0xffff);\r
-\r
- //\r
- // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")\r
- // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid\r
- //\r
- IoWrite8 (PCAT_RTC_ADDRESS_REGISTER, RTC_ADDRESS_REGISTER_D);\r
- IoWrite8 (PCAT_RTC_DATA_REGISTER, 0x0);\r
-\r
- RegData32 = IoRead32(AcpiBase + R_PCH_ALT_GP_SMI_EN);\r
- RegData32 &= ~(BIT7);\r
- IoWrite32((AcpiBase + R_PCH_ALT_GP_SMI_EN), RegData32);\r
-\r
- //\r
- // Enable SCI\r
- //\r
- Pm1Cnt = IoRead16(AcpiBase + R_PCH_ACPI_PM1_CNT);\r
- Pm1Cnt |= B_PCH_ACPI_PM1_CNT_SCI_EN;\r
- IoWrite16(AcpiBase + R_PCH_ACPI_PM1_CNT, Pm1Cnt);\r
-\r
- IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE\r
-\r
- //\r
- // Enable PME_B0_EN in GPE0a_EN\r
- // Caution: Enable PME_B0_EN must be placed after enabling SCI.\r
- // Otherwise, USB PME could not be handled as SMI event since no handler is there.\r
- //\r
- Gpe0aEn = IoRead32 (AcpiBase + R_PCH_ACPI_GPE0a_EN);\r
- Gpe0aEn |= B_PCH_ACPI_GPE0a_EN_PME_B0;\r
- IoWrite32(AcpiBase + R_PCH_ACPI_GPE0a_EN, Gpe0aEn);\r
-\r
-}\r
-\r
-/**\r
-\r
- Routine Description:\r
-\r
- This is the standard EFI driver point for the Driver. This\r
- driver is responsible for setting up any platform specific policy or\r
- initialization information.\r
-\r
- @param ImageHandle Handle for the image of this driver.\r
- @param SystemTable Pointer to the EFI System Table.\r
-\r
- @retval EFI_SUCCESS Policy decisions set.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-InitializePlatform (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINTN VarSize;\r
- EFI_HANDLE Handle = NULL;\r
- EFI_EVENT mEfiExitBootServicesEvent;\r
- EFI_EVENT RtcEvent;\r
- VOID *RtcCallbackReg = NULL;\r
- \r
- mImageHandle = ImageHandle;\r
-\r
- Status = gBS->InstallProtocolInterface (\r
- &Handle,\r
- &gEfiSpeakerInterfaceProtocolGuid,\r
- EFI_NATIVE_INTERFACE,\r
- &mSpeakerInterface\r
- );\r
-\r
- Status = gBS->LocateProtocol (\r
- &gEfiPciRootBridgeIoProtocolGuid,\r
- NULL,\r
- (VOID **) &mPciRootBridgeIo\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- VarSize = sizeof(EFI_PLATFORM_INFO_HOB);\r
- Status = gRT->GetVariable(\r
- L"PlatformInfo",\r
- &gEfiVlv2VariableGuid,\r
- NULL,\r
- &VarSize,\r
- &mPlatformInfo\r
- );\r
-\r
- //\r
- // Initialize Product Board ID variable\r
- //\r
- InitMfgAndConfigModeStateVar();\r
- InitPlatformBootMode();\r
-\r
- //\r
- // Install Observable protocol\r
- //\r
- InitializeObservableProtocol();\r
-\r
- Status = SaveSetupRecoveryVar();\r
- if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "InitializePlatform() Save SetupRecovery variable failed \n"));\r
- }\r
-\r
- VarSize = sizeof(SYSTEM_CONFIGURATION);\r
- Status = gRT->GetVariable(\r
- NORMAL_SETUP_NAME,\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &VarSize,\r
- &mSystemConfiguration\r
- );\r
- if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r
- //The setup variable is corrupted\r
- VarSize = sizeof(SYSTEM_CONFIGURATION);\r
- Status = gRT->GetVariable(\r
- L"SetupRecovery",\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &VarSize,\r
- &mSystemConfiguration\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- Status = gRT->SetVariable (\r
- NORMAL_SETUP_NAME,\r
- &gEfiNormalSetupGuid,\r
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
- sizeof(SYSTEM_CONFIGURATION),\r
- &mSystemConfiguration\r
- ); \r
- }\r
- \r
- Status = EfiCreateEventReadyToBootEx (\r
- TPL_CALLBACK,\r
- ReadyToBootFunction,\r
- NULL,\r
- &mReadyToBootEvent\r
- );\r
-\r
- //\r
- // Create a ReadyToBoot Event to run the PME init process\r
- //\r
- Status = EfiCreateEventReadyToBootEx (\r
- TPL_CALLBACK,\r
- InitPciDevPME,\r
- NULL,\r
- &mReadyToBootEvent\r
- );\r
- //\r
- // Create a ReadyToBoot Event to run enable PR0/PR1 and lock down,unlock variable region\r
- //\r
- if(mSystemConfiguration.SpiRwProtect==1) {\r
- Status = EfiCreateEventReadyToBootEx (\r
- TPL_CALLBACK,\r
- SpiBiosProtectionFunction,\r
- NULL,\r
- &mReadyToBootEvent\r
- );\r
- }\r
- //\r
- // Create a ReadyToBoot Event to run the thermalzone init process\r
- //\r
- Status = EfiCreateEventReadyToBootEx (\r
- TPL_CALLBACK,\r
- InitThermalZone,\r
- NULL,\r
- &mReadyToBootEvent\r
- ); \r
- \r
- ReportStatusCodeEx (\r
- EFI_PROGRESS_CODE,\r
- EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP1,\r
- 0,\r
- &gEfiCallerIdGuid,\r
- NULL,\r
- NULL,\r
- 0\r
- );\r
-\r
-#if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0\r
- //\r
- // Initialize Sensor Info variable\r
- //\r
- InitializeSensorInfoVariable();\r
-#endif\r
- InitPchPlatformPolicy(&mPlatformInfo);\r
- InitVlvPlatformPolicy();\r
-\r
- //\r
- // Add usb policy\r
- //\r
- InitPlatformUsbPolicy();\r
- InitSioPlatformPolicy();\r
- InitializeClockRouting();\r
- InitializeSlotInfo();\r
- InitTcoReset();\r
-\r
- //\r
- //Init ExI\r
- //\r
- InitExI();\r
-\r
- ReportStatusCodeEx (\r
- EFI_PROGRESS_CODE,\r
- EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP2,\r
- 0,\r
- &gEfiCallerIdGuid,\r
- NULL,\r
- NULL,\r
- 0\r
- );\r
-\r
- //\r
- // Install PCI Bus Driver Hook\r
- //\r
- PciBusDriverHook();\r
-\r
- InitItk();\r
-\r
- ReportStatusCodeEx (\r
- EFI_PROGRESS_CODE,\r
- EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP3,\r
- 0,\r
- &gEfiCallerIdGuid,\r
- NULL,\r
- NULL,\r
- 0\r
- );\r
-\r
-\r
- //\r
- // Initialize Password States and Callbacks\r
- //\r
- PchInitBeforeBoot();\r
-\r
-#if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r
-\r
-#endif\r
-\r
-#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
- //\r
- // Re-write Firmware ID if it is changed\r
- //\r
- InitFirmwareId();\r
-#endif\r
-\r
- ReportStatusCodeEx (\r
- EFI_PROGRESS_CODE,\r
- EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP4,\r
- 0,\r
- &gEfiCallerIdGuid,\r
- NULL,\r
- NULL,\r
- 0\r
- );\r
-\r
-\r
- Status = gBS->CreateEventEx (\r
- EVT_NOTIFY_SIGNAL,\r
- TPL_NOTIFY,\r
- EnableAcpiCallback,\r
- NULL,\r
- &gEfiEventExitBootServicesGuid,\r
- &mEfiExitBootServicesEvent\r
- );\r
-\r
- //\r
- // Adjust RTC deafult time to be BIOS-built time.\r
- //\r
- Status = gBS->CreateEvent (\r
- EVT_NOTIFY_SIGNAL,\r
- TPL_CALLBACK,\r
- AdjustDefaultRtcTimeCallback,\r
- NULL,\r
- &RtcEvent\r
- );\r
- if (!EFI_ERROR (Status)) {\r
- Status = gBS->RegisterProtocolNotify (\r
- &gExitPmAuthProtocolGuid,\r
- RtcEvent,\r
- &RtcCallbackReg\r
- );\r
-\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Source Or Destination with Length bytes.\r
-\r
- @param[in] Destination Target memory\r
- @param[in] Source Source memory\r
- @param[in] Length Number of bytes\r
-\r
- @retval None\r
-\r
-**/\r
-VOID\r
-EfiOrMem (\r
- IN VOID *Destination,\r
- IN VOID *Source,\r
- IN UINTN Length\r
- )\r
-{\r
- CHAR8 *Destination8;\r
- CHAR8 *Source8;\r
-\r
- if (Source < Destination) {\r
- Destination8 = (CHAR8 *) Destination + Length - 1;\r
- Source8 = (CHAR8 *) Source + Length - 1;\r
- while (Length--) {\r
- *(Destination8--) |= *(Source8--);\r
- }\r
- } else {\r
- Destination8 = (CHAR8 *) Destination;\r
- Source8 = (CHAR8 *) Source;\r
- while (Length--) {\r
- *(Destination8++) |= *(Source8++);\r
- }\r
- }\r
-}\r
-\r
-VOID\r
-PchInitBeforeBoot()\r
-{\r
- //\r
- // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume.\r
- //\r
- S3BootScriptSaveMemWrite (\r
- EfiBootScriptWidthUint32,\r
- (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)),\r
- 1,\r
- (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU0)));\r
-\r
- S3BootScriptSaveMemWrite (\r
- EfiBootScriptWidthUint32,\r
- (UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)),\r
- 1,\r
- (VOID *)(UINTN)(SPI_BASE_ADDRESS + (R_PCH_SPI_OPMENU1)));\r
-\r
- S3BootScriptSaveMemWrite (\r
- EfiBootScriptWidthUint16,\r
- (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE),\r
- 1,\r
- (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_OPTYPE));\r
-\r
- S3BootScriptSaveMemWrite (\r
- EfiBootScriptWidthUint16,\r
- (UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP),\r
- 1,\r
- (VOID *)(UINTN)(SPI_BASE_ADDRESS + R_PCH_SPI_PREOP));\r
-\r
- //\r
- // Saved MTPMC_1 for S3 resume.\r
- //\r
- S3BootScriptSaveMemWrite (\r
- EfiBootScriptWidthUint32,\r
- (UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1),\r
- 1,\r
- (VOID *)(UINTN)(PMC_BASE_ADDRESS + R_PCH_PMC_MTPMC1));\r
- return;\r
-}\r
-\r
-VOID\r
-EFIAPI\r
-ReadyToBootFunction (\r
- EFI_EVENT Event,\r
- VOID *Context\r
- )\r
-{\r
- EFI_STATUS Status;\r
- EFI_ISA_ACPI_PROTOCOL *IsaAcpi;\r
- EFI_ISA_ACPI_DEVICE_ID IsaDevice;\r
- UINTN Size;\r
- UINT16 State;\r
- EFI_TPM_MP_DRIVER_PROTOCOL *TpmMpDriver;\r
- EFI_CPU_IO_PROTOCOL *CpuIo;\r
- UINT8 Data;\r
- UINT8 ReceiveBuffer [64];\r
- UINT32 ReceiveBufferSize;\r
-\r
- UINT8 TpmForceClearCommand [] = {0x00, 0xC1,\r
- 0x00, 0x00, 0x00, 0x0A,\r
- 0x00, 0x00, 0x00, 0x5D};\r
- UINT8 TpmPhysicalPresenceCommand [] = {0x00, 0xC1,\r
- 0x00, 0x00, 0x00, 0x0C,\r
- 0x40, 0x00, 0x00, 0x0A,\r
- 0x00, 0x00};\r
- UINT8 TpmPhysicalDisableCommand [] = {0x00, 0xC1,\r
- 0x00, 0x00, 0x00, 0x0A,\r
- 0x00, 0x00, 0x00, 0x70};\r
- UINT8 TpmPhysicalEnableCommand [] = {0x00, 0xC1,\r
- 0x00, 0x00, 0x00, 0x0A,\r
- 0x00, 0x00, 0x00, 0x6F};\r
- UINT8 TpmPhysicalSetDeactivatedCommand [] = {0x00, 0xC1,\r
- 0x00, 0x00, 0x00, 0x0B,\r
- 0x00, 0x00, 0x00, 0x72,\r
- 0x00};\r
- UINT8 TpmSetOwnerInstallCommand [] = {0x00, 0xC1,\r
- 0x00, 0x00, 0x00, 0x0B,\r
- 0x00, 0x00, 0x00, 0x71,\r
- 0x00};\r
-\r
- Size = sizeof(UINT16);\r
- Status = gRT->GetVariable (\r
- VAR_EQ_FLOPPY_MODE_DECIMAL_NAME,\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &Size,\r
- &State\r
- );\r
-\r
- //\r
- // Disable Floppy Controller if needed\r
- //\r
- Status = gBS->LocateProtocol (&gEfiIsaAcpiProtocolGuid, NULL, (VOID **) &IsaAcpi);\r
- if (!EFI_ERROR(Status) && (State == 0x00)) {\r
- IsaDevice.HID = EISA_PNP_ID(0x604);\r
- IsaDevice.UID = 0;\r
- Status = IsaAcpi->EnableDevice(IsaAcpi, &IsaDevice, FALSE);\r
- }\r
-\r
- //\r
- // save LAN info to a variable\r
- //\r
- if (NULL != mPciLanInfo) {\r
- gRT->SetVariable (\r
- L"PciLanInfo",\r
- &gEfiPciLanInfoGuid,\r
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS,\r
- mPciLanCount * sizeof(PCI_LAN_INFO),\r
- mPciLanInfo\r
- );\r
- }\r
-\r
- if (NULL != mPciLanInfo) {\r
- gBS->FreePool (mPciLanInfo);\r
- mPciLanInfo = NULL;\r
- }\r
- \r
-\r
- //\r
- // Handle ACPI OS TPM requests here\r
- //\r
- Status = gBS->LocateProtocol (\r
- &gEfiCpuIoProtocolGuid,\r
- NULL,\r
- (VOID **)&CpuIo\r
- );\r
- Status = gBS->LocateProtocol (\r
- &gEfiTpmMpDriverProtocolGuid,\r
- NULL,\r
- (VOID **)&TpmMpDriver\r
- );\r
- if (!EFI_ERROR (Status))\r
- {\r
- Data = ReadCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST);\r
-\r
- //\r
- // Clear pending ACPI TPM request indicator\r
- //\r
- WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0x00);\r
- if (Data != 0)\r
- {\r
- WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, Data);\r
-\r
- //\r
- // Assert Physical Presence for these commands\r
- //\r
- TpmPhysicalPresenceCommand [11] = 0x20;\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver, TpmPhysicalPresenceCommand,\r
- sizeof (TpmPhysicalPresenceCommand),\r
- ReceiveBuffer, &ReceiveBufferSize\r
- );\r
- //\r
- // PF PhysicalPresence = TRUE\r
- //\r
- TpmPhysicalPresenceCommand [11] = 0x08;\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver, TpmPhysicalPresenceCommand,\r
- sizeof (TpmPhysicalPresenceCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- if (Data == 0x01)\r
- {\r
- //\r
- // TPM_PhysicalEnable\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver, TpmPhysicalEnableCommand,\r
- sizeof (TpmPhysicalEnableCommand),\r
- ReceiveBuffer, &ReceiveBufferSize\r
- );\r
- }\r
- if (Data == 0x02)\r
- {\r
- //\r
- // TPM_PhysicalDisable\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver, TpmPhysicalDisableCommand,\r
- sizeof (TpmPhysicalDisableCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- }\r
- if (Data == 0x03)\r
- {\r
- //\r
- // TPM_PhysicalSetDeactivated=FALSE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalSetDeactivatedCommand,\r
- sizeof (TpmPhysicalSetDeactivatedCommand),\r
- ReceiveBuffer, &ReceiveBufferSize\r
- );\r
- gRT->ResetSystem (EfiResetWarm, EFI_SUCCESS, 0, NULL);\r
- }\r
- if (Data == 0x04)\r
- {\r
- //\r
- // TPM_PhysicalSetDeactivated=TRUE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalSetDeactivatedCommand,\r
- sizeof (TpmPhysicalSetDeactivatedCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- gRT->ResetSystem (\r
- EfiResetWarm,\r
- EFI_SUCCESS,\r
- 0,\r
- NULL\r
- );\r
- }\r
- if (Data == 0x05)\r
- {\r
- //\r
- // TPM_ForceClear\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmForceClearCommand,\r
- sizeof (TpmForceClearCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- gRT->ResetSystem (\r
- EfiResetWarm,\r
- EFI_SUCCESS,\r
- 0,\r
- NULL\r
- );\r
- }\r
- if (Data == 0x06)\r
- {\r
- //\r
- // TPM_PhysicalEnable\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalEnableCommand,\r
- sizeof (TpmPhysicalEnableCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // TPM_PhysicalSetDeactivated=FALSE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalSetDeactivatedCommand,\r
- sizeof (TpmPhysicalSetDeactivatedCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- gRT->ResetSystem (\r
- EfiResetWarm,\r
- EFI_SUCCESS,\r
- 0,\r
- NULL\r
- );\r
- }\r
- if (Data == 0x07)\r
- {\r
- //\r
- // TPM_PhysicalSetDeactivated=TRUE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalSetDeactivatedCommand,\r
- sizeof (TpmPhysicalSetDeactivatedCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // TPM_PhysicalDisable\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalDisableCommand,\r
- sizeof (TpmPhysicalDisableCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- gRT->ResetSystem (\r
- EfiResetWarm,\r
- EFI_SUCCESS,\r
- 0,\r
- NULL\r
- );\r
- }\r
- if (Data == 0x08)\r
- {\r
- //\r
- // TPM_SetOwnerInstall=TRUE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmSetOwnerInstallCommand [10] = 0x01;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmSetOwnerInstallCommand,\r
- sizeof (TpmSetOwnerInstallCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- }\r
- if (Data == 0x09)\r
- {\r
- //\r
- // TPM_SetOwnerInstall=FALSE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmSetOwnerInstallCommand [10] = 0x00;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmSetOwnerInstallCommand,\r
- sizeof (TpmSetOwnerInstallCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- }\r
- if (Data == 0x0A)\r
- {\r
- //\r
- // TPM_PhysicalEnable\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalEnableCommand,\r
- sizeof (TpmPhysicalEnableCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // TPM_PhysicalSetDeactivated=FALSE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalSetDeactivatedCommand,\r
- sizeof (TpmPhysicalSetDeactivatedCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // Do TPM_SetOwnerInstall=TRUE on next reboot\r
- //\r
-\r
- WriteCmosBank1Byte (CpuIo, ACPI_TPM_REQUEST, 0xF0);\r
-\r
- gRT->ResetSystem (\r
- EfiResetWarm,\r
- EFI_SUCCESS,\r
- 0,\r
- NULL\r
- );\r
- }\r
- if (Data == 0x0B)\r
- {\r
- //\r
- // TPM_SetOwnerInstall=FALSE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmSetOwnerInstallCommand [10] = 0x00;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmSetOwnerInstallCommand,\r
- sizeof (TpmSetOwnerInstallCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // TPM_PhysicalSetDeactivated=TRUE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmPhysicalSetDeactivatedCommand [10] = 0x01;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalSetDeactivatedCommand,\r
- sizeof (TpmPhysicalSetDeactivatedCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // TPM_PhysicalDisable\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalDisableCommand,\r
- sizeof (TpmPhysicalDisableCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- gRT->ResetSystem (\r
- EfiResetWarm,\r
- EFI_SUCCESS,\r
- 0,\r
- NULL\r
- );\r
- }\r
- if (Data == 0x0E)\r
- {\r
- //\r
- // TPM_ForceClear\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmForceClearCommand,\r
- sizeof (TpmForceClearCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // TPM_PhysicalEnable\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalEnableCommand,\r
- sizeof (TpmPhysicalEnableCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- //\r
- // TPM_PhysicalSetDeactivated=FALSE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmPhysicalSetDeactivatedCommand [10] = 0x00;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalSetDeactivatedCommand,\r
- sizeof (TpmPhysicalSetDeactivatedCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- gRT->ResetSystem (\r
- EfiResetWarm,\r
- EFI_SUCCESS,\r
- 0,\r
- NULL\r
- );\r
- }\r
- if (Data == 0xF0)\r
- {\r
- //\r
- // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE\r
- //\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- TpmSetOwnerInstallCommand [10] = 0x01;\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmSetOwnerInstallCommand,\r
- sizeof (TpmSetOwnerInstallCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- WriteCmosBank1Byte (CpuIo, ACPI_TPM_LAST_REQUEST, 0x0A);\r
- }\r
- //\r
- // Deassert Physical Presence\r
- //\r
- TpmPhysicalPresenceCommand [11] = 0x10;\r
- ReceiveBufferSize = sizeof(ReceiveBuffer);\r
- Status = TpmMpDriver->Transmit (\r
- TpmMpDriver,\r
- TpmPhysicalPresenceCommand,\r
- sizeof (TpmPhysicalPresenceCommand),\r
- ReceiveBuffer,\r
- &ReceiveBufferSize\r
- );\r
- }\r
- }\r
-\r
- return;\r
-}\r
-\r
-/**\r
-\r
- Initializes manufacturing and config mode setting.\r
-\r
-**/\r
-VOID\r
-InitMfgAndConfigModeStateVar()\r
-{\r
- EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r
- VOID *HobList;\r
-\r
-\r
- HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r
- if (HobList != NULL) {\r
- BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r
-\r
- //\r
- // Check if in Manufacturing mode\r
- //\r
- if ( !CompareMem (\r
- &BootModeBuffer->SetupName,\r
- MANUFACTURE_SETUP_NAME,\r
- StrSize (MANUFACTURE_SETUP_NAME)\r
- ) ) {\r
- mMfgMode = TRUE;\r
- }\r
-\r
-\r
-\r
- }\r
-\r
-}\r
-\r
-/**\r
-\r
- Initializes manufacturing and config mode setting.\r
-\r
-**/\r
-VOID\r
-InitPlatformBootMode()\r
-{\r
- EFI_PLATFORM_SETUP_ID *BootModeBuffer;\r
- VOID *HobList;\r
-\r
- HobList = GetFirstGuidHob(&gEfiPlatformBootModeGuid);\r
- if (HobList != NULL) {\r
- BootModeBuffer = GET_GUID_HOB_DATA (HobList);\r
- mPlatformBootMode = BootModeBuffer->PlatformBootMode;\r
- }\r
-}\r
-\r
-/**\r
-\r
- Initializes ITK.\r
-\r
-**/\r
-VOID\r
-InitItk(\r
- )\r
-{\r
- EFI_STATUS Status;\r
- UINT16 ItkModBiosState;\r
- UINT8 Value;\r
- UINTN DataSize;\r
- UINT32 Attributes;\r
-\r
- //\r
- // Setup local variable according to ITK variable\r
- //\r
- //\r
- // Read ItkBiosModVar to determine if BIOS has been modified by ITK\r
- // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified\r
- // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK\r
- //\r
- DataSize = sizeof (Value);\r
- Status = gRT->GetVariable (\r
- ITK_BIOS_MOD_VAR_NAME,\r
- &gItkDataVarGuid,\r
- &Attributes,\r
- &DataSize,\r
- &Value\r
- );\r
- if (Status == EFI_NOT_FOUND) {\r
- //\r
- // Variable not found, hasn't been initialized, intialize to 0\r
- //\r
- Value=0x00;\r
- //\r
- // Write variable to flash.\r
- //\r
- gRT->SetVariable (\r
- ITK_BIOS_MOD_VAR_NAME,\r
- &gItkDataVarGuid,\r
- EFI_VARIABLE_RUNTIME_ACCESS |\r
- EFI_VARIABLE_NON_VOLATILE |\r
- EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
- sizeof (Value),\r
- &Value\r
- );\r
-\r
-}\r
- if ( (!EFI_ERROR (Status)) || (Status == EFI_NOT_FOUND) ) {\r
- if (Value == 0x00) {\r
- ItkModBiosState = 0x00;\r
- } else {\r
- ItkModBiosState = 0x01;\r
- }\r
- gRT->SetVariable (\r
- VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME,\r
- &gEfiNormalSetupGuid,\r
- EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
- 2,\r
- (void *)&ItkModBiosState\r
- );\r
- }\r
-}\r
-\r
-#if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)\r
-\r
-/**\r
-\r
- Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable.\r
-\r
-**/\r
-STATIC\r
-VOID\r
-InitFirmwareId(\r
- )\r
-{\r
- EFI_STATUS Status;\r
- CHAR16 FirmwareIdNameWithPassword[] = FIRMWARE_ID_NAME_WITH_PASSWORD;\r
-\r
- //\r
- // First try writing the variable without a password in case we are\r
- // upgrading from a BIOS without password protection on the FirmwareId\r
- //\r
- Status = gRT->SetVariable(\r
- (CHAR16 *)&gFirmwareIdName,\r
- &gFirmwareIdGuid,\r
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r
- EFI_VARIABLE_RUNTIME_ACCESS,\r
- sizeof( FIRMWARE_ID ) - 1,\r
- FIRMWARE_ID\r
- );\r
-\r
- if (Status == EFI_INVALID_PARAMETER) {\r
-\r
- //\r
- // Since setting the firmware id without the password failed,\r
- // a password must be required.\r
- //\r
- Status = gRT->SetVariable(\r
- (CHAR16 *)&FirmwareIdNameWithPassword,\r
- &gFirmwareIdGuid,\r
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |\r
- EFI_VARIABLE_RUNTIME_ACCESS,\r
- sizeof( FIRMWARE_ID ) - 1,\r
- FIRMWARE_ID\r
- );\r
- }\r
-}\r
-#endif\r
-\r
-VOID\r
-UpdateDVMTSetup(\r
- )\r
-{\r
- //\r
- // Workaround to support IIA bug.\r
- // IIA request to change option value to 4, 5 and 7 relatively\r
- // instead of 1, 2, and 3 which follow Lakeport Specs.\r
- // Check option value, temporary hardcode GraphicsDriverMemorySize\r
- // Option value to fulfill IIA requirment. So that user no need to\r
- // load default and update setupvariable after update BIOS.\r
- // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7.\r
- // *This is for broadwater and above product only.\r
- //\r
-\r
- SYSTEM_CONFIGURATION SystemConfiguration;\r
- UINTN VarSize;\r
- EFI_STATUS Status;\r
-\r
- VarSize = sizeof(SYSTEM_CONFIGURATION);\r
- Status = gRT->GetVariable(\r
- NORMAL_SETUP_NAME,\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &VarSize,\r
- &SystemConfiguration\r
- );\r
-\r
- if (EFI_ERROR (Status) || VarSize != sizeof(SYSTEM_CONFIGURATION)) {\r
- //The setup variable is corrupted\r
- VarSize = sizeof(SYSTEM_CONFIGURATION);\r
- Status = gRT->GetVariable(\r
- L"SetupRecovery",\r
- &gEfiNormalSetupGuid,\r
- NULL,\r
- &VarSize,\r
- &SystemConfiguration\r
- );\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
-\r
- if((SystemConfiguration.GraphicsDriverMemorySize < 4) && !EFI_ERROR(Status) ) {\r
- switch (SystemConfiguration.GraphicsDriverMemorySize){\r
- case 1:\r
- SystemConfiguration.GraphicsDriverMemorySize = 4;\r
- break;\r
- case 2:\r
- SystemConfiguration.GraphicsDriverMemorySize = 5;\r
- break;\r
- case 3:\r
- SystemConfiguration.GraphicsDriverMemorySize = 7;\r
- break;\r
- default:\r
- break;\r
- }\r
-\r
- Status = gRT->SetVariable (\r
- NORMAL_SETUP_NAME,\r
- &gEfiNormalSetupGuid,\r
- EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS,\r
- sizeof(SYSTEM_CONFIGURATION),\r
- &SystemConfiguration\r
- );\r
- }\r
-}\r
-\r
-VOID\r
-InitPlatformUsbPolicy (\r
- VOID\r
- )\r
-\r
-{\r
- EFI_HANDLE Handle;\r
- EFI_STATUS Status;\r
-\r
- Handle = NULL;\r
-\r
- mUsbPolicyData.Version = (UINT8)USB_POLICY_PROTOCOL_REVISION_2;\r
- mUsbPolicyData.UsbMassStorageEmulationType = mSystemConfiguration.UsbBIOSINT13DeviceEmulation;\r
- if(mUsbPolicyData.UsbMassStorageEmulationType == 3) {\r
- mUsbPolicyData.UsbEmulationSize = mSystemConfiguration.UsbBIOSINT13DeviceEmulationSize;\r
- } else {\r
- mUsbPolicyData.UsbEmulationSize = 0;\r
- }\r
- mUsbPolicyData.UsbZipEmulationType = mSystemConfiguration.UsbZipEmulation;\r
- mUsbPolicyData.UsbOperationMode = HIGH_SPEED;\r
-\r
- //\r
- // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP\r
- //\r
- mUsbPolicyData.USBPeriodSupport = LEGACY_PERIOD_UN_SUPP;\r
-\r
- //\r
- // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP\r
- //\r
- mUsbPolicyData.LegacyFreeSupport = LEGACY_FREE_UN_SUPP;\r
-\r
- //\r
- // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00\r
- //\r
- mUsbPolicyData.CodeBase = (UINT8)ICBD_CODE_BASE;\r
-\r
- //\r
- // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset,\r
- // default is Ich acpibase =0x040. acpitimerreg=0x08.\r
- mUsbPolicyData.LpcAcpiBase = 0x40;\r
- mUsbPolicyData.AcpiTimerReg = 0x08;\r
-\r
- //\r
- // Set for reduce usb post time\r
- //\r
- mUsbPolicyData.UsbTimeTue = 0x00;\r
- mUsbPolicyData.InternelHubExist = 0x00; //TigerPoint doesn't have RMH\r
- mUsbPolicyData.EnumWaitPortStableStall = 100;\r
-\r
-\r
- Status = gBS->InstallProtocolInterface (\r
- &Handle,\r
- &gUsbPolicyGuid,\r
- EFI_NATIVE_INTERFACE,\r
- &mUsbPolicyData\r
- );\r
- ASSERT_EFI_ERROR(Status);\r
-\r
-}\r
-\r
-UINT8\r
-ReadCmosBank1Byte (\r
- IN EFI_CPU_IO_PROTOCOL *CpuIo,\r
- IN UINT8 Index\r
- )\r
-{\r
- UINT8 Data;\r
-\r
- CpuIo->Io.Write (CpuIo, EfiCpuIoWidthUint8, 0x72, 1, &Index);\r
- CpuIo->Io.Read (CpuIo, EfiCpuIoWidthUint8, 0x73, 1, &Data);\r
- return Data;\r
-}\r
-\r
-VOID\r
-WriteCmosBank1Byte (\r
- IN EFI_CPU_IO_PROTOCOL *CpuIo,\r
- IN UINT8 Index,\r
- IN UINT8 Data\r
- )\r
-{\r
- CpuIo->Io.Write (\r
- CpuIo,\r
- EfiCpuIoWidthUint8,\r
- 0x72,\r
- 1,\r
- &Index\r
- );\r
- CpuIo->Io.Write (\r
- CpuIo,\r
- EfiCpuIoWidthUint8,\r
- 0x73,\r
- 1,\r
- &Data\r
- );\r
-}\r
-\r
projects / mirror_edk2.git / blobdiff