#/** @file\r
# FDF file of Platform.\r
#\r
-# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are licensed and made available under\r
# the terms and conditions of the BSD License that accompanies this distribution.\r
DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
\r
-DEFINE FLASH_REGION_VPD_OFFSET = 0x00130000\r
+DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
\r
-DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0016E000\r
+DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
\r
\r
-DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00170000\r
+DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
\r
!if $(MINNOW2_FSP_BUILD) == TRUE\r
-DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x001B0000\r
+DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
-DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000\r
+DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
\r
-DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x001F8000\r
+DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
-DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000\r
+DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
\r
!endif\r
\r
-DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00200000\r
-DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000\r
+DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
+DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000\r
\r
-DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00396000\r
-DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000\r
+DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000\r
+DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000\r
\r
-DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x003C2000\r
-DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000\r
+DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
+DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
\r
################################################################################\r
#\r
SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
\r
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
+SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
+\r
!if $(MINNOW2_FSP_BUILD) == TRUE\r
# put below PCD value setting into dsc file\r
#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
FV = MICROCODE_FV\r
-\r
$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r
$(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r
}\r
\r
+!if $(RECOVERY_ENABLE)\r
+[FV.FVRECOVERY_COMPONENTS]\r
+FvAlignment = 16 #FV alignment and FV attributes setting.\r
+ERASE_POLARITY = 1\r
+MEMORY_MAPPED = TRUE\r
+STICKY_WRITE = TRUE\r
+LOCK_CAP = TRUE\r
+LOCK_STATUS = TRUE\r
+WRITE_DISABLED_CAP = TRUE\r
+WRITE_ENABLED_CAP = TRUE\r
+WRITE_STATUS = TRUE\r
+WRITE_LOCK_CAP = TRUE\r
+WRITE_LOCK_STATUS = TRUE\r
+READ_DISABLED_CAP = TRUE\r
+READ_ENABLED_CAP = TRUE\r
+READ_STATUS = TRUE\r
+READ_LOCK_CAP = TRUE\r
+READ_LOCK_STATUS = TRUE\r
+\r
+INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
+INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
+INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
+INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
+INF FatPkg/FatPei/FatPei.inf\r
+INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
+INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
+!endif\r
+\r
################################################################################\r
#\r
# FV Section\r
INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r
!endif\r
\r
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
+# INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
!if $(TPM_ENABLED) == TRUE\r
-INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf\r
+INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
!endif\r
!if $(FTPM_ENABLE) == TRUE\r
-INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config\r
+INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config\r
!endif\r
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
\r
INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
!endif\r
\r
+!if $(RECOVERY_ENABLE)\r
+FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
+ SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
+ SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
+ }\r
+}\r
+!endif\r
+\r
[FV.FVRECOVERY]\r
BlockSize = $(FLASH_BLOCK_SIZE)\r
FvAlignment = 16 #FV alignment and FV attributes setting.\r
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
+INF USE=X64 MdeModulePkg/Logo/Logo.inf\r
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
-INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf\r
+INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf\r
INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
!endif\r
\r
#\r
INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf\r
+INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
\r
INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf\r
+INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
-# INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf\r
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
+\r
+#\r
+# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell\r
+#\r
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
+\r
#\r
# ACPI\r
#\r
\r
INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
\r
+INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf\r
+\r
#\r
# PCI\r
#\r
#\r
# SDIO\r
#\r
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
-INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
+#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
#\r
# IDE/SCSI/AHCI\r
#\r
#\r
# UEFI Shell\r
#\r
-FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {\r
-# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi\r
- SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi\r
- }\r
-\r
+INF ShellPkg/Application/Shell/Shell.inf\r
\r
+#\r
+# dp command\r
+#\r
+!if $(PERFORMANCE_ENABLE) == TRUE\r
+INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
+!endif\r
\r
!if $(GOP_DRIVER_ENABLE) == TRUE\r
FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
+ INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
+ INF NetworkPkg/TcpDxe/TcpDxe.inf\r
!if $(NETWORK_IP6_ENABLE) == TRUE\r
INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
!endif\r
- !if $(NETWORK_IP6_ENABLE) == TRUE\r
- INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
- INF NetworkPkg/TcpDxe/TcpDxe.inf\r
- !else\r
- INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
- INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
- !endif\r
!if $(NETWORK_VLAN_ENABLE) == TRUE\r
INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
!endif\r
!if $(NETWORK_ISCSI_ENABLE) == TRUE\r
- !if $(NETWORK_IP6_ENABLE) == TRUE\r
INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
- !else\r
- INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
- !endif\r
!endif\r
!endif\r
\r
+!if $(CAPSULE_ENABLE)\r
+INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
+\r
+#\r
+# Minnow Max System Firmware FMP\r
+#\r
+INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
+\r
+#\r
+# Sample Device FMP\r
+#\r
+INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
+INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
+INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
+\r
+!endif\r
+\r
+!if $(MICOCODE_CAPSULE_ENABLE)\r
+INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
+!endif\r
+\r
+!if $(RECOVERY_ENABLE)\r
+FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
+ SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
+ SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
+ }\r
+!endif\r
+\r
[FV.FVMAIN_COMPACT]\r
BlockSize = $(FLASH_BLOCK_SIZE)\r
FvAlignment = 16\r
READ_LOCK_CAP = TRUE\r
READ_LOCK_STATUS = TRUE\r
\r
-\r
-[FV.Update_Data]\r
-BlockSize = $(FLASH_BLOCK_SIZE)\r
-FvAlignment = 16\r
-ERASE_POLARITY = 1\r
-MEMORY_MAPPED = TRUE\r
-STICKY_WRITE = TRUE\r
-LOCK_CAP = TRUE\r
-LOCK_STATUS = TRUE\r
-WRITE_DISABLED_CAP = TRUE\r
-WRITE_ENABLED_CAP = TRUE\r
-WRITE_STATUS = TRUE\r
-WRITE_LOCK_CAP = TRUE\r
-WRITE_LOCK_STATUS = TRUE\r
-READ_DISABLED_CAP = TRUE\r
-READ_ENABLED_CAP = TRUE\r
-READ_STATUS = TRUE\r
-READ_LOCK_CAP = TRUE\r
-READ_LOCK_STATUS = TRUE\r
-\r
-FILE RAW = 88888888-8888-8888-8888-888888888888 {\r
- FD = Vlv\r
- }\r
-\r
-[FV.BiosUpdateCargo]\r
-BlockSize = $(FLASH_BLOCK_SIZE)\r
-FvAlignment = 16\r
-ERASE_POLARITY = 1\r
-MEMORY_MAPPED = TRUE\r
-STICKY_WRITE = TRUE\r
-LOCK_CAP = TRUE\r
-LOCK_STATUS = TRUE\r
-WRITE_DISABLED_CAP = TRUE\r
-WRITE_ENABLED_CAP = TRUE\r
-WRITE_STATUS = TRUE\r
-WRITE_LOCK_CAP = TRUE\r
-WRITE_LOCK_STATUS = TRUE\r
-READ_DISABLED_CAP = TRUE\r
-READ_ENABLED_CAP = TRUE\r
-READ_STATUS = TRUE\r
-READ_LOCK_CAP = TRUE\r
-READ_LOCK_STATUS = TRUE\r
-\r
-\r
-\r
-[FV.BiosUpdate]\r
-BlockSize = $(FLASH_BLOCK_SIZE)\r
-FvAlignment = 16\r
-ERASE_POLARITY = 1\r
-MEMORY_MAPPED = TRUE\r
-STICKY_WRITE = TRUE\r
-LOCK_CAP = TRUE\r
-LOCK_STATUS = TRUE\r
-WRITE_DISABLED_CAP = TRUE\r
-WRITE_ENABLED_CAP = TRUE\r
-WRITE_STATUS = TRUE\r
-WRITE_LOCK_CAP = TRUE\r
-WRITE_LOCK_STATUS = TRUE\r
-READ_DISABLED_CAP = TRUE\r
-READ_ENABLED_CAP = TRUE\r
-READ_STATUS = TRUE\r
-READ_LOCK_CAP = TRUE\r
-READ_LOCK_STATUS = TRUE\r
-\r
-[Capsule.Capsule_Boot]\r
-#\r
-# gEfiCapsuleGuid supported by platform\r
-# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r
-#\r
-CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r
-CAPSULE_FLAGS = PersistAcrossReset\r
-CAPSULE_HEADER_SIZE = 0x20\r
-\r
-FV = BiosUpdate\r
-\r
-[Capsule.Capsule_Reset]\r
-#\r
-# gEfiCapsuleGuid supported by platform\r
-# { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}\r
-#\r
-CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0\r
-CAPSULE_FLAGS = PersistAcrossReset\r
-CAPSULE_HEADER_SIZE = 0x20\r
-\r
-FV = BiosUpdate\r
-\r
################################################################################\r
#\r
# Rules are use with the [FV] section's module INF type to define\r
[Rule.Common.SEC.BINARY]\r
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
PE32 PE32 Align = 8 |.efi\r
- RAW BIN Align = 16 |.com\r
+!if $(MINNOW2_FSP_BUILD) == TRUE\r
+ RAW RAW |.raw\r
+!else\r
+ RAW BIN Align = 16 |.com\r
+!endif\r
}\r
\r
[Rule.Common.PEI_CORE]\r
RAW BIN |.bin\r
}\r
\r
+[Rule.Common.USER_DEFINED.BINARY]\r
+ FILE FREEFORM = $(NAMED_GUID) {\r
+ UI STRING="$(MODULE_NAME)" Optional\r
+ RAW BIN |.bin\r
+ }\r
+\r
[Rule.Common.USER_DEFINED.ACPITABLE]\r
FILE FREEFORM = $(NAMED_GUID) {\r
RAW ACPI Optional |.acpi\r
RAW ASL Optional |.aml\r
}\r
\r
+[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
+ FILE PEIM = $(NAMED_GUID) {\r
+ RAW BIN |.acpi\r
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
+ UI STRING="$(MODULE_NAME)" Optional\r
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
+ }\r
projects / mirror_edk2.git / blobdiff