ArmPkg/ArmMmuLib ARM: assume page tables are in writeback cacheable memory
authorArd Biesheuvel <ard.biesheuvel@linaro.org>
Thu, 21 Jun 2018 07:17:52 +0000 (09:17 +0200)
committerArd Biesheuvel <ard.biesheuvel@linaro.org>
Thu, 21 Jun 2018 14:09:22 +0000 (16:09 +0200)
commit6e275c613e15ffc6dc79901fb244e8cb20af9948
tree01251e8680082fa82c83e3453146a21fb947d5b7
parent713aea34864ce5fc0a248b85bf3caa64fcf22467
ArmPkg/ArmMmuLib ARM: assume page tables are in writeback cacheable memory

Given that these days, our ARM port only supports ARMv7 and later, we
can assume that the page table walker's memory accesses are cache
coherent, and so there is no need to perform cache maintenance. It
does require the page tables themselves to reside in memory mapped as
writeback cacheable so ASSERT() that this is the case.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S
ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c