IntelFsp2Pkg/FspSecCore: Use UefiCpuLib.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2825

UefiCpuLib has API InitializeFloatingPointUnits.
Remove internal copy of InitializeFloatingPointUnits
in FspSecCoreM, use UefiCpuLib API.

This change also avoid later potential conflict when
use UefiCpuLib for FspSecCoreM module.

Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>

diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
index 25f2a109ab288375a4b7be5db063e01a44114b03..61b7ddca4c146276f8cb23d2ac91eff3b30b82a6 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
@@ -29,7 +29,6 @@
 \r
 [Sources.IA32]\r
   Ia32/Stack.nasm\r
-  Ia32/InitializeFpu.nasm\r
   Ia32/FspApiEntryM.nasm\r
   Ia32/FspApiEntryCommon.nasm\r
   Ia32/FspHelper.nasm\r
@@ -41,6 +40,7 @@
 [Packages]\r
   MdePkg/MdePkg.dec\r
   IntelFsp2Pkg/IntelFsp2Pkg.dec\r
+  UefiCpuPkg/UefiCpuPkg.dec\r
 \r
 [LibraryClasses]\r
   BaseMemoryLib\r
@@ -51,6 +51,7 @@
   FspSwitchStackLib\r
   FspCommonLib\r
   FspSecPlatformLib\r
+  UefiCpuLib\r
 \r
 [Pcd]\r
   gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase              ## CONSUMES\r

diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
index 971b311e4247bea70931ffca40e2dc315c3b84f0..664bde56789b7378d48490068dd87ef38ed29041 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
@@ -25,7 +25,6 @@
 \r
 [Sources.IA32]\r
   Ia32/Stack.nasm\r
-  Ia32/InitializeFpu.nasm\r
   Ia32/FspApiEntryT.nasm\r
   Ia32/FspHelper.nasm\r
 \r

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
deleted file mode 100644 (file)
index ebc91c4..0000000
--- a/IntelFsp2Pkg/FspSecCore/Ia32/InitializeFpu.nasm
+++ /dev/null
@@ -1,72 +0,0 @@
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>\r
-; SPDX-License-Identifier: BSD-2-Clause-Patent\r
-;\r
-; Abstract:\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-\r
-SECTION .data\r
-;\r
-; Float control word initial value:\r
-; all exceptions masked, double-precision, round-to-nearest\r
-;\r
-ASM_PFX(mFpuControlWord):\r
-    dw    0x027F\r
-;\r
-; Multimedia-extensions control word:\r
-; all exceptions masked, round-to-nearest, flush to zero for masked underflow\r
-;\r
-ASM_PFX(mMmxControlWord):\r
-     dd     0x01F80\r
-\r
-SECTION .text\r
-\r
-;\r
-; Initializes floating point units for requirement of UEFI specification.\r
-;\r
-; This function initializes floating-point control word to 0x027F (all exceptions\r
-; masked,double-precision, round-to-nearest) and multimedia-extensions control word\r
-; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero\r
-; for masked underflow).\r
-;\r
-\r
-global ASM_PFX(InitializeFloatingPointUnits)\r
-ASM_PFX(InitializeFloatingPointUnits):\r
-\r
-\r
-    push    ebx\r
-\r
-    ;\r
-    ; Initialize floating point units\r
-    ;\r
-    finit\r
-    fldcw    [ASM_PFX(mFpuControlWord)]\r
-\r
-    ;\r
-    ; Use CpuId instruction (CPUID.01H:EDX.SSE[bit 25] = 1) to test\r
-    ; whether the processor supports SSE instruction.\r
-    ;\r
-    mov     eax, 1\r
-    cpuid\r
-    bt      edx, 25\r
-    jnc     Done\r
-\r
-    ;\r
-    ; Set OSFXSR bit 9 in CR4\r
-    ;\r
-    mov     eax, cr4\r
-    or      eax, BIT9\r
-    mov     cr4, eax\r
-\r
-    ;\r
-    ; The processor should support SSE instruction and we can use\r
-    ; ldmxcsr instruction\r
-    ;\r
-    ldmxcsr [ASM_PFX(mMmxControlWord)]\r
-Done:\r
-    pop     ebx\r
-\r
-    ret\r

diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h b/IntelFsp2Pkg/FspSecCore/SecMain.h
index af7f3879600731ee2d8fb89a7d7d135ea59451fa..f6333b0ffb0f5ff87d7c18dc49cbcdda139fd1a4 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecMain.h
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
@@ -21,6 +21,7 @@
 #include <Library/SerialPortLib.h>\r
 #include <Library/FspSwitchStackLib.h>\r
 #include <Library/FspCommonLib.h>\r
+#include <Library/UefiCpuLib.h>\r
 #include <FspEas.h>\r
 \r
 typedef VOID (*PEI_CORE_ENTRY) ( \\r
@@ -80,20 +81,6 @@ SecTemporaryRamSupport (
   IN UINTN                    CopySize\r
   );\r
 \r
-/**\r
-  Initializes floating point units for requirement of UEFI specification.\r
-\r
-  This function initializes floating-point control word to 0x027F (all exceptions\r
-  masked,double-precision, round-to-nearest) and multimedia-extensions control word\r
-  (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero\r
-  for masked underflow).\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InitializeFloatingPointUnits (\r
-  VOID\r
-  );\r
 \r
 /**\r
 \r

diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
index 26cd3da43c3f7f54e23ae5268363412af787745f..309411630d946dfd83cf54406042b37e8209a381 100644 (file)
--- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
@@ -25,6 +25,7 @@
   PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
   IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
   UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
+  UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf\r
 \r
   ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf\r
   PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf\r