]> git.proxmox.com Git - mirror_edk2.git/commitdiff
UefiCpuPkg/CpuDxe: Remove MSR_IA32_MISC_ENABLE check
authorJeff Fan <jeff.fan@intel.com>
Wed, 15 Mar 2017 01:47:52 +0000 (09:47 +0800)
committerJeff Fan <jeff.fan@intel.com>
Fri, 17 Mar 2017 05:55:12 +0000 (13:55 +0800)
The architectural MSR MSR_IA32_MISC_ENABLE is not supported by AMD processors.
Because reading CPUID.80000001H:EDK[20] is enough to check if XD feature is
supported or not, we just remove checking MSR_IA32_MISC_ENABLE(0x1A0).

Cc: Anthony PERARD <anthony.perard@citrix.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Tested-by: Anthony PERARD <anthony.perard@citrix.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
UefiCpuPkg/CpuDxe/CpuPageTable.c

index 65f607a90c3d1b31cae5017e628b664fda6742aa..ab664b47d605cb6ade8b2fe3450c4821600d5e72 100644 (file)
@@ -193,12 +193,9 @@ GetCurrentPagingContext (
     AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r
     if ((RegEdx & BIT20) != 0) {\r
       // XD supported\r
-      if ((AsmReadMsr64 (0x000001A0) & BIT34) == 0) {\r
-        // XD enabled\r
-        if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {\r
-          // XD activated\r
-          PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;\r
-        }\r
+      if ((AsmReadMsr64 (0xC0000080) & BIT11) != 0) {\r
+        // XD activated\r
+        PagingContext->ContextData.Ia32.Attributes |= PAGE_TABLE_LIB_PAGING_CONTEXT_IA32_X64_ATTRIBUTES_XD_ACTIVATED;\r
       }\r
     }\r
     if ((RegEdx & BIT26) != 0) {\r