Drivers/SataSiI3132Dxe: Fixed PCI IO read and write operations

The ATA pass through read should use PCI IO bus master write operation
and ATA pass through write should use PCI IO bus master read operation
as the read and write operations are executed from the bus master's
point of view.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c
index 2fb5fd68db01acc8641e850f3a1e1eb8dc81ccce..a938563ebdd61aafd58a9fe6f6c88220f61f4181 100644 (file)
--- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c
+++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SiI3132AtaPassThru.c
@@ -104,7 +104,7 @@ SiI3132AtaPassThruCommand (
     }\r
 \r
     Status = PciIo->Map (\r
-               PciIo, EfiPciIoOperationBusMasterRead,\r
+               PciIo, EfiPciIoOperationBusMasterWrite,\r
                Packet->InDataBuffer, &InDataBufferLength, &PhysInDataBuffer, &PciAllocMapping\r
                );\r
     if (EFI_ERROR (Status)) {\r
@@ -139,7 +139,7 @@ SiI3132AtaPassThruCommand (
     OutDataBufferLength = Packet->OutTransferLength * SataDevice->BlockSize;\r
 \r
     Status = PciIo->Map (\r
-               PciIo, EfiPciIoOperationBusMasterWrite,\r
+               PciIo, EfiPciIoOperationBusMasterRead,\r
                Packet->OutDataBuffer, &OutDataBufferLength, &PhysOutDataBuffer, &PciAllocMapping\r
                );\r
     if (EFI_ERROR (Status)) {\r